Vishay Siliconix SI3495DV-T1-E3
- Part No.:
- SI3495DV-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
SI3495DV-T1-E3.pdf
- Description:
- MOSFET P-CH 20V 5.3A 6TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,430
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Product details
Overview
SI3495DV-T1-E3 from Vishay Siliconix is a P-channel enhancement-mode TrenchFET® MOSFET rated for -20 V drain-source voltage, 0.024 Ω RDS(on) at VGS = -4.5 V, and -7 A continuous drain current at TA = 25 °C. It serves as a low-voltage load switch in portable electronics with ultra-low gate threshold (VGS(th) = -0.35 to -0.75 V) and halogen-free, RoHS-compliant construction.
For engineers reviewing the SI3495DV-T1-E3 datasheet, SI3495DV-T1-E3 pinout, SI3495DV-T1-E3 application, or SI3495DV-T1-E3 equivalent, key selection criteria include its 1.5-V-rated gate drive compatibility, TSOP-6 surface-mount package, -20 V breakdown rating, and verified Rg testing for consistent switching performance in battery-powered load-switching circuits.
Technical Context
This device operates as a single P-channel power switch optimized for low-voltage DC load control where gate drive is limited to ≤ -4.5 V. Its trench-based silicon structure delivers stable RDS(on) down to VGS = -1.5 V (0.048 Ω), enabling operation from single-cell Li-ion or NiMH supplies without level-shifting circuitry.
The TSOP-6 package provides thermal resistance of 90 °C/W (junction-to-ambient, steady-state) and 25 °C/W (junction-to-foot), supporting compact PCB layouts in space-constrained portable designs. All units undergo 100 % gate resistance (Rg) screening to ensure predictable turn-on/turn-off timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | -20 V - Maximum blocking voltage for single-cell battery systems and 3.3 V/5 V rail isolation |
| RDS(on) @ VGS = -4.5 V | 0.024 Ω - Enables <170 mW conduction loss at 7 A, critical for thermal management in sealed enclosures |
| ID (continuous, TA = 25 °C) | -7 A - Supports high-current peripheral switching (e.g., USB ports, backlight drivers) without external heatsinking |
| VGS(th) | -0.35 to -0.75 V - Ensures reliable turn-on with weak gate drivers (e.g., GPIOs, low-power microcontrollers) |
| Qg | 25–38 nC - Determines gate drive energy requirement; compatible with standard logic-level drivers at ≤1 MHz switching |
| RthJA (steady-state) | 90 °C/W - Defines maximum power dissipation limit (≈1.1 W) on standard FR4 without copper pour |
| Package | TSOP-6 - 2.85 mm × 3.0 mm footprint with exposed drain pad for thermal relief and PCB area efficiency |
Pinout & Package
TSOP-6 surface-mount package with exposed drain pad (pin 4) for thermal conduction and mechanical stability. Pin 1 marked with dot; pin numbering follows standard top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Source | Primary current return path; tied to system ground or common rail in high-side switch configurations |
| 2 | Gate | Control input requiring negative bias relative to source; low capacitance enables fast edge rates |
| 3 | Drain | Main power output node; electrically and thermally connected to exposed pad (pin 4) |
| 4 | Drain (exposed pad) | Thermal and electrical connection to PCB copper; must be soldered to maximize heat dissipation |
| 5 | Source | Second source terminal - paralleled internally with pin 1 to reduce package inductance |
| 6 | Source | Third source terminal - reduces IR drop and improves current sharing in high-pulse applications |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Enables 0.024 Ω RDS(on) at -4.5 V gate drive, reducing conduction losses by >30 % vs. planar P-MOSFETs in same package |
| 100 % Rg tested | Guarantees gate resistance between 4–13 Ω, ensuring consistent switching speed and EMI profile across production lots |
| Halogen-free & RoHS-compliant | Meets IEC 61249-2-21 and Directive 2002/95/EC for environmentally regulated consumer and medical devices |
| Ultra-low VGS(th) | Turns on fully at -1.5 V, allowing direct interface with 1.8 V/2.5 V logic without gate driver ICs |
Applications
| Smartphone Power Management | Wireless Headset Battery Protection |
|---|---|
Use Scenario: Isolating main battery from USB charging circuitry during data transfer to prevent backfeed and thermal runaway. IC Role / Device Role / Timing Role: High-side load switch controlling 3.7 V Li-ion rail with fast turn-off (<300 ns fall time) to meet USB-IF hot-plug requirements. Use Value: 0.048 Ω RDS(on) at -1.5 V gate drive eliminates need for auxiliary LDO, saving board space and BOM cost. | Use Scenario: Enabling/disabling Bluetooth radio module based on firmware state to extend standby time beyond 30 days. IC Role / Device Role / Timing Role: Low-quiescent-load power gate with <1 µA IDSS leakage, minimizing self-discharge during sleep mode. Use Value: -0.75 V max VGS(th) ensures full enhancement even at end-of-life battery voltage (~2.8 V). |
| Portable Medical Sensor Hub | USB-C Accessory Detection |
Use Scenario: Sequencing power to analog front-end (AFE), MCU, and BLE transceiver during cold start to avoid brownout. IC Role / Device Role / Timing Role: Controlled ramp-up switch with predictable td(on)/td(off) due to screened Rg, preventing supply rail collapse. Use Value: 25 nC typical Qg allows clean 100 µs turn-on using standard 10 kΩ pull-down + GPIO, no external driver needed. | Use Scenario: Detecting accessory insertion by monitoring VBUS presence while isolating legacy USB 2.0 data lines from 5 V supply. IC Role / Device Role / Timing Role: Reverse-polarity protection switch placed between VBUS and downstream regulator input. Use Value: -20 V VDS rating withstands USB-C 20 V negotiation transients without clamping diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si3485DV-T1-E3 | Slightly higher RDS(on) (0.028 Ω @ -4.5 V); identical TSOP-6 package and pinout | Same load-switch use cases but marginally higher conduction loss at >5 A | Select when lower gate charge (22 nC) is prioritized over minimal RDS(on) reduction |
| DMN2011LFG-7 | Higher VGS(th) (-0.9 V typ), 0.022 Ω RDS(on) @ -4.5 V, X2-DFN package (2 × 2 mm) | Requires PCB redesign due to different footprint and thermal pad layout | Choose for space-constrained designs needing sub-2 mm² footprint and tighter VGS(th) distribution |
Compared with Si3485DV-T1-E3 and DMN2011LFG-7, the SI3495DV-T1-E3 offers the lowest VGS(th) range and best RDS(on) at 1.5 V gate drive-making it optimal for direct GPIO control in ultra-low-power portable systems where layout flexibility and gate drive simplicity are primary constraints.
Availability
SI3495DV-T1-E3 is available at Aetrix Electronics and suitable for smartphone power management, wireless headset battery protection, and portable medical sensor hub designs requiring stable component supply, long-term lifecycle support, and RoHS/halogen-free compliance.
Supply support for SI3495DV-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in MOSFETs, diodes, optoelectronics, and passive components with emphasis on power efficiency and reliability.
The Si3495DV-T1-E3 belongs to Vishay's TrenchFET® P-channel MOSFET product line, engineered specifically for low-voltage load switching in battery-powered portable electronics where gate drive headroom is constrained and thermal density is critical.
FAQ
What is the maximum continuous drain current for SI3495DV-T1-E3 at 85 °C ambient temperature?
The SI3495DV-T1-E3 supports -3.6 A continuous drain current at TA = 85 °C under standard mounting conditions (1" × 1" FR4 board). This derating reflects thermal limits imposed by its 90 °C/W junction-to-ambient resistance. Designers must verify PCB copper area and airflow in final layout to sustain this current reliably. The SI3495DV-T1-E3 datasheet specifies this value in the Absolute Maximum Ratings table on page 1.
Does SI3495DV-T1-E3 require a gate driver IC when controlled by a 1.8 V microcontroller GPIO?
Yes, the SI3495DV-T1-E3 can be directly driven by a 1.8 V microcontroller GPIO because its VGS(th) ranges from -0.35 V to -0.75 V, and it achieves usable RDS(on) (0.048 Ω) at VGS = -1.5 V. No external gate driver is needed-only a series resistor (typically 10–100 Ω) to dampen ringing. This capability is confirmed in the Transfer Characteristics graph and RDS(on) vs. VGS plot on page 3 of the SI3495DV-T1-E3 datasheet.
What is the thermal resistance from junction to foot (RthJF) for SI3495DV-T1-E3, and why does it matter?
The SI3495DV-T1-E3 has a typical RthJF of 25 °C/W (maximum 30 °C/W), measured from junction to the exposed drain pad (pin 4). This parameter matters because it defines how efficiently heat transfers from the die to the PCB copper via the thermal pad. A low RthJF enables higher power handling in compact layouts-critical for portable devices where heatsinks are impractical. This value is specified in the Thermal Resistance Ratings table on page 1 of the SI3495DV-T1-E3 datasheet.
Is SI3495DV-T1-E3 pin-compatible with Si3485DV-T1-E3?
Yes, the SI3495DV-T1-E3 is pin-compatible with Si3485DV-T1-E3: both use the TSOP-6 package with identical pin 1–6 assignments (S-G-D-D-S-S) and mechanical footprint. This allows drop-in replacement in existing layouts where lower RDS(on) and tighter VGS(th) are desired. The pinout diagram on page 1 of the SI3495DV-T1-E3 datasheet confirms this alignment.
What is the total gate charge (Qg) of SI3495DV-T1-E3, and how does it affect switching efficiency?
The SI3495DV-T1-E3 has a typical total gate charge (Qg) of 25 nC (max 38 nC) at VDS = -10 V and VGS = -4.5 V. This value determines the energy required per switching cycle (E = Qg × VGS). At 1 MHz operation, it contributes ~115 µW of dynamic gate loss-negligible compared to conduction loss below 5 A. This Qg is documented in the Dynamic specifications table on page 2 of the SI3495DV-T1-E3 datasheet.
SI3495DV-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 5.3A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 1.5V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 24mOhm @ 7A, 4.5V
- Vgs(th) (Max) @ Id:
- 750mV @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 38 nC @ 4.5 V
- Vgs (Max):
- ±5V
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- 1.1W (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
SI3495DV-T1-E3 FAQ
1.How can I place an order for SI3495DV-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI3495DV-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI3495DV-T1-E3 reliable?
The price and inventory of SI3495DV-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI3495DV-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI3495DV-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI3495DV-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI3495DV-T1-E3?
SI3495DV-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI3495DV-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI3495DV-T1-E3?
For technical support, including SI3495DV-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI3495DV-T1-E3 requirements.
6.How does Aetrix verify that SI3495DV-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI3495DV-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI3495DV-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI3495DV-T1-E3?
All SI3495DV-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI3495DV-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI3495DV-T1-E3 part is unused and in its original packaging.
Return procedure for SI3495DV-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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