Vishay Siliconix SI7404DN-T1-E3
- Part No.:
- SI7404DN-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8
- Datasheet:
-
SI7404DN-T1-E3.pdf
- Description:
- MOSFET N-CH 30V 8.5A PPAK 1212-8
- Quantity:
- Payment:

- Shipping:

Inventory:6,114
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Product details
Overview
SI7404DN-T1-E3 from Vishay Siliconix is an N-channel 30 V (D-S) TrenchFET® Power MOSFET in a PowerPAK® 1212-8 package, with RDS(on) = 0.013 Ω at VGS = 10 V, 13.3 A continuous drain current, and optimized for fast switching in Li-ion battery protection circuits.
For engineers reviewing the SI7404DN-T1-E3 datasheet, SI7404DN-T1-E3 pinout, SI7404DN-T1-E3 application, or SI7404DN-T1-E3 equivalent, this page delivers verified electrical parameters, thermal performance data, gate charge characteristics, and real-world use context for high-reliability portable power management design.
Technical Context
This MOSFET employs trench-gate silicon technology to achieve low on-resistance and fast switching transitions. Its gate threshold voltage (0.6–1.5 V) enables robust operation with 2.5 V logic-level drive, while its 15 A single-pulse avalanche rating supports transient energy handling in battery disconnect paths.
The device integrates a body diode with 0.75–1.2 V forward voltage at 3.2 A, supporting bidirectional current flow in protection FET configurations. Thermal resistance RthJA is 65 °C/W (steady-state), validated on 1" × 1" FR4, enabling compact PCB layout without forced airflow.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage compatible with 3S Li-ion packs (12.6 V nominal) and surge margin. |
| RDS(on) @ 10 V | 0.013 Ω - Enables <170 mW conduction loss at 13.3 A, critical for thermal budget in sealed battery packs. |
| ID (continuous) | 13.3 A @ TA = 25 °C - Supports high-current discharge paths in smart battery modules. |
| Qg | 20–30 nC - Low total gate charge reduces driver power and switching losses in high-frequency protection IC interfaces. |
| VGS(th) | 0.6–1.5 V - Ensures reliable turn-on with standard 2.5 V/3.3 V microcontroller GPIOs without level-shifting. |
| EAS | 11 mJ - Withstands single-event inductive kickback during hot-plug or short-circuit interruption. |
| RthJC | 1.9–2.4 °C/W - Efficient heat transfer to PCB copper pour through exposed drain pad, enabling thermal derating predictability. |
Pinout & Package
PowerPAK® 1212-8 is a leadless surface-mount package with an exposed drain pad on the bottom for thermal and electrical connection. The top-side terminals are arranged in a 2×4 configuration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Common source connection for dual-FET or back-to-back configuration; tied internally to substrate ground reference. |
| 5 | Gate (G) | Control input requiring <30 nC charge; sensitive to ESD-requires proper layout guard ring and series resistor. |
| 6, 7, 8, Drain Pad | Drain (D) | Main power path terminal; exposed copper pad on bottom provides primary thermal path and low-inductance high-current return. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Delivers 0.013 Ω RDS(on) in 1212 footprint-enables smaller board area vs. SO-8 equivalents with same current rating. |
| Halogen-free & RoHS-compliant | Meets IEC 61249-2-21 and Directive 2002/95/EC-supports environmental compliance for consumer and medical portable devices. |
| Fast switching (tr/tf ≤ 60 ns) | Reduces transition losses during overcurrent shutdown, improving response time and energy efficiency in protection IC co-design. |
| Low VGS(th) distribution | 0.6–1.5 V range ensures consistent turn-on across temperature and process variation-minimizes false triggering in battery monitoring systems. |
| 100% Rg-tested | Guarantees gate resistance uniformity-critical for predictable timing in synchronous FET arrays used in dual-MOSFET protection switches. |
Applications
| Battery Pack Protection Circuit | USB-C Power Delivery Sink |
|---|---|
Use Scenario: Dual-MOSFET back-to-back configuration isolates cell stack from load during overvoltage, overcurrent, or overtemperature events. IC Role / Device Role / Timing Role: High-side switch controlled by dedicated protection IC (e.g., TI BQ77PL900); conducts up to 13.3 A continuously with <170 mW loss. Use Value: 0.013 Ω RDS(on) minimizes self-heating during sustained discharge, extending thermal shutdown margin in sealed enclosures. | Use Scenario: Reverse-current blocking path between USB-C port and system power rail to prevent backfeed during adapter removal. IC Role / Device Role / Timing Role: Low-side reverse-blocking FET driven by PD controller (e.g., STUSB4500); turns off within 100 ns to meet USB PD 3.0 safety timing. Use Value: 30 ns turn-on delay and 33 ns fall time enable sub-100 µs fault isolation-meeting USB PD specification for sink disconnection. |
| Wireless Charging Receiver Module | Portable Medical Device Power Path |
Use Scenario: Input power path selection between wireless receiver coil output and external DC input, with seamless switchover. IC Role / Device Role / Timing Role: Load switch managed by PMIC (e.g., NXP PCA9450); handles 12.4 A at 4.5 V gate drive with 0.015 Ω on-resistance. Use Value: 2.5 V logic-compatible VGS(th) allows direct control from 3.3 V PMIC outputs-eliminating level shifters and reducing BOM count. | Use Scenario: Isolation of main Li-ion battery from patient-connected subsystems during fault conditions per IEC 62304 Class C requirements. IC Role / Device Role / Timing Role: Safety-critical disconnect switch activated by watchdog timer or analog comparator; rated for 15 A single-pulse avalanche. Use Value: 11 mJ EAS withstands inductive energy from relay coils or motor drivers during emergency shutdown-ensuring fail-safe isolation integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si7403DP-T1-GE3 | Same PowerPAK 1212-8 package, but P-channel; RDS(on) = 0.017 Ω @ VGS = –10 V; complementary topology only. | Used in high-side switching where gate drive referenced to source is impractical; not interchangeable in low-side configurations. | Select only when designing back-to-back protection pairs requiring matched RDS(on) and thermal profiles. |
| DMN3028LSD-13 | SO-8 package; RDS(on) = 0.028 Ω @ 10 V; higher thermal resistance (RthJA = 70 °C/W); no halogen-free option. | Suitable for legacy designs with SO-8 footprints; lacks 2.5 V drive capability and fails RoHS/halogen compliance for new medical/consumer programs. | Choose only for cost-sensitive industrial applications where footprint compatibility outweighs efficiency and compliance needs. |
Compared with Si7403DP-T1-GE3 and DMN3028LSD-13, the SI7404DN-T1-E3 offers superior low-voltage drive, lower conduction loss, and full environmental compliance-making it the preferred choice for next-generation battery-powered medical, wearables, and USB-C devices requiring compact, efficient, and certified power switching.
Availability
SI7404DN-T1-E3 is available at Aetrix Electronics and suitable for Li-ion battery protection, USB-C power delivery sinks, wireless charging receivers, and portable medical device power paths requiring stable component supply and long-term lifecycle support.
Supply support for SI7404DN-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in power MOSFETs, diodes, and optoelectronics with emphasis on reliability, efficiency, and miniaturization.
The Si7404DN belongs to Vishay's TrenchFET® Gen IV family, engineered specifically for high-current, low-voltage battery management and load-switching applications where thermal performance and logic-level drive are critical.
FAQ
What is the maximum continuous drain current for SI7404DN-T1-E3 at 70 °C ambient temperature?
The SI7404DN-T1-E3 supports 10.6 A continuous drain current at TA = 70 °C under steady-state conditions, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the PowerPAK® 1212-8 package on standard FR4 PCBs. For designs exceeding this, thermal simulation using RthJA = 65 °C/W and RthJC = 1.9 °C/W is recommended. The SI7404DN-T1-E3 maintains safe operation up to TJ = 150 °C.
Does SI7404DN-T1-E3 support 2.5 V logic-level gate drive?
Yes, the SI7404DN-T1-E3 has a gate threshold voltage range of 0.6–1.5 V and delivers RDS(on) = 0.022 Ω at VGS = 2.5 V and ID = 5 A. This confirms reliable enhancement-mode operation with 2.5 V microcontroller GPIOs. The SI7404DN-T1-E3 is explicitly characterized for 2.5 V drive in the MOSFET Specifications table, making it suitable for low-power portable systems without gate drivers.
What is the avalanche energy rating of SI7404DN-T1-E3, and how is it tested?
The SI7404DN-T1-E3 is rated for 11 mJ single-pulse avalanche energy (EAS) with a 0.1 mH inductive load, per the Absolute Maximum Ratings table. Testing follows JEDEC standards using unclamped inductive switching (UIS) with pulse width ≤300 µs and duty cycle ≤2 %. This rating applies to transient events like hot-plug disconnection or load dump in battery protection circuits. The SI7404DN-T1-E3 sustains this stress without parametric shift or failure.
Is SI7404DN-T1-E3 halogen-free and RoHS-compliant?
Yes, the SI7404DN-T1-E3 is both halogen-free per IEC 61249-2-21 and compliant with RoHS Directive 2002/95/EC, as confirmed in the Features section and Ordering Information row. The "-E3" suffix denotes lead-free and halogen-free construction. This makes the SI7404DN-T1-E3 suitable for consumer, medical, and automotive applications requiring strict environmental compliance. No exemptions apply.
What is the thermal resistance from junction to case (RthJC) for SI7404DN-T1-E3?
The SI7404DN-T1-E3 has a maximum junction-to-case (drain) thermal resistance of 2.4 °C/W under steady-state conditions, with a typical value of 1.9 °C/W. This parameter is measured from the silicon die to the exposed drain pad on the bottom of the PowerPAK® 1212-8 package. It enables accurate thermal modeling when the drain pad is soldered to a large copper pour. The SI7404DN-T1-E3 leverages this low RthJC for efficient heat extraction in space-constrained battery modules.
SI7404DN-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® 1212-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 8.5A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 2.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 13mOhm @ 13.3A, 10V
- Vgs(th) (Max) @ Id:
- 1.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 30 nC @ 4.5 V
- Vgs (Max):
- ±12V
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- 1.5W (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8
SI7404DN-T1-E3 FAQ
1.How can I place an order for SI7404DN-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI7404DN-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI7404DN-T1-E3 reliable?
The price and inventory of SI7404DN-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI7404DN-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI7404DN-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI7404DN-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI7404DN-T1-E3?
SI7404DN-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI7404DN-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI7404DN-T1-E3?
For technical support, including SI7404DN-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI7404DN-T1-E3 requirements.
6.How does Aetrix verify that SI7404DN-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI7404DN-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI7404DN-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI7404DN-T1-E3?
All SI7404DN-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI7404DN-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI7404DN-T1-E3 part is unused and in its original packaging.
Return procedure for SI7404DN-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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