Vishay Siliconix SI7810DN-T1-E3
- Part No.:
- SI7810DN-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8
- Datasheet:
-
SI7810DN-T1-E3.pdf
- Description:
- MOSFET N-CH 100V 3.4A PPAK1212-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI7810DN-T1-E3 from Vishay Siliconix is a N-channel 100-V (D-S) TrenchFET® Power MOSFET in PowerPAK® 1212-8 package, with RDS(on) = 0.062 Ω at VGS = 10 V, ID = 5.4 A, and thermal resistance RthJA = 65 °C/W (steady state). It serves as a primary-side switch in offline SMPS and in-rush current limiter in power supply front-ends.
For engineers reviewing the SI7810DN-T1-E3 datasheet, SI7810DN-T1-E3 pinout, SI7810DN-T1-E3 application, or SI7810DN-T1-E3 equivalent, key selection criteria include its 100-V VDS, low-profile 1.07-mm PowerPAK 1212-8 footprint, PWM-optimized switching performance, and lead-free RoHS-compliant construction.
Technical Context
This MOSFET employs Vishay's TrenchFET® process for enhanced conduction efficiency and reduced gate charge (Qg = 17 nC max), enabling fast switching in high-frequency DC-DC and AC-DC converters. Its 8-pin PowerPAK 1212-8 package integrates four parallel drain terminals to lower package inductance and improve current sharing.
The device features a gate threshold voltage (VGS(th)) of 2–4.5 V, zero-gate-voltage drain leakage (IDSS) ≤ 1 µA at 100 V, and integrated body diode with VSD = 0.78–1.2 V at IS = 3.2 A - supporting synchronous rectification and freewheeling roles in flyback and LLC topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - supports primary-side switching in universal-input offline converters up to 400 V DC bus with margin. |
| RDS(on) @ 10 V | 0.062 Ω - enables <1.8 W conduction loss at 5.4 A continuous drain current, reducing thermal load on PCB. |
| ID (TJ = 150 °C) | 5.4 A - defines maximum continuous output capability under worst-case junction temperature conditions. |
| Qg | 17 nC max - determines gate drive energy requirement and switching speed in PWM-controlled applications. |
| RthJA (steady state) | 65 °C/W - sets thermal rise above ambient for board-level thermal design; requires ≥1 cm² copper pour for safe operation at full load. |
| VGS(th) | 2–4.5 V - ensures reliable turn-on with standard 5-V or 3.3-V logic-level gate drivers without level-shifting. |
Pinout & Package
SI7810DN-T1-E3 uses the surface-mount PowerPAK® 1212-8 package (3.3 mm × 3.3 mm, 1.07 mm height), featuring a thermally enhanced bottom-exposed drain pad and eight terminals arranged in dual-row configuration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Drain (D) | Four parallel drain connections reduce package inductance and improve current distribution in high-di/dt switching. |
| 5 | Gate (G) | Single gate input terminal; low Qgs/Qgd ratio (3 nC / 4.6 nC) supports clean turn-on/turn-off transitions. |
| 6, 7, 8 | Source (S) | Three-source configuration lowers source inductance and improves stability in high-speed gate drive loops. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® technology | Delivers industry-leading RDS(on) × Qg figure-of-merit for efficient high-frequency switching. |
| PowerPAK® 1212-8 package | 1.07-mm profile enables ultra-thin power designs; exposed drain pad enhances thermal transfer to PCB ground plane. |
| PWM-optimized dynamic parameters | Low Qgd/Qg ratio (27 %) minimizes Miller-induced switching delay and improves duty-cycle fidelity. |
| Lead (Pb)-free construction | RoHS-compliant termination meets IPC-J-STD-020 reflow requirements and eliminates hazardous substance compliance risk. |
Applications
| Offline Flyback Converter Primary Switch | In-Rush Current Limiter |
|---|---|
Use Scenario: Used as main switching element in 12–65 W universal-input flyback converters for AC-DC adapters and industrial power supplies. IC Role / Device Role / Timing Role: High-voltage N-channel power switch controlled by PWM controller IC (e.g., UC384x, VIPer series) at 65–130 kHz. Use Value: 100-V rating and 0.062-Ω RDS(on) enable >85 % efficiency at full load while maintaining thermal headroom on compact 2-layer PCBs. | Use Scenario: Placed in series with bulk capacitor input stage to limit surge current during cold-start of 24–48 V DC power systems. IC Role / Device Role / Timing Role: Active in-rush limiter controlled via external timer circuit or microcontroller GPIO, operating in linear mode for <500 ms. Use Value: Low RDS(on) and robust single-pulse avalanche rating (EAS = 18 mJ) prevent failure during repeated hot-plug events. |
| DC-DC Synchronous Rectifier | Industrial Motor Driver Half-Bridge |
Use Scenario: Employed as secondary-side synchronous rectifier in isolated 12 V output DC-DC modules for telecom and server applications. IC Role / Device Role / Timing Role: Body diode conduction followed by active synchronous switching driven by gate driver referenced to source node. Use Value: VSD = 0.78 V and low Qrr (45–90 ns) reduce reverse recovery losses versus Schottky alternatives, improving light-load efficiency. | Use Scenario: Configured as low-side switch in half-bridge motor control for 24–48 V brushed DC motors in factory automation equipment. IC Role / Device Role / Timing Role: N-channel MOSFET in low-side position, driven by isolated gate driver (e.g., Si823x) with 10-V gate bias. Use Value: 5.4-A continuous current and 19-A single-pulse avalanche rating support stall-current transients without desaturation or failure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF7810TRPBF | Same VDS (100 V), but higher RDS(on) = 0.075 Ω @ 10 V; TO-252 package (larger footprint, higher RthJA). | Less suitable for space-constrained layouts; requires larger heatsinking due to 80 °C/W RthJA. | Choose when legacy TO-252 layout compatibility is required and thermal margin exceeds 15 °C. |
| DMN10H100LK-7 | 100-V rating, RDS(on) = 0.058 Ω @ 10 V, same PowerPAK 1212-8 package; slightly higher Qg (19 nC). | Compatible footprint and thermal profile; optimized for automotive-grade reliability (AEC-Q101 qualified). | Prefer for automotive or extended-temperature applications where qualification and long-term stability are mandatory. |
Compared with IRF7810TRPBF and DMN10H100LK-7, SI7810DN-T1-E3 offers the lowest RthJA among 100-V 1212-packaged MOSFETs and best-in-class RDS(on) × Qg, making it optimal for high-density, high-efficiency industrial power supplies where thermal and switching losses are critical.
Availability
SI7810DN-T1-E3 is available at Aetrix Electronics and suitable for offline flyback converters, in-rush current limiting circuits, and DC-DC synchronous rectifiers requiring stable component supply and RoHS-compliant manufacturing.
Supply support for SI7810DN-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in power MOSFETs, diodes, and optoelectronics with emphasis on high-reliability, high-efficiency solutions.
The Si7810DN product line targets high-frequency, space-constrained power conversion applications - specifically engineered for primary-side switching and in-rush control in industrial and consumer AC-DC and DC-DC systems.
FAQ
What is the maximum continuous drain current for SI7810DN-T1-E3 at 70 °C ambient?
The SI7810DN-T1-E3 supports 4.3 A continuous drain current at TA = 70 °C, per its Absolute Maximum Ratings table. This value accounts for thermal derating due to ambient temperature rise and assumes standard FR4 PCB mounting with adequate copper area. Exceeding this current without additional heatsinking risks junction temperature exceeding 150 °C, triggering thermal shutdown or permanent damage. Always verify actual board-level thermal performance using the provided RthJA = 65 °C/W (steady state) in system-level simulations.
Does SI7810DN-T1-E3 have an integrated body diode, and what is its forward voltage?
Yes, SI7810DN-T1-E3 includes an intrinsic body diode with VSD = 0.78–1.2 V at IS = 3.2 A and VGS = 0 V. This diode supports freewheeling and synchronous rectification functions. Its reverse recovery time (trr) is 45–90 ns, enabling use in medium-frequency (<300 kHz) topologies without significant switching loss penalty. The diode is not rated for continuous conduction beyond its specified IS limits.
Is SI7810DN-T1-E3 compatible with lead-free reflow soldering processes?
Yes, SI7810DN-T1-E3 is explicitly qualified for lead-free reflow per JEDEC J-STD-020, with peak solder temperature up to 260 °C. Its PowerPAK® 1212-8 package is designed for standard Pb-free profiles; however, manual soldering with an iron is not recommended due to its leadless construction and exposed copper terminations. Reflow must follow Vishay's published profile (Document 73257) to ensure reliable interconnect without voiding or delamination.
What is the gate threshold voltage range for SI7810DN-T1-E3, and how does it affect drive requirements?
The gate threshold voltage (VGS(th)) for SI7810DN-T1-E3 is specified as 2–4.5 V at ID = 250 µA. This range ensures reliable turn-on with 3.3-V or 5-V logic-level gate drivers without external level shifting. However, full enhancement (to achieve rated RDS(on)) requires VGS ≥ 10 V. Driving below 6 V results in significantly higher on-resistance (0.084 Ω), increasing conduction loss - so gate drive design must deliver stable ≥10 V during active switching.
Can SI7810DN-T1-E3 be used in avalanche-mode operation, and what is its single-pulse rating?
Yes, SI7810DN-T1-E3 is rated for single-pulse avalanche operation with IAS = 19 A and EAS = 18 mJ at L = 0.1 mH. This capability allows safe handling of inductive switching transients in non-clamped topologies like flyback or boost converters. However, repetitive avalanche is not guaranteed and may degrade reliability. System design must ensure that all avalanche events remain within the single-pulse energy limit and do not exceed the 150 °C junction temperature limit. Refer to Vishay's application note AN956 for test methodology.
SI7810DN-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® 1212-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 3.4A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 6V, 10V
- Rds On (Max) @ Id, Vgs:
- 62mOhm @ 5.4A, 10V
- Vgs(th) (Max) @ Id:
- 4.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 17 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- 1.5W (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8
SI7810DN-T1-E3 FAQ
1.How can I place an order for SI7810DN-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI7810DN-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI7810DN-T1-E3 reliable?
The price and inventory of SI7810DN-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI7810DN-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI7810DN-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI7810DN-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI7810DN-T1-E3?
SI7810DN-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI7810DN-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI7810DN-T1-E3?
For technical support, including SI7810DN-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI7810DN-T1-E3 requirements.
6.How does Aetrix verify that SI7810DN-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI7810DN-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI7810DN-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI7810DN-T1-E3?
All SI7810DN-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI7810DN-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI7810DN-T1-E3 part is unused and in its original packaging.
Return procedure for SI7810DN-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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