Vishay Siliconix SI7868ADP-T1-E3
- Part No.:
- SI7868ADP-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SI7868ADP-T1-E3.pdf
- Description:
- MOSFET N-CH 20V 40A PPAK SO-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI7868ADP-T1-E3 from Vishay Siliconix is an N-channel 20-V TrenchFET® Power MOSFET in PowerPAK SO-8 package, optimized for low-RDS(on) and PWM efficiency with 46 nC total gate charge at VGS = 4.5 V and 20 A drain current. It delivers 0.00275 Ω RDS(on) at 4.5 V, supports 40 A continuous drain current at TC = 25 °C, and is designed for high-efficiency synchronous rectification in DC-DC converters.
For engineers reviewing the SI7868ADP-T1-E3 datasheet, SI7868ADP-T1-E3 pinout, SI7868ADP-T1-E3 application, or SI7868ADP-T1-E3 equivalent, key selection considerations include its 20 V VDS, 0.00225 Ω RDS(on) at 10 V, 40 A thermal-limited current capability, PowerPAK SO-8 leadless footprint compatibility with standard SO-8 layouts, and body diode recovery performance (trr = 50–75 ns).
Technical Context
This MOSFET employs trench-gate silicon technology to achieve ultra-low on-resistance while maintaining fast switching dynamics. Its gate charge profile (Qg = 46 nC at 4.5 V) and low Qgd/Qgs ratio are specifically tuned for high-frequency PWM operation in buck converters and OR-ing circuits.
The device integrates a robust intrinsic body diode with trr = 50–75 ns and Qrr = 43–60 nC, enabling efficient reverse recovery in synchronous rectifier topologies. Thermal design leverages the PowerPAK SO-8's exposed drain pad, delivering RthJC = 1.0–1.5 °C/W and enabling high-current operation without external heatsinking under typical PCB conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 20 V - Maximum blocking voltage for low-voltage synchronous rectification and load switch applications. |
| RDS(on) | 0.00225 Ω at VGS = 10 V / 0.00275 Ω at VGS = 4.5 V - Enables <1 W conduction loss at 20 A, critical for high-efficiency 3.3–12 V output rails. |
| ID (continuous) | 40 A at TC = 25 °C - Supports high-current power stages without paralleling, reducing BOM count and layout complexity. |
| Qg | 46 nC at VGS = 4.5 V - Optimized gate drive energy for 3.3 V/5 V controller interfaces, minimizing driver losses in high-frequency designs. |
| trr | 50–75 ns - Fast body diode recovery reduces shoot-through risk and EMI in synchronous rectifiers operating above 300 kHz. |
| RthJC | 1.0–1.5 °C/W - Enables direct thermal coupling to PCB copper, supporting >50 W dissipation with minimal temperature rise on 1 oz. FR4. |
| VGS(th) | 0.6–1.6 V - Ensures reliable turn-on with logic-level gate drivers and eliminates need for level-shifting in low-voltage control schemes. |
Pinout & Package
SI7868ADP-T1-E3 uses the PowerPAK SO-8 surface-mount package - a leadless, thermally enhanced variant of the standard SO-8 footprint (6.15 mm × 5.15 mm), featuring an exposed drain pad on the bottom for low thermal resistance and mechanical compatibility with existing SO-8 land patterns.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control terminal; accepts 0–16 V drive; low Rg (0.5–1.7 Ω) enables fast, low-loss switching with minimal gate driver stress. |
| 2 (S) | Source | Reference node for gate drive and current sensing; tied to power ground in most synchronous rectifier configurations. |
| 3 (S) | Source | Second source connection; paralleled internally with Pin 2 to reduce source inductance and improve current sharing. |
| 4 (G) | Gate | Redundant gate terminal; electrically identical to Pin 1; used to lower gate loop inductance in high-dI/dt applications. |
| 5 (D) | Drain | Main power terminal; connected to exposed bottom pad; carries full load current and serves as primary thermal path to PCB. |
| 6 (D) | Drain | Second drain connection; paralleled with Pin 5 and bottom pad to minimize drain inductance and voltage overshoot during turn-off. |
| 7 (D) | Drain | Third drain connection; further reduces package inductance and improves high-frequency current distribution across the die. |
| 8 (D) | Drain | Fourth drain connection; completes low-inductance, multi-point drain interface essential for >1 MHz switching stability. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Enables 0.00225 Ω RDS(on) at 10 V in SO-8 footprint - achieves DPAK-level performance in space-constrained layouts. |
| PWM-optimized gate charge | Qgd/Qgs ratio < 1.0 at 4.5 V - suppresses Miller-induced shoot-through and improves hard-switching reliability in buck converters. |
| 100 % Rg tested | Guarantees gate resistance between 0.5–1.7 Ω - ensures consistent switching speed and predictable gate driver sizing across production lots. |
| PowerPAK SO-8 package | RthJC = 1.0 °C/W - delivers thermal performance equivalent to DPAK while maintaining SO-8 board area and reflow compatibility. |
| Low VGS(th) variation | ΔVGS(th)/TJ = 4 mV/°C - maintains stable turn-on threshold across -55 to +150 °C, critical for automotive and industrial ambient operation. |
Applications
| Server VRM Output Stage | USB-C PD 20 V Input Switch |
|---|---|
|
Use Scenario: High-current, high-efficiency synchronous rectification in multiphase buck converters supplying CPU/GPU core voltage (0.8–1.2 V @ up to 100 A per phase). IC Role / Device Role: Low-side synchronous rectifier MOSFET, replacing Schottky diodes to eliminate forward voltage drop and reduce conduction loss. Use Value: 0.00275 Ω RDS(on) at 4.5 V enables <0.8 W loss at 20 A, improving converter efficiency by 1.2–1.8% versus comparable SO-8 MOSFETs and reducing thermal load on VRM PCB. |
Use Scenario: Input protection and hot-swap switching in USB-C Power Delivery systems requiring 20 V, 5 A continuous operation with fast fault response. IC Role / Device Role: N-channel load switch controlling 20 V input rail, configured with external gate resistor for controlled inrush and overcurrent limiting. Use Value: 20 V VDS rating matches USB-C PD maximum voltage; 40 A ID headroom supports surge currents; low RDS(on) minimizes voltage drop (<55 mV at 20 A), preserving bus regulation. |
| Industrial PLC Power Module | Telecom DC-DC Intermediate Bus Converter |
|
Use Scenario: Isolated 24 V input-to-5/3.3 V output conversion in programmable logic controller power supplies operating continuously at 60 °C ambient. IC Role / Device Role: Primary-side synchronous rectifier in active-clamp forward or LLC resonant topology, handling 30 A average output current. Use Value: RthJC = 1.0 °C/W and 150 °C TJ(max) allow stable operation at 35 A derated current at TC = 70 °C, eliminating need for forced air cooling in sealed enclosures. |
Use Scenario: 48 V to 12 V intermediate bus conversion in telecom base station power modules, operating at 300–500 kHz with strict EMI limits. IC Role / Device Role: Secondary-side synchronous rectifier in phase-shifted full-bridge topology, where fast body diode recovery prevents cross-conduction. Use Value: trr = 50–75 ns and Qrr = 43–60 nC reduce reverse recovery loss by >40% versus standard SO-8 MOSFETs, lowering temperature rise and enabling higher switching frequency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 20-V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si7858DP-T1-E3 | Same PowerPAK SO-8 package, but 30 V VDS, 0.0032 Ω RDS(on) at 4.5 V, and 35 A ID rating. | Higher voltage margin suits 24 V input systems; slightly higher RDS(on) increases conduction loss by ~15% at 20 A. | Select when 30 V blocking is required for transient immunity; not recommended for 20 V-only rails where SI7868ADP-T1-E3's lower RDS(on) provides superior efficiency. |
| IRF7478PBF | Standard SO-8 package, 20 V VDS, 0.0035 Ω RDS(on) at 4.5 V, RthJC = 16 °C/W, and no 100% Rg test. | Thermal limitation restricts continuous current to ≤12 A on standard FR4; slower trr (100+ ns) increases switching loss in high-frequency designs. | Acceptable only for cost-sensitive, low-power applications (<10 A); unsuitable for high-current or high-frequency use cases where SI7868ADP-T1-E3's thermal and dynamic advantages are decisive. |
Compared with Si7858DP-T1-E3 and IRF7478PBF, SI7868ADP-T1-E3 offers the lowest RDS(on) and best thermal performance in the 20 V class, making it optimal for high-efficiency, high-current synchronous rectification where PCB space and thermal headroom are constrained.
Availability
SI7868ADP-T1-E3 is available at Aetrix Electronics and suitable for server VRMs, USB-C PD power switches, industrial PLC power modules, and telecom intermediate bus converters requiring stable component supply, RoHS-compliant packaging, and long-term production continuity.
Supply support for SI7868ADP-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, thermal reliability, and rugged packaging.
The Si7868ADP belongs to Vishay's TrenchFET® PowerPAK SO-8 family, engineered specifically for high-current, high-frequency synchronous rectification and load switching in space-constrained, thermally demanding applications such as computing, communications, and industrial power systems.
FAQ
What is the maximum continuous drain current for SI7868ADP-T1-E3 at 70 °C case temperature?
The SI7868ADP-T1-E3 supports 32 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limitations of the PowerPAK SO-8 package under sustained power dissipation; actual usable current depends on PCB copper area, airflow, and ambient conditions. The SI7868ADP-T1-E3 datasheet confirms this value under steady-state conditions with proper thermal management.
Does SI7868ADP-T1-E3 support logic-level gate drive?
Yes, SI7868ADP-T1-E3 supports logic-level gate drive with a gate-threshold voltage (VGS(th)) ranging from 0.6 V to 1.6 V, ensuring full enhancement at 3.3 V or 4.5 V gate drive. Its low RDS(on) of 0.00275 Ω at VGS = 4.5 V confirms strong conduction capability under logic-level conditions, making SI7868ADP-T1-E3 suitable for direct interfacing with microcontrollers and PWM controllers without level shifters.
What is the thermal resistance from junction to case (RthJC) for SI7868ADP-T1-E3?
The SI7868ADP-T1-E3 has a typical junction-to-case thermal resistance (RthJC) of 1.0 °C/W and a maximum of 1.5 °C/W, measured from the silicon die to the exposed drain pad. This low value is enabled by the PowerPAK SO-8's direct copper thermal path and allows SI7868ADP-T1-E3 to dissipate up to 83 W at TC = 25 °C, significantly outperforming standard SO-8 MOSFETs.
Is SI7868ADP-T1-E3 compatible with standard SO-8 PCB footprints?
Yes, SI7868ADP-T1-E3 uses the PowerPAK SO-8 package, which maintains identical outline dimensions (6.15 mm × 5.15 mm) and pin configuration as the standard SO-8, allowing drop-in replacement on existing layouts. However, the exposed drain pad requires matching copper area on the PCB for optimal thermal performance - SI7868ADP-T1-E3 benefits from extended drain land patterns per Vishay Application Note AN826.
What is the total gate charge (Qg) of SI7868ADP-T1-E3 at 4.5 V gate drive?
The SI7868ADP-T1-E3 has a typical total gate charge (Qg) of 46 nC at VGS = 4.5 V and VDS = 10 V, as confirmed in the "Dynamic" section of the datasheet. This value is critical for calculating gate driver power loss and rise/fall times; the SI7868ADP-T1-E3's low Qg enables efficient operation with low-power gate drivers in high-frequency switching applications.
SI7868ADP-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 2.25mOhm @ 20A, 10V
- Vgs(th) (Max) @ Id:
- 1.6V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 150 nC @ 10 V
- Vgs (Max):
- ±16V
- Input Capacitance (Ciss) (Max) @ Vds:
- 6110 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5.4W (Ta), 83W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SI7868ADP-T1-E3 FAQ
1.How can I place an order for SI7868ADP-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI7868ADP-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI7868ADP-T1-E3 reliable?
The price and inventory of SI7868ADP-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI7868ADP-T1-E3 is usually 5 days.
3.What payment methods are accepted for SI7868ADP-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI7868ADP-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI7868ADP-T1-E3?
SI7868ADP-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI7868ADP-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI7868ADP-T1-E3?
For technical support, including SI7868ADP-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI7868ADP-T1-E3 requirements.
6.How does Aetrix verify that SI7868ADP-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SI7868ADP-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI7868ADP-T1-E3 meets industry standards.
7.What is the process for return or replacement of SI7868ADP-T1-E3?
All SI7868ADP-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SI7868ADP-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI7868ADP-T1-E3 part is unused and in its original packaging.
Return procedure for SI7868ADP-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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