Vishay Siliconix SIA467EDJ-T1-GE3
- Part No.:
- SIA467EDJ-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SC-70-6
- Datasheet:
-
SIA467EDJ-T1-GE3.pdf
- Description:
- MOSFET P-CH 12V 31A PPAK SC70-6
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIA467EDJ-T1-GE3 from Vishay Siliconix is a P-channel TrenchFET® Power MOSFET in a thermally enhanced PowerPAK® SC-70-6L package, rated for -12 V drain-source voltage, 0.013 Ω RDS(on) at -4.5 VGS, and -31 A continuous drain current at TC = 25 °C. It serves as a high-efficiency load switch or battery disconnect device in portable power management circuits.
For engineers reviewing the SIA467EDJ-T1-GE3 datasheet, SIA467EDJ-T1-GE3 pinout, SIA467EDJ-T1-GE3 application, or SIA467EDJ-T1-GE3 equivalent, key selection criteria include its low gate threshold (-1 V max), 5.3 °C/W junction-to-case thermal resistance, 29 nC total gate charge at -4.5 V drive, and robust 5000 V HBM ESD rating - all critical for compact, battery-powered DC-DC and power-path designs.
Technical Context
This MOSFET employs trench-gate silicon technology optimized for low RDS(on) and fast switching in space-constrained applications. Its gate threshold voltage range of -0.4 V to -1.0 V enables reliable turn-on with low-voltage logic-level control (e.g., 1.8 V or 2.5 V GPIO), while the integrated body diode supports reverse-current blocking in bidirectional power paths.
The PowerPAK SC-70-6L package features exposed-drain thermal pads on three sides and a 2.05 mm × 2.05 mm footprint. Its 6-pin configuration places all three drain terminals (pins 1, 2, 3) electrically common, enabling high-current conduction with minimized parasitic inductance and improved thermal spreading to the PCB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | -12 V - Maximum drain-source blocking voltage for 12 V rail protection and battery-switching applications |
| RDS(on) @ VGS = -4.5 V | 0.013 Ω (max) - Enables ≤ 2.1 W conduction loss at -31 A, supporting high-efficiency load switching |
| ID (continuous, TC = 25 °C) | -31 A - Supports high-current power-path control without external heatsinking under typical board-mount conditions |
| Qg @ VGS = -4.5 V | 29 nC (typ) - Low gate charge reduces driver power demand and enables fast turn-on (<50 ns) with 1 Ω gate resistor |
| RthJC | 5.3 °C/W (typ) - Efficient heat transfer from junction to case allows sustained operation up to 150 °C junction temperature |
| VGS(th) | -0.4 V to -1.0 V - Ensures full enhancement with standard 1.8 V or 2.5 V logic outputs, eliminating need for level shifters |
| EAS | 5.8 mJ - Withstands single-pulse avalanche energy events during inductive load switching or hot-swap transients |
Pinout & Package
Package: PowerPAK® SC-70-6L-Single - 2.05 mm × 2.05 mm leadless surface-mount package with exposed drain copper on bottom and three parallel drain terminals for low-inductance, high-current routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 (D) | Drain | Electrically common high-current output node; connected to internal die drain metallization and bottom thermal pad for optimal power dissipation |
| 4 (G) | Gate | Control input requiring <1 μA leakage; sensitive to ESD but compatible with 1.8 V logic due to low VGS(th) |
| 5, 6 (S) | Source | Common return path for load current; pins 5 and 6 are internally tied to provide dual-source connection for reduced bond-wire inductance |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Delivers ultra-low RDS(on) in sub-3 mm² footprint, enabling higher current density than planar MOSFETs in same package |
| 100 % Rg and UIS tested | Ensures gate resistance consistency and ruggedness against unclamped inductive switching stress in real-world load-dump scenarios |
| 5000 V HBM ESD rating | Eliminates need for external ESD protection in handheld device assembly lines, reducing BOM count and layout area |
| Thermally enhanced PowerPAK SC-70 | Provides 3× lower RthJC vs. standard SC-70 packages, allowing >2× higher continuous current in same PCB area |
| Lead (Pb)-free and Halogen-free | Meets RoHS Directive 2011/65/EU and JEDEC JS709C requirements for environmentally compliant consumer electronics manufacturing |
Applications
| Smartphone Battery Protection | Tablet PC Load Switching |
|---|---|
Use Scenario: Isolating main Li-ion battery from system during shutdown or fault conditions to prevent leakage and preserve standby time. IC Role / Device Role / Timing Role: High-side P-channel MOSFET acting as active battery disconnect switch controlled by PMIC enable signal. Use Value: 0.013 Ω RDS(on) limits voltage drop to <400 mV at 30 A, minimizing impact on battery runtime and thermal rise. | Use Scenario: Enabling/disabling auxiliary power rails (e.g., display backlight, USB-C PD sink) based on system activity state. IC Role / Device Role / Timing Role: Low-threshold load switch driven directly by 1.8 V SoC GPIO without level translation. Use Value: -0.4 V to -1.0 V VGS(th) ensures full turn-on at 1.8 V logic high, eliminating timing uncertainty and startup delay. |
| Mobile Computing Power Management | USB-C Port Power Path Control |
Use Scenario: Managing power delivery between multiple batteries or between battery and USB-C port in dual-input power architectures. IC Role / Device Role / Timing Role: Bidirectional power-path switch leveraging integrated body diode for reverse-current blocking during source/sink transitions. Use Value: -0.75 V to -1.2 V VSD at -10 A ensures minimal forward drop during body-diode conduction, reducing heat generation during transient mode switching. | Use Scenario: Controlling power flow into/out of USB-C port during DRP (dual-role port) operation with dynamic role swapping. IC Role / Device Role / Timing Role: Fast-turning P-channel switch placed in high-side position to isolate VBUS from downstream circuitry during role reversal. Use Value: 29 nC Qg enables <100 ns turn-off with 1 Ω gate resistor, meeting USB-C specification timing for safe VBUS disconnection before role change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiA403DJ-T1-GE3 | RDS(on) = 0.022 Ω @ -4.5 VGS; lower ID = -22 A; same PowerPAK SC-70-6L package | Higher conduction loss at >15 A; suitable where peak current is limited and cost sensitivity is higher | Select when thermal budget allows higher RDS(on) and design prioritizes cost over efficiency at high load currents |
| DMN2020LFG-7 | RDS(on) = 0.015 Ω @ -4.5 VGS; 6-pin TSOP-6 package; slightly larger footprint (3.05 mm × 1.65 mm) | Requires PCB layout revision due to different package outline and pinout; offers comparable performance with wider industry availability | Choose when supply chain diversification is required and board space permits TSOP-6 placement |
Compared with SiA403DJ-T1-GE3 and DMN2020LFG-7, the SIA467EDJ-T1-GE3 delivers the lowest RDS(on) in the smallest footprint, making it optimal for ultra-compact, high-current battery switches where thermal headroom is constrained and layout area is premium.
Availability
SIA467EDJ-T1-GE3 is available at Aetrix Electronics and suitable for smartphone battery protection, tablet PC load switching, and mobile computing power management requiring stable component supply across high-volume production cycles.
Supply support for SIA467EDJ-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in MOSFETs, diodes, and optoelectronics with emphasis on high-reliability, high-efficiency power solutions.
The PowerPAK SC-70 family was developed specifically for space-constrained portable electronics, delivering high-current capability and thermal performance in sub-3 mm² footprints for battery-switching and load-management applications.
FAQ
What is the maximum continuous drain current rating for SIA467EDJ-T1-GE3 at 70 °C case temperature?
The SIA467EDJ-T1-GE3 supports -25 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limitations of the PowerPAK SC-70-6L package under sustained high-power operation, and must be validated against actual PCB copper area and airflow in the final design. The SIA467EDJ-T1-GE3 maintains full functionality within this limit without requiring external heatsinking.
Does SIA467EDJ-T1-GE3 require a gate pull-up resistor in high-side switch configurations?
Yes - the SIA467EDJ-T1-GE3 is a P-channel MOSFET and requires a gate pull-up resistor to VIN (e.g., battery voltage) to maintain OFF-state when the driving signal is floating or low. A typical value is 100 kΩ to minimize quiescent current while ensuring fast turn-off. The SIA467EDJ-T1-GE3's -1.0 V maximum VGS(th) ensures reliable turn-on even with moderate gate resistor values.
Can SIA467EDJ-T1-GE3 be used in synchronous rectification applications?
No - the SIA467EDJ-T1-GE3 is not optimized for synchronous rectification. Its body diode recovery time (trr = 20–40 ns) and Qrr (7–15 nC) are designed for load switching, not high-frequency freewheeling. For synchronous rectification, dedicated low-Qrr MOSFETs with tighter trr distribution and optimized gate charge ratios are recommended. The SIA467EDJ-T1-GE3 remains best suited for DC load switching and battery isolation.
What is the thermal resistance from junction to ambient for SIA467EDJ-T1-GE3 on a 1" × 1" FR4 board?
On a 1" × 1" FR4 board, the SIA467EDJ-T1-GE3 has a maximum RthJA of 36 °C/W (typical 28 °C/W), per the Thermal Resistance Ratings table. This value assumes standard JEDEC test conditions and is highly dependent on PCB copper area, layer count, and via placement beneath the exposed drain pad. The SIA467EDJ-T1-GE3 achieves its lowest thermal impedance when the drain pad is connected to ≥2 oz internal ground/power planes via multiple thermal vias.
Is SIA467EDJ-T1-GE3 suitable for hot-swap applications with inrush current limiting?
Yes - the SIA467EDJ-T1-GE3 supports hot-swap operation when paired with an external gate resistor and RC network to control dV/dt and limit inrush. Its 5.8 mJ single-pulse avalanche energy rating (EAS) provides margin against transient overvoltage during plug-in events. However, the SIA467EDJ-T1-GE3 does not integrate slew-rate control or current limiting, so external circuitry is required to meet Class 2 hot-swap standards.
SIA467EDJ-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SC-70-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 12 V
- Current - Continuous Drain (Id) @ 25°C:
- 31A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 1.8V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 13mOhm @ 5A, 4.5V
- Vgs(th) (Max) @ Id:
- 1V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 72 nC @ 8 V
- Vgs (Max):
- ±8V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2520 pF @ 6 V
- FET Feature:
- -
- Power Dissipation (Max):
- 3.5W (Ta), 19W (Tc)
- Operating Temperature:
- -50°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SC-70-6 Single
SIA467EDJ-T1-GE3 FAQ
1.How can I place an order for SIA467EDJ-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIA467EDJ-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIA467EDJ-T1-GE3 reliable?
The price and inventory of SIA467EDJ-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIA467EDJ-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIA467EDJ-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIA467EDJ-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIA467EDJ-T1-GE3?
SIA467EDJ-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIA467EDJ-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIA467EDJ-T1-GE3?
For technical support, including SIA467EDJ-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIA467EDJ-T1-GE3 requirements.
6.How does Aetrix verify that SIA467EDJ-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIA467EDJ-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIA467EDJ-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIA467EDJ-T1-GE3?
All SIA467EDJ-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIA467EDJ-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIA467EDJ-T1-GE3 part is unused and in its original packaging.
Return procedure for SIA467EDJ-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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