Vishay Siliconix SIDR104AEP-T1-RE3
- Part No.:
- SIDR104AEP-T1-RE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIDR104AEP-T1-RE3.pdf
- Description:
- N-CHANNEL 100 V (D-S) 175C MOSFE
- Quantity:
- Payment:

- Shipping:

Inventory:8,048
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIDR104AEP-T1-RE3 from Vishay Siliconix is an N-channel 100 V, 90.5 A (TC = 25 °C) TrenchFET® Gen IV power MOSFET in PowerPAK® SO-8DC package, featuring RDS(on) = 6.1 mΩ at VGS = 10 V and Qg = 35.1 nC (typ.), optimized for high-efficiency DC/DC converters and synchronous rectification.
For engineers reviewing the SIDR104AEP-T1-RE3 datasheet, SIDR104AEP-T1-RE3 pinout, SIDR104AEP-T1-RE3 application, or SIDR104AEP-T1-RE3 equivalent, this page delivers verified thermal resistance (RthJC = 1.25 °C/W max), avalanche energy rating (EAS = 61 mJ), body diode recovery (trr = 45 ns typ.), and leadless PowerPAK SO-8DC layout guidance for thermal and switching performance validation.
Technical Context
This MOSFET employs trench-based silicon architecture with gate charge optimization targeting low RDS(on) × Qoss figure-of-merit, enabling fast switching with reduced Miller-induced turn-off delay (td(off) = 28 ns typ. at VGEN = 10 V). It supports 175 °C maximum junction temperature and is 100 % Rg and UIS tested.
The device integrates a robust intrinsic body diode with VSD = 0.74 V (typ.) at IS = 5 A and Qrr = 65 nC (typ.), making it suitable for hard-switched and synchronous rectifier topologies where reverse recovery behavior directly impacts efficiency and EMI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Supports primary-side switching in 48 V input DC/DC and offline auxiliary supplies without derating. |
| RDS(on) max @ 10 V | 6.1 mΩ - Enables <1.4 W conduction loss at 90.5 A (TC = 25 °C), critical for high-current power stages. |
| Qg typ. | 35.1 nC - Low gate charge reduces driver power demand and enables >1 MHz operation with moderate gate resistance. |
| ID continuous @ TC = 25 °C | 90.5 A - Rated for high-current output stages in server VRMs and industrial motor drives with external heatsinking. |
| RthJC max | 1.25 °C/W - Confirmed thermal path from junction to drain pad enables precise thermal modeling for double-sided cooling layouts. |
| EAS | 61 mJ - Avalanche-rated for unclamped inductive switching events in motor control and relay drive circuits. |
| trr typ. | 45 ns - Fast body diode recovery minimizes shoot-through risk and switching losses in synchronous buck converters. |
Pinout & Package
Package: PowerPAK® SO-8DC - Leadless, double-cooling surface-mount package with exposed drain paddle on bottom and gate/source terminals on top side; requires controlled reflow per JEDEC J-STD-020, peak 260 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source terminals reduce source inductance and improve current sharing in high-di/dt applications. |
| 5, 6, 7, 8 | Drain (D) | Exposed drain paddle (bottom side) provides primary thermal path and high-current return; electrically tied to pins 5–8. |
| 4 | Gate (G) | Single gate terminal located adjacent to source; layout must minimize loop inductance between gate driver and G/S nodes. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV process | Delivers industry-leading RDS(on) × Qoss FOM for improved hard-switching efficiency in 100 V-class MOSFETs. |
| 100 % Rg and UIS tested | Ensures gate resistance consistency and ruggedness against unclamped inductive switching stress in production units. |
| PowerPAK SO-8DC double-cooling | Enables simultaneous top-side gate access and bottom-side drain thermal coupling-ideal for compact, high-power-density PCBs. |
| 175 °C rated junction temperature | Supports operation in harsh environments (e.g., automotive under-hood, industrial motor drives) without thermal derating penalties. |
| Low Qgd/Qg ratio (≈0.2) | Reduces Miller plateau duration, improving controllability during turn-off and mitigating cross-conduction in synchronous topologies. |
Applications
| Synchronous Rectifier in Isolated DC/DC | Primary-Side Switch in LLC Resonant Converter |
|---|---|
|
Use Scenario: Used as secondary-side switch in 48 V–12 V isolated DC/DC converters for telecom and server power supplies. IC Role / Device Role / Timing Role: Replaces Schottky diode to reduce forward voltage drop and conduction loss during synchronous rectification phase. Use Value: Achieves >1.2 % efficiency gain over 60 V Schottky at 60 A load due to 6.1 mΩ RDS(on) and 0.74 V VSD. |
Use Scenario: High-side switch in 300–400 V input LLC resonant converters for data center PSUs. IC Role / Device Role / Timing Role: Primary-side power switch operating in zero-voltage switching (ZVS) mode with hard commutation during startup. Use Value: 61 mJ EAS rating withstands startup surge currents; 45 ns trr prevents false turn-on during dead-time. |
| Motor Drive Half-Bridge Leg | Battery Protection Load Switch |
|
Use Scenario: Low-side switch in 24–48 V BLDC motor inverters for industrial automation and e-mobility subsystems. IC Role / Device Role / Timing Role: Provides PWM-controlled current path with fast fall time (tf = 8 ns typ.) for precise torque regulation. Use Value: 90.5 A continuous rating supports 3 kW motor drive at TC = 70 °C; 175 °C TJ(max) allows compact heatsink design. |
Use Scenario: Main battery disconnect switch in 48 V mild-hybrid automotive systems and UPS backup modules. IC Role / Device Role / Timing Role: High-current, low-RDS(on) load switch controlling power delivery to downstream safety-critical loads. Use Value: 6.1 mΩ RDS(on) limits voltage drop to <0.55 V at 90 A, minimizing thermal rise and enabling compact PCB copper area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 100 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Infineon IPP040N10N5 | RDS(on) = 4.0 mΩ @ 10 V, Qg = 52 nC, TO-220 package | Higher gate charge increases driver loss; through-hole mounting limits board-level power density | Preferred when higher current derating margin is needed and thermal mass of TO-220 is acceptable |
| ON Semiconductor NTMFS5C673NL | RDS(on) = 6.7 mΩ @ 10 V, Qg = 31 nC, PowerTrench® 5x6 mm package | Lower Qg improves switching speed but higher RDS(on) increases conduction loss by ~10 % at full load | Selected when gate drive capability is constrained and slightly lower efficiency is acceptable for cost-sensitive designs |
Compared with IPP040N10N5 and NTMFS5C673NL, SIDR104AEP-T1-RE3 offers best-in-class RDS(on) × Qg balance and double-cooling thermal architecture-enabling higher power density in space-constrained, air-cooled applications where both conduction and switching losses must be minimized simultaneously.
Availability
SIDR104AEP-T1-RE3 is available at Aetrix Electronics and suitable for high-current DC/DC converters, synchronous rectifiers, and motor drive control requiring stable component supply and long-term industrial lifecycle support.
Supply support for SIDR104AEP-T1-RE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on ruggedness, efficiency, and thermal reliability.
The SIDR104AEP-T1-RE3 belongs to Vishay's TrenchFET® Gen IV family-engineered specifically for high-frequency, high-current power conversion in server, telecom, and industrial motor control applications.
FAQ
What is the maximum continuous drain current rating for SIDR104AEP-T1-RE3 at case temperature of 70 °C?
The SIDR104AEP-T1-RE3 supports 75.7 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating reflects thermal limitation under steady-state conditions with adequate heatsinking and accounts for RDS(on) increase with junction temperature. Derating curves in the datasheet confirm linear reduction from 90.5 A at 25 °C to 75.7 A at 70 °C.
Does SIDR104AEP-T1-RE3 have integrated avalanche ruggedness, and what is its rated single-pulse energy?
Yes, SIDR104AEP-T1-RE3 is 100 % UIS (unclamped inductive switching) tested and rated for 61 mJ single-pulse avalanche energy (EAS) with L = 0.1 mH. This specification ensures reliable operation during transient overcurrent events such as motor stall or short-circuit fault conditions without requiring external snubbers in many applications.
What is the gate-source threshold voltage range for SIDR104AEP-T1-RE3, and how does it vary with temperature?
The gate-source threshold voltage (VGS(th)) for SIDR104AEP-T1-RE3 is specified from 2 V to 4 V at TJ = 25 °C, with a negative temperature coefficient of −8 mV/°C. This means VGS(th) decreases as junction temperature rises-critical for ensuring turn-on margin across the full −55 °C to +175 °C operating range.
Can SIDR104AEP-T1-RE3 be used in synchronous rectification topologies, and what body diode parameters support this use?
Yes, SIDR104AEP-T1-RE3 is qualified for synchronous rectification. Its body diode features VSD = 0.74 V (typ.) at IS = 5 A and fast reverse recovery with trr = 45 ns (typ.) and Qrr = 65 nC (typ.), minimizing conduction loss and reducing switching node ringing compared to discrete Schottky solutions.
What is the recommended PCB pad layout for the PowerPAK SO-8DC package of SIDR104AEP-T1-RE3?
Vishay recommends using the pad dimensions documented in Application Note AN826: 4.42 mm × 6.61 mm for the main drain paddle, with 0.61 mm wide thermal vias spaced ≤1.27 mm apart beneath the paddle. Source and gate pads follow standard SO-8 footprint spacing; solder mask defined (SMD) stencil apertures are advised to prevent bridging on the leadless terminals.
SIDR104AEP-T1-RE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen IV
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 21.1A (Ta), 90.5A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 7.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 6.1mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 70 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3250 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 6.5W (Ta), 120W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8DC
SIDR104AEP-T1-RE3 FAQ
1.How can I place an order for SIDR104AEP-T1-RE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIDR104AEP-T1-RE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIDR104AEP-T1-RE3 reliable?
The price and inventory of SIDR104AEP-T1-RE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIDR104AEP-T1-RE3 is usually 5 days.
3.What payment methods are accepted for SIDR104AEP-T1-RE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIDR104AEP-T1-RE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIDR104AEP-T1-RE3?
SIDR104AEP-T1-RE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIDR104AEP-T1-RE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIDR104AEP-T1-RE3?
For technical support, including SIDR104AEP-T1-RE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIDR104AEP-T1-RE3 requirements.
6.How does Aetrix verify that SIDR104AEP-T1-RE3 is sourced from the original manufacturer or authorized distributors?
All SIDR104AEP-T1-RE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIDR104AEP-T1-RE3 meets industry standards.
7.What is the process for return or replacement of SIDR104AEP-T1-RE3?
All SIDR104AEP-T1-RE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIDR104AEP-T1-RE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIDR104AEP-T1-RE3 part is unused and in its original packaging.
Return procedure for SIDR104AEP-T1-RE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIDR104AEP-T1-RE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

