Vishay Siliconix SIDR140DP-T1-RE3
- Part No.:
- SIDR140DP-T1-RE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIDR140DP-T1-RE3.pdf
- Description:
- N-CHANNEL 25-V (D-S) MOSFET
- Quantity:
- Payment:

- Shipping:

Inventory:2,998
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Product details
Overview
SIDR140DP-T1-RE3 from Vishay Siliconix is an N-channel 25 V TrenchFET® Gen IV power MOSFET in PowerPAK® SO-8DC package, delivering RDS(on) = 0.67 mΩ at VGS = 10 V and 0.90 mΩ at VGS = 4.5 V, with 100 A continuous drain current (TC = 25 °C) and optimized gate charge (Qg = 52.8 nC typ. at 4.5 V) for high-efficiency synchronous rectification in DC/DC converters.
For engineers reviewing the SIDR140DP-T1-RE3 datasheet, SIDR140DP-T1-RE3 pinout, SIDR140DP-T1-RE3 application, or SIDR140DP-T1-RE3 equivalent, this device supports top-side cooling, features 100% Rg and UIS testing, and targets high-power-density buck converters where low conduction loss and fast switching are critical.
Technical Context
This MOSFET employs TrenchFET® Gen IV process technology to achieve ultra-low RDS(on) while maintaining robust avalanche capability (EAS = 180 mJ) and tight Qgd/Qgs ratio for reduced switching loss. Its gate threshold voltage (VGS(th) = 1.0–2.1 V) enables reliable 4.5 V logic-level drive.
The PowerPAK® SO-8DC package integrates exposed-drain and exposed-source thermal pads on the bottom side and a top-side copper pad for dual-sided cooling-enabling junction-to-case thermal resistance as low as 0.8 °C/W (drain) and 1.1 °C/W (source)-critical for thermally constrained high-current applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 25 V - Maximum drain-source blocking voltage; suitable for 12 V and 24 V input systems with margin. |
| RDS(on) @ 10 V | 0.67 mΩ max - Enables <1 W conduction loss at 100 A, minimizing heat generation in high-current paths. |
| RDS(on) @ 4.5 V | 0.90 mΩ max - Ensures full enhancement with standard 5 V logic or controller outputs without level-shifting. |
| Qg @ 4.5 V | 52.8 nC typ. - Low gate charge reduces driver power demand and enables efficient operation at >1 MHz switching frequencies. |
| ID (continuous) | 100 A @ TC = 25 °C - Supports high-current synchronous rectifier legs in server VRMs and telecom power supplies. |
| Qgd/Qgs ratio | Optimized per datasheet - Minimizes Miller-induced switching delay and dv/dt-induced turn-on risk in hard-switched topologies. |
| EAS | 180 mJ - Robust single-pulse avalanche rating ensures reliability during transient overvoltage events like load dump. |
Pinout & Package
Package: PowerPAK® SO-8DC - leadless, double-cooling surface-mount package with exposed drain (pins 5–8) and exposed source (pins 1–3) on bottom side, plus top-side thermal pad for enhanced heat dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Internally connected source terminals; bottom-side exposed copper for low-inductance, high-current return path and thermal conduction to PCB. |
| 4 | Gate (G) | Control input; low gate resistance (Rg = 0.38 Ω typ.) minimizes ringing and eases gate driver design. |
| 5, 6, 7, 8 | Drain (D) | Internally connected drain terminals; bottom-side exposed copper serves as primary thermal interface to heatsink or power plane. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV process | Delivers industry-leading RDS(on) × area efficiency, enabling smaller PCB footprints without sacrificing current handling. |
| Top-side cooling capability | Integrated top-side thermal pad allows direct contact with heatsink or thermal interface material-doubling effective thermal transfer vs. standard SO-8. |
| 100% Rg and UIS tested | Ensures gate robustness against ESD and system-level transients, eliminating field failures due to gate oxide rupture or avalanche overstress. |
| Optimized Qgd/Qgs ratio | Reduces Miller plateau duration and improves controllability during commutation-critical for ZVS and high-frequency synchronous rectification. |
| Lead (Pb)-free and halogen-free | Complies with RoHS Directive 2011/65/EU and JEDEC JS709B, supporting environmentally compliant manufacturing and end-of-life recycling. |
Applications
| Synchronous Buck Converter | OR-ing Circuit |
|---|---|
Use Scenario: Primary high-side or synchronous rectifier switch in 48 V–12 V intermediate bus converter for AI accelerators. IC Role / Device Role / Timing Role: High-current, low-RDS(on) power switch operating at 500 kHz–1 MHz with precise dead-time control. Use Value: 0.67 mΩ RDS(on) cuts conduction loss by >35% vs. legacy 1.2 mΩ devices, directly improving system efficiency from 92% to 94.5% at 80 A load. | Use Scenario: Back-to-back configuration in redundant 12 V power supply modules for industrial PLCs. IC Role / Device Role / Timing Role: Bidirectional load switch enabling seamless switchover between active and standby rails with minimal forward voltage drop. Use Value: VSD = 0.69 V typ. at 5 A reduces OR-ing diode conduction loss by 60% versus Schottky solutions, lowering thermal stress on board-level heatsinks. |
| Battery Management System | High-Power Density DC/DC |
Use Scenario: Charge/discharge FET in 48 V LiFePO4 battery pack for energy storage systems. IC Role / Device Role / Timing Role: High-current bidirectional switch protecting against overcurrent, short-circuit, and reverse polarity with fast fault response. Use Value: 100% UIS tested and 60 A IAS rating ensure survivability during 500 A short-circuit events, eliminating need for external fusing. | Use Scenario: Secondary-side synchronous rectifier in isolated 3 kW telecom rectifier with GaN primary. IC Role / Device Role / Timing Role: Low-Qg, low-RDS(on) rectifier enabling >97% peak efficiency at 200 kHz switching frequency. Use Value: 52.8 nC Qg at 4.5 V allows use of low-cost integrated gate drivers (e.g., UCC27531), reducing BOM count and layout complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRL1404ZPBF | RDS(on) = 3.4 mΩ @ 10 V; TO-220 package; no top-side cooling; Qg = 65 nC | Higher conduction loss, limited thermal performance, unsuitable for >50 A continuous operation in compact layouts | Select only when cost sensitivity outweighs efficiency and thermal constraints; requires larger heatsink and PCB area. |
| SIDR140DP-T1-GE3 | Identical die and specs; differs only in halogen-free compliance marking (GE3 vs. RE3); same PowerPAK SO-8DC package and pinout | No functional or application difference; both rated for identical operating conditions and thermal profiles | GE3 is functionally interchangeable with RE3; choice depends solely on regional environmental compliance requirements (e.g., China RoHS vs. EU RoHS). |
Compared with IRL1404ZPBF, SIDR140DP-T1-RE3 delivers 5× lower RDS(on) and dual-sided cooling for 2.5× higher power density; versus SIDR140DP-T1-GE3, it offers identical electrical and thermal performance with alternate halogen-free certification-making RE3 the preferred choice for EU-compliant designs requiring traceable material declarations.
Availability
SIDR140DP-T1-RE3 is available at Aetrix Electronics and suitable for synchronous buck converters, OR-ing circuits, battery management systems, and high-power-density DC/DC applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SIDR140DP-T1-RE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, reliability, and miniaturization.
The PowerPAK® SO-8DC product line was engineered specifically for high-current, high-efficiency power conversion in space-constrained applications such as server VRMs, telecom rectifiers, and battery-powered industrial equipment-prioritizing thermal performance and switching efficiency over legacy package form factors.
FAQ
What is the maximum continuous drain current rating for SIDR140DP-T1-RE3 at 70 °C case temperature?
The SIDR140DP-T1-RE3 supports 100 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating assumes proper PCB thermal design with adequate copper area and thermal vias under the exposed drain and source pads to maintain case temperature at or below 70 °C under steady-state operation.
Does SIDR140DP-T1-RE3 require a gate resistor for stable switching in a 1 MHz synchronous buck converter?
Yes, SIDR140DP-T1-RE3 benefits from an external gate resistor (typically 1–5 Ω) to dampen ringing and control dV/dt during hard switching. Its low gate resistance (Rg = 0.38 Ω typ.) and high Qg make it susceptible to oscillation without proper gate drive impedance matching-especially at 1 MHz where parasitic inductance dominates.
Can SIDR140DP-T1-RE3 be used in a back-to-back configuration for reverse polarity protection?
Yes, SIDR140DP-T1-RE3 is suitable for reverse polarity protection in back-to-back configuration due to its symmetric RDS(on) behavior and 100% UIS testing. Its VGS(th) range (1.0–2.1 V) ensures reliable turn-on with standard 3.3 V or 5 V control signals, and its body diode VSD = 0.69 V typ. minimizes forward drop during fault conditions.
What is the thermal resistance from junction to ambient (RthJA) for SIDR140DP-T1-RE3 on a standard 1" × 1" FR4 board?
Per the datasheet note b, the SIDR140DP-T1-RE3 exhibits RthJA = 15 °C/W typical and 20 °C/W maximum when mounted on a 1" × 1" FR4 board with 2 oz copper. This value assumes standard solder paste reflow and no additional heatsinking-actual performance improves significantly with thermal vias and internal copper planes.
Is SIDR140DP-T1-RE3 compatible with lead-free reflow profiles per IPC/JEDEC J-STD-020?
Yes, SIDR140DP-T1-RE3 is qualified for lead-free reflow with peak temperature up to 260 °C, as stated in the Absolute Maximum Ratings section. It complies with IPC/JEDEC J-STD-020D moisture sensitivity level (MSL) 1, requiring no baking prior to assembly when stored per Vishay's packaging specifications.
SIDR140DP-T1-RE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen IV
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 25 V
- Current - Continuous Drain (Id) @ 25°C:
- 79A (Ta), 100A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 0.67mOhm @ 20A, 10V
- Vgs(th) (Max) @ Id:
- 2.1V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 170 nC @ 10 V
- Vgs (Max):
- +20V, -16V
- Input Capacitance (Ciss) (Max) @ Vds:
- 8150 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 6.25W (Ta), 125W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8DC
SIDR140DP-T1-RE3 FAQ
1.How can I place an order for SIDR140DP-T1-RE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIDR140DP-T1-RE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIDR140DP-T1-RE3 reliable?
The price and inventory of SIDR140DP-T1-RE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIDR140DP-T1-RE3 is usually 5 days.
3.What payment methods are accepted for SIDR140DP-T1-RE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIDR140DP-T1-RE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIDR140DP-T1-RE3?
SIDR140DP-T1-RE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIDR140DP-T1-RE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIDR140DP-T1-RE3?
For technical support, including SIDR140DP-T1-RE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIDR140DP-T1-RE3 requirements.
6.How does Aetrix verify that SIDR140DP-T1-RE3 is sourced from the original manufacturer or authorized distributors?
All SIDR140DP-T1-RE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIDR140DP-T1-RE3 meets industry standards.
7.What is the process for return or replacement of SIDR140DP-T1-RE3?
All SIDR140DP-T1-RE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIDR140DP-T1-RE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIDR140DP-T1-RE3 part is unused and in its original packaging.
Return procedure for SIDR140DP-T1-RE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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