Vishay Siliconix SIE812DF-T1-E3
- Part No.:
- SIE812DF-T1-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- 10-PolarPAK® (L)
- Datasheet:
-
SIE812DF-T1-E3.pdf
- Description:
- MOSFET N-CH 40V 60A 10POLARPAK
- Quantity:
- Payment:

- Shipping:

Inventory:8,333
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Product details
Overview
SIE812DF-T1-E3 from Vishay Siliconix is an N-channel 40-V (D-S) TrenchFET® Gen II Power MOSFET in a PolarPAK® package, delivering RDS(on) = 0.0026 Ω at VGS = 10 V, 163-A silicon-limited continuous drain current (TJ = 150 °C), and 52-nC total gate charge at VGS = 4.5 V. It serves as a low-side switch in high-efficiency DC/DC converters and synchronous rectifiers for VRM applications.
For engineers reviewing the SIE812DF-T1-E3 datasheet, SIE812DF-T1-E3 pinout, SIE812DF-T1-E3 application, or SIE812DF-T1-E3 equivalent, key selection criteria include its ultra-low thermal resistance (RthJC = 0.8 °C/W to drain top), double-sided cooling capability, and low Qgd/Qgs ratio optimized to prevent shoot-through in high-frequency switching circuits.
Technical Context
This MOSFET employs trench-based silicon architecture with a leadframe-based PolarPAK® package where the top surface connects directly to pins 1, 5, 6, and 10 (drain terminals), enabling efficient double-sided thermal management. Its gate threshold voltage (VGS(th)) ranges from 1.5 V to 3.0 V, and it features 100% Rg and UIS testing per production lot.
The device supports fast switching with td(on) = 20–30 ns and tf = 10–15 ns under 10-V gate drive, while its body diode exhibits VSD = 0.8–1.2 V at IS = 10 A and trr = 50–75 ns, making it suitable for synchronous rectification where reverse recovery performance impacts efficiency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 40 V - Maximum drain-source blocking voltage for low-voltage power stages |
| RDS(on) | 0.0026 Ω @ VGS = 10 V - Enables <1 W conduction loss at 25 A, critical for high-current VRM output stages |
| ID (Silicon Limit) | 163 A @ TJ = 150 °C - Defines maximum safe current handling before thermal runaway |
| Qg | 52 nC @ VGS = 4.5 V - Determines gate driver power requirement and switching speed in 5-V control systems |
| RthJC (Drain) | 0.8 °C/W (typ.) - Allows direct heatsinking to PCB copper or external cooler via top-side drain connection |
| VGS(th) | 1.5–3.0 V - Ensures reliable turn-on with standard logic-level gate drivers |
| Ciss | 8300 pF @ VDS = 20 V - Impacts gate drive energy and EMI behavior in hard-switched topologies |
Pinout & Package
PolarPAK® Option L package: 10-terminal leadless surface-mount device with top-side drain terminals (pins 1, 5, 6, 10) and bottom-side source/gate connections. Dimensions: 6.15 mm × 5.16 mm × 0.80 mm (L × W × H). Thermal path optimized for double-sided cooling.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 5, 6, 10 | Drain (D) | Top-surface exposed copper pads - primary thermal and current path to heatsink or PCB copper pour |
| 2, 3, 7, 8, 9 | Source (S) | Bottom-side terminals - connect to ground plane for low-inductance return path and thermal dissipation |
| 4 | Gate (G) | Single bottom-side gate input - requires controlled impedance routing to minimize ringing and EMI |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low RthJC (Drain) | 0.8 °C/W enables >100 W power dissipation with minimal temperature rise when top-cooled |
| Low Qgd/Qgs ratio | Reduces Miller-induced shoot-through risk during hard commutation in synchronous buck converters |
| 100% Rg and UIS tested | Ensures consistent gate resistance and ruggedness against unclamped inductive switching stress |
| TrenchFET® Gen II silicon | Delivers superior RDS(on) × Qg figure-of-merit for high-frequency, high-efficiency operation |
| Halogen-free & RoHS-compliant | Meets IEC 61249-2-21 and EU Directive 2002/95/EC for environmentally regulated end equipment |
Applications
| VRM Output Stage | DC/DC Low-Side Switch |
|---|---|
Use Scenario: High-current CPU/GPU voltage regulation module delivering up to 200 A at ≤1.2 V. IC Role / Device Role / Timing Role: Low-side synchronous rectifier MOSFET operating at 300–1000 kHz with precise dead-time control. Use Value: 0.0026 Ω RDS(on) minimizes conduction loss, while 52-nC Qg enables efficient 5-V gate driving without excessive driver losses. | Use Scenario: 12 V-to-1.2 V point-of-load converter in telecom base station power supplies. IC Role / Device Role / Timing Role: Primary low-side switch in a synchronous buck topology with forced continuous conduction mode. Use Value: Double-sided cooling via PolarPAK® top/bottom terminals maintains TJ < 125 °C under full load, improving system reliability. |
| Synchronous Rectification | High-Current Motor Drive Half-Bridge |
Use Scenario: Secondary-side rectification in isolated 48 V-to-12 V DC/DC converters for data center servers. IC Role / Device Role / Timing Role: Active rectifier replacing Schottky diodes to reduce forward voltage drop and improve efficiency. Use Value: Body diode trr = 50–75 ns and Qrr = 65–100 nC enable clean commutation with minimal voltage overshoot during synchronous gate timing. | Use Scenario: Low-side switch in a 40 V, 100 A industrial BLDC motor inverter half-bridge stage. IC Role / Device Role / Timing Role: High-current switching element subjected to repetitive UIS events during motor phase commutation. Use Value: 100% UIS-tested robustness ensures survival under inductive load switching transients up to 50 A avalanche current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF7853TRPBF | RDS(on) = 0.0028 Ω @ 10 V; Qg = 62 nC; SO-8 package with single-sided cooling | Limited to ~60 A continuous due to higher RthJA (40 °C/W); unsuitable for double-sided thermal management | Select when board space constraints favor SO-8 and thermal budget allows higher junction temperature rise |
| NTMFS4C09NT1G | RDS(on) = 0.0025 Ω @ 10 V; Qg = 49 nC; PowerSO-8 package with top-side drain but no dedicated thermal pad | Lower gate charge improves switching efficiency but lacks PolarPAK®'s dual thermal interface for high-power density designs | Prefer for 48 V input systems requiring tighter gate charge control, but verify thermal margin without top-side heatsinking |
Compared with IRF7853TRPBF and NTMFS4C09NT1G, the SIE812DF-T1-E3 provides superior thermal performance via its top-exposed drain and lower RthJC, enabling higher sustained current in compact VRM and server power modules where double-sided cooling is implemented.
Availability
SIE812DF-T1-E3 is available at Aetrix Electronics and suitable for VRM output stages, DC/DC low-side switching, and synchronous rectification applications requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for SIE812DF-T1-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability power MOSFETs, diodes, and optoelectronics for industrial, computing, and automotive markets.
The PolarPAK® product line was engineered specifically for high-current, high-efficiency power conversion systems demanding ultra-low thermal resistance and double-sided thermal management - exemplified by the SIE812DF-T1-E3's top-exposed drain architecture.
FAQ
What is the maximum continuous drain current rating for SIE812DF-T1-E3 at TC = 25 °C?
The SIE812DF-T1-E3 has a silicon-limited continuous drain current of 163 A at TJ = 150 °C and TC = 25 °C. However, the package-limited rating is 60 A under the same conditions, meaning thermal design must ensure case temperature remains low enough to avoid exceeding this limit. The SIE812DF-T1-E3 datasheet specifies both values to guide layout and heatsinking decisions.
Does SIE812DF-T1-E3 support logic-level gate drive?
Yes, the SIE812DF-T1-E3 has a gate threshold voltage (VGS(th)) ranging from 1.5 V to 3.0 V, allowing full enhancement with standard 3.3 V or 5 V logic-level gate drivers. Its RDS(on) = 0.0034 Ω at VGS = 4.5 V confirms strong conduction under logic-level drive, making the SIE812DF-T1-E3 well-suited for modern controller ICs without dedicated high-side gate drivers.
How is thermal management implemented in the SIE812DF-T1-E3 PolarPAK® package?
The SIE812DF-T1-E3 uses a PolarPAK® Option L package where pins 1, 5, 6, and 10 are top-surface drain terminals - directly solderable to a heatsink or thermal pad on the PCB top layer. Simultaneously, source terminals (pins 2, 3, 7, 8, 9) on the bottom provide a second thermal path to internal copper planes. This dual-path design achieves RthJC = 0.8 °C/W (drain) and enables double-sided cooling in the SIE812DF-T1-E3.
Is SIE812DF-T1-E3 halogen-free and RoHS-compliant?
Yes, the SIE812DF-T1-E3 is both halogen-free per IEC 61249-2-21 and compliant with the EU RoHS Directive 2002/95/EC. The "-E3" suffix explicitly denotes lead-free and halogen-free construction. This compliance is verified per production lot and documented in Vishay's official specification sheet for the SIE812DF-T1-E3.
What is the body diode reverse recovery performance of SIE812DF-T1-E3?
The SIE812DF-T1-E3 body diode exhibits trr = 50–75 ns and Qrr = 65–100 nC at IF = 10 A, dI/dt = 100 A/µs, and TJ = 25 °C. These parameters are measured and guaranteed, supporting clean commutation in synchronous rectification. The SIE812DF-T1-E3's low Qrr reduces switching loss and voltage spikes compared to standard MOSFETs in high-frequency DC/DC applications.
SIE812DF-T1-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- 10-PolarPAK® (L)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 40 V
- Current - Continuous Drain (Id) @ 25°C:
- 60A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 2.6mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 3V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 170 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 8300 pF @ 20 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5.2W (Ta), 125W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-PolarPAK® (L)
SIE812DF-T1-E3 FAQ
1.How can I place an order for SIE812DF-T1-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIE812DF-T1-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIE812DF-T1-E3 reliable?
The price and inventory of SIE812DF-T1-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIE812DF-T1-E3 is usually 5 days.
3.What payment methods are accepted for SIE812DF-T1-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIE812DF-T1-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIE812DF-T1-E3?
SIE812DF-T1-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIE812DF-T1-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIE812DF-T1-E3?
For technical support, including SIE812DF-T1-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIE812DF-T1-E3 requirements.
6.How does Aetrix verify that SIE812DF-T1-E3 is sourced from the original manufacturer or authorized distributors?
All SIE812DF-T1-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIE812DF-T1-E3 meets industry standards.
7.What is the process for return or replacement of SIE812DF-T1-E3?
All SIE812DF-T1-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SIE812DF-T1-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIE812DF-T1-E3 part is unused and in its original packaging.
Return procedure for SIE812DF-T1-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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