Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Vishay Siliconix SIE818DF-T1-GE3

Name: SIE818DF-T1-GE3
Brand: Vishay Siliconix
SKU: SIE818DF-T1-GE3
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SIE818DF-T1-GE3

Manufacturer:: Vishay Siliconix

Category:: FETs, MOSFETs

Package:: 10-PolarPAK® (L)

Datasheet:: SIE818DF-T1-GE3.pdf

Description:: MOSFET N-CH 75V 60A 10POLARPAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,730

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SIE818DF-T1-GE3 from Vishay Siliconix is an N-channel 75 V (D-S) TrenchFET® power MOSFET in PolarPAK® package, delivering R_DS(on) = 0.0095 Ω at V_GS = 10 V and 0.0125 Ω at V_GS = 4.5 V, with 60 A package-limited continuous drain current and ultra-low thermal resistance for double-sided cooling in high-efficiency primary-side switch and half-bridge applications.

For engineers reviewing the SIE818DF-T1-GE3 datasheet, SIE818DF-T1-GE3 pinout, SIE818DF-T1-GE3 application, or SIE818DF-T1-GE3 equivalent, this page provides verified device identity, validated PolarPAK® terminal mapping, confirmed thermal performance (R_thJC(drain) = 0.8 °C/W), exact gate charge profile (Q_g = 33 nC typ. at 4.5 V), and real-world alternative part comparisons for synchronous rectification and DC-DC converter design.

Technical Context

This MOSFET employs trench-gate silicon technology optimized for low conduction loss and fast switching in hard-switched topologies. Its low Q_gd/Q_gs ratio mitigates shoot-through risk in bridge configurations, and it is 100% tested for gate resistance (R_g = 0.95–1.5 Ω) and unclamped inductive switching (UIS) robustness.

The PolarPAK® package features a leadframe-based encapsulation with top-exposed drain terminals (pins 1, 5, 6, 10) enabling direct thermal interface to heatsinks on both PCB sides, while maintaining die isolation and consistent layout across die sizes - critical for scalable power stage designs.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	75 V - Maximum blocking voltage suitable for 48 V input bus and 60 V transient clamping in telecom and industrial SMPS
R_DS(on) max @ 10 V	0.0095 Ω - Enables <1 W conduction loss at 32 A, reducing thermal load in high-current primary switches
R_DS(on) max @ 4.5 V	0.0125 Ω - Ensures reliable turn-on with standard 5 V gate drivers in logic-level control circuits
Q_g typ. @ 4.5 V	33 nC - Low gate charge supports efficient 500 kHz+ switching in LLC resonant converters
I_D (package limit)	60 A - Package-rated continuous current under TC = 25 °C, defined by thermal limits of PolarPAK® copper frame
R_thJC (drain)	0.8 °C/W - Ultra-low junction-to-case thermal resistance enables direct top-side heatsinking without thermal vias
V_GS(th)	1.5–3.0 V - Tight threshold range ensures predictable turn-on behavior across temperature and process variation

Pinout & Package

PolarPAK® package: 10-terminal leadless surface-mount package with top-exposed drain pads (pins 1, 5, 6, 10), bottom-side source and gate connections, and no exposed die - designed for double-sided cooling and high-power density layouts.

Pin/Terminal	Circuit Role	Design Meaning
1, 5, 6, 10	Drain (D)	Top-exposed copper pads electrically and thermally connected to drain; enable direct thermal interface to heatsink or copper plane
2, 9	Gate (G)	Low-inductance gate inputs; pin 2 is marked with dot per package drawing; dual gate pins reduce drive loop inductance
3, 4, 7, 8	Source (S)	Bottom-side source terminals; provide low-impedance return path and thermal conduction to PCB ground plane

Key Features

Feature	Design Value
TrenchFET® silicon architecture	Delivers industry-leading R_DS(on) × Q_g figure-of-merit for reduced switching + conduction losses in high-frequency SMPS
PolarPAK® double-sided cooling	Enables simultaneous thermal management via top heatsink and bottom PCB copper, lowering system thermal resistance by >40 % vs. SO-8
Low Q_gd/Q_gs ratio	Improves Miller immunity and reduces risk of cross-conduction in half-bridge and full-bridge configurations
100 % R_g and UIS tested	Guarantees gate resistance consistency and avalanche ruggedness for reliable operation under inductive load transients
Lead (Pb)-free and halogen-free	Meets RoHS 2011/65/EU and JEDEC JS709E requirements without compromising thermal or electrical performance

Applications

Primary Side Switch	Half-Bridge Topology
Use Scenario: High-efficiency flyback or forward converter primary switch in 48 V telecom power supplies. IC Role / Device Role / Timing Role: Main power switching element handling full input voltage and peak current during PWM on-time. Use Value: 0.0095 Ω R_DS(on) at 10 V reduces conduction loss by ~25 % versus comparable 8 mΩ SO-8 MOSFETs, improving full-load efficiency by 0.8–1.2 %.	Use Scenario: Upper switch in isolated DC-DC half-bridge converter for server VRMs. IC Role / Device Role / Timing Role: High-side switching transistor synchronized with lower switch; requires fast turn-off and low Q_gd to avoid shoot-through. Use Value: 33 nC Q_g at 4.5 V and low Q_gd/Q_gs ratio enable clean 300 ns turn-off delay and 10 ns fall time, supporting 1 MHz operation.
Synchronous Rectification	Motor Drive Half-Bridge
Use Scenario: Secondary-side synchronous rectifier in 12 V output LLC resonant converter. IC Role / Device Role / Timing Role: Low-V_DS switch replacing Schottky diode; driven by transformer-coupled or active gate control. Use Value: 0.0125 Ω R_DS(on) at 4.5 V ensures <0.25 V forward drop at 20 A, cutting rectifier loss by >60 % vs. 40 V Schottky.	Use Scenario: High-current half-bridge leg in 24 V BLDC motor driver for industrial automation. IC Role / Device Role / Timing Role: Power stage switch controlling phase current direction and magnitude; subject to repetitive avalanche stress. Use Value: 50 A single-pulse avalanche current rating and 125 mJ E_AS withstand capability ensure robustness against inductive kickback during commutation.

Primary Side Switch

Half-Bridge Topology

Use Scenario: High-efficiency flyback or forward converter primary switch in 48 V telecom power supplies.

IC Role / Device Role / Timing Role: Main power switching element handling full input voltage and peak current during PWM on-time.

Use Value: 0.0095 Ω R_DS(on) at 10 V reduces conduction loss by ~25 % versus comparable 8 mΩ SO-8 MOSFETs, improving full-load efficiency by 0.8–1.2 %.

Use Scenario: Upper switch in isolated DC-DC half-bridge converter for server VRMs.

IC Role / Device Role / Timing Role: High-side switching transistor synchronized with lower switch; requires fast turn-off and low Q_gd to avoid shoot-through.

Use Value: 33 nC Q_g at 4.5 V and low Q_gd/Q_gs ratio enable clean 300 ns turn-off delay and 10 ns fall time, supporting 1 MHz operation.

Synchronous Rectification

Motor Drive Half-Bridge

Use Scenario: Secondary-side synchronous rectifier in 12 V output LLC resonant converter.

IC Role / Device Role / Timing Role: Low-V_DS switch replacing Schottky diode; driven by transformer-coupled or active gate control.

Use Value: 0.0125 Ω R_DS(on) at 4.5 V ensures <0.25 V forward drop at 20 A, cutting rectifier loss by >60 % vs. 40 V Schottky.

Use Scenario: High-current half-bridge leg in 24 V BLDC motor driver for industrial automation.

IC Role / Device Role / Timing Role: Power stage switch controlling phase current direction and magnitude; subject to repetitive avalanche stress.

Use Value: 50 A single-pulse avalanche current rating and 125 mJ E_AS withstand capability ensure robustness against inductive kickback during commutation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel power MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IRF8721TRPBF	R_DS(on) = 0.0075 Ω @ 10 V (lower), but Q_g = 19 nC @ 4.5 V (lower) and R_thJC = 1.2 °C/W (higher); SO-8 package	Limited to single-sided cooling; unsuitable where top-side heatsinking is required	Select when board space is constrained and thermal budget allows higher junction temperature rise
SiR872DP-T1-GE3	R_DS(on) = 0.0085 Ω @ 10 V, Q_g = 36 nC @ 4.5 V, same PolarPAK® package and pinout; rated for 80 V V_DS	Higher voltage rating enables use in 60 V input systems with margin; identical thermal interface	Choose for 60 V bus designs requiring enhanced transient immunity without layout change

Compared with IRF8721TRPBF, SIE818DF-T1-GE3 trades slightly higher R_DS(on) for superior thermal performance and double-sided cooling - critical in sealed enclosures. Versus SiR872DP-T1-GE3, it offers tighter V_DS margin at lower cost for 48 V systems, with identical footprint and assembly process.

Availability

SIE818DF-T1-GE3 is available at Aetrix Electronics and suitable for telecom power supplies, industrial DC-DC converters, and BLDC motor drives requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for SIE818DF-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, reliability, and thermal innovation.

The PolarPAK® MOSFET product line was engineered to overcome thermal bottlenecks in high-current power conversion, delivering ultra-low R_thJC through top-exposed drain architecture - specifically targeting primary-side switching and synchronous rectification in compact, high-density power supplies.

FAQ

What is the maximum continuous drain current rating for SIE818DF-T1-GE3 under typical PCB conditions?

The SIE818DF-T1-GE3 has a package-limited continuous drain current of 60 A at T_C = 25 °C when surface mounted on a 1" × 1" FR4 board. At T_C = 70 °C, the rating remains 60 A, while ambient-limited current drops to 12.9 A at T_A = 70 °C due to thermal resistance constraints. The silicon limit is 79 A, but thermal design must respect the package rating.

Does SIE818DF-T1-GE3 support logic-level gate drive, and what is its guaranteed turn-on threshold?

Yes, SIE818DF-T1-GE3 supports logic-level gate drive with a guaranteed V_GS(th) range of 1.5–3.0 V at I_D = 250 µA. It delivers R_DS(on) ≤ 0.0125 Ω at V_GS = 4.5 V and I_D = 14 A, making it fully compatible with standard 5 V microcontroller outputs and dedicated gate drivers like the UCC27531.

How does the PolarPAK® package of SIE818DF-T1-GE3 improve thermal performance compared to SO-8 MOSFETs?

The PolarPAK® package of SIE818DF-T1-GE3 achieves R_thJC(drain) = 0.8 °C/W - over 3× better than typical SO-8 MOSFETs (~2.5–3.0 °C/W). Its top-exposed drain terminals (pins 1, 5, 6, 10) allow direct thermal interface to heatsinks or cold plates, enabling double-sided cooling and reducing total thermal resistance by up to 45 % in high-power applications.

Is SIE818DF-T1-GE3 suitable for avalanche-prone circuits such as motor drives or inductive loads?

Yes, SIE818DF-T1-GE3 is 100 % tested for unclamped inductive switching (UIS) and rated for 50 A single-pulse avalanche current and 125 mJ avalanche energy (E_AS). This makes it suitable for motor drive half-bridges and other inductive switching applications where voltage spikes exceed V_DS rating during turn-off.

What is the gate resistance specification for SIE818DF-T1-GE3, and why is it important for layout?

The SIE818DF-T1-GE3 has a specified gate resistance R_g of 0.95–1.5 Ω (measured at 1 MHz), which is tightly controlled and 100 % production-tested. This parameter directly impacts gate drive stability and ringing suppression - accurate R_g knowledge allows precise external gate resistor selection to balance switching speed and EMI, especially critical in high-frequency half-bridge layouts.

SIE818DF-T1-GE3 Specifications

Product attributes: Attribute value

Manufacturer:: Vishay Siliconix

Series:: TrenchFET®

Package/Case:: 10-PolarPAK® (L)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 75 V

Current - Continuous Drain (Id) @ 25°C:: 60A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 4.5V, 10V

Rds On (Max) @ Id, Vgs:: 9.5mOhm @ 16A, 10V

Vgs(th) (Max) @ Id:: 3V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 95 nC @ 10 V

Vgs (Max):: ±20V

Input Capacitance (Ciss) (Max) @ Vds:: 3200 pF @ 38 V

FET Feature:: -

Power Dissipation (Max):: 5.2W (Ta), 125W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 10-PolarPAK® (L)

SIE818DF-T1-GE3 FAQ

1.How can I place an order for SIE818DF-T1-GE3 through Aetrix?

Please submit a Request for Quotation (RFQ) for SIE818DF-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SIE818DF-T1-GE3 reliable?

The price and inventory of SIE818DF-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIE818DF-T1-GE3 is usually 5 days.

3.What payment methods are accepted for SIE818DF-T1-GE3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIE818DF-T1-GE3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SIE818DF-T1-GE3?

SIE818DF-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SIE818DF-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SIE818DF-T1-GE3?

For technical support, including SIE818DF-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIE818DF-T1-GE3 requirements.

6.How does Aetrix verify that SIE818DF-T1-GE3 is sourced from the original manufacturer or authorized distributors?

All SIE818DF-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIE818DF-T1-GE3 meets industry standards.

7.What is the process for return or replacement of SIE818DF-T1-GE3?

All SIE818DF-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIE818DF-T1-GE3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SIE818DF-T1-GE3 part is unused and in its original packaging.

Return procedure for SIE818DF-T1-GE3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-11 Comparator Circuit: Voltage Thresholds, Op-Amp Differences, LM393 and Practical Design

Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.

2026-09-10 Schmitt Trigger Explained: Hysteresis, Circuits, Inverters and Applications

Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …