Vishay Siliconix SIHB100N65E-GE3
- Part No.:
- SIHB100N65E-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- TO-263-3, D2PAK (2 Leads + Tab), TO-263AB
- Datasheet:
-
SIHB100N65E-GE3.pdf
- Description:
- E SERIES POWER MOSFET 650 V (D-
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIHB100N65E-GE3 from Vishay Siliconix is a 650 V, 30 A N-channel enhancement-mode Power MOSFET in D2PAK (TO-263) package, featuring RDS(on) = 0.087 Ω at VGS = 10 V, Qg = 41 nC (typ), and Kelvin-source connection for reduced gate noise-designed for high-efficiency, high-frequency switching in server power supplies and PFC stages.
For engineers reviewing the SIHB100N65E-GE3 datasheet, SIHB100N65E-GE3 pinout, SIHB100N65E-GE3 application, or SIHB100N65E-GE3 equivalent, key selection criteria include its 650 V blocking voltage, low 0.087 Ω on-resistance at 10 V drive, 127 mJ single-pulse avalanche energy rating, Kelvin-source layout for EMI-sensitive gate control, and D2PAK thermal performance with RthJC = 0.6 °C/W.
Technical Context
This 4th-generation E-series MOSFET employs optimized trench-gate silicon technology to minimize conduction and switching losses simultaneously. Its low figure-of-merit (RDS(on) × Qg) of ~3.57 Ω·nC and Co(er) = 90 pF enable efficient operation in hard-switched 50–500 kHz topologies such as continuous-conduction-mode (CCM) PFC and LLC resonant converters.
The device integrates a robust body diode with trr = 362 ns (typ), Qrr = 5.0 μC, and IRRM = 22 A, supporting ZVS-assisted turn-on in bridge configurations. Kelvin-source terminals decouple high-di/dt source return from gate drive loop, reducing gate oscillation and improving noise immunity in high-density power modules.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS max | 650 V - supports 400 V AC input rectified systems with 20% margin for surge and ringing |
| RDS(on) typ @ 10 V | 0.087 Ω - enables ≤2.5 W conduction loss at 12 A DC, critical for thermally constrained PFC designs |
| Qg typ | 41 nC - reduces gate drive power and allows use of lower-power drivers in high-frequency SMPS |
| EAS | 127 mJ - withstands unclamped inductive switching events without failure in motor drive or welder H-bridges |
| RthJC | 0.6 °C/W - delivers 208 W power dissipation capability with minimal case-to-heatsink thermal resistance |
| Co(er) | 90 pF - lowers output capacitance-related switching loss during hard-commutation transitions |
| dv/dt rating | 100 V/ns - ensures reliable operation under fast transient voltage stress in high-speed inverters |
Pinout & Package
D2PAK (TO-263) package with exposed drain pad for thermal and electrical connection; 3-pin configuration (G, D, S) plus Kelvin source terminal (SK) electrically isolated from main source but bonded internally to source region.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| G | Main gate | Standard gate control input; requires 10 V drive for full enhancement and low RDS(on) |
| D | Drain | High-voltage power node; connected to heatsink via exposed copper pad for thermal management |
| S | Main source | Power return path for load current; tied to PCB ground plane for low-inductance current return |
| SK | Kelvin source | Reference point for gate drive loop; isolates gate return from high-di/dt source current, suppressing Miller-induced false turn-on |
Key Features
| Feature | Design Value |
|---|---|
| 4th-generation E-series trench MOSFET | Optimized cell pitch and oxide thickness reduce RDS(on) × Qg trade-off for higher efficiency in 100–300 kHz PFC |
| Kelvin-source connection | Eliminates source inductance impact on gate control, enabling stable operation at >100 V/ns dv/dt |
| Avalanche-rated (UIS) | Guarantees ruggedness against inductive energy spikes without external snubbers in motor drives and welders |
| Low Co(er) | 90 pF effective output capacitance minimizes turn-off loss in hard-switched topologies |
| Pb-free & halogen-free | Complies with RoHS 2011/65/EU and Vishay's Green Standard (Doc. #99912) |
Applications
| Server Power Supply | PFC Front-End |
|---|---|
Use Scenario: Primary-side switching in 1–3 kW telecom/server PSUs operating at 100–200 kHz with CCM boost topology. IC Role / Device Role / Timing Role: High-side switch in interleaved boost converter; handles 30 A peak inductor current with <1.5 V conduction drop. Use Value: Low RDS(on) and Kelvin-source design reduce thermal stress and improve transient response during dynamic load steps. | Use Scenario: Active PFC stage in industrial LED drivers and PV inverters requiring >98% efficiency at full load. IC Role / Device Role / Timing Role: Fast-switching boost switch with 520 V VDS stress and 14 A RMS current handling. Use Value: 41 nC Qg and 90 pF Co(er) cut total switching loss by ~18% vs. prior-gen 650 V MOSFETs at 150 kHz. |
| Solar Inverter DC-Link | Induction Heating Half-Bridge |
Use Scenario: DC-link switching in string inverters where bus voltage reaches 600 V under MPPT conditions. IC Role / Device Role / Timing Role: Upper-leg switch in three-phase inverter leg; subjected to repetitive 650 V blocking and 25 A peak current. Use Value: 127 mJ EAS rating prevents failure during grid fault transients; RthJC = 0.6 °C/W enables compact heatsink design. | Use Scenario: Resonant half-bridge in 10–30 kW induction furnaces operating at 20–100 kHz. IC Role / Device Role / Timing Role: High-frequency switching element with body diode conducting reverse recovery current during ZVS transitions. Use Value: 362 ns trr and 5.0 μC Qrr minimize diode recovery loss and associated EMI in high-Q tank circuits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage power switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STW65N65FD | 650 V, 65 A, RDS(on) = 0.065 Ω, Qg = 95 nC, no Kelvin source | Higher current rating but larger gate charge increases driver loss; lacks Kelvin-source noise suppression | Preferred for higher-current, lower-frequency (<50 kHz) applications where gate noise is less critical |
| IXFH60N65X2 | 650 V, 60 A, RDS(on) = 0.055 Ω, Qg = 72 nC, standard 3-pin TO-247 | Lower RDS(on) but higher Qg and no Kelvin source; TO-247 offers better thermal spread than D2PAK | Better for thermally demanding, lower-switching-frequency designs where board space permits TO-247 footprint |
Compared with STW65N65FD and IXFH60N65X2, SIHB100N65E-GE3 delivers superior gate-noise immunity and lower switching loss per watt due to its Kelvin-source architecture and optimized 41 nC Qg, making it ideal for compact, high-frequency PFC and server PSU designs where layout EMI control is critical.
Availability
SIHB100N65E-GE3 is available at Aetrix Electronics and suitable for server and telecom power supplies, power factor correction (PFC) circuits, and solar PV inverters requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SIHB100N65E-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-reliability MOSFETs, diodes, and optoelectronics for power, signal, and sensing applications.
The E Series Power MOSFET product line targets high-efficiency, high-frequency power conversion systems-including datacenter PSUs, industrial motor drives, and renewable energy inverters-where low RDS(on) × Qg, avalanche ruggedness, and layout-friendly packaging are essential.
FAQ
What is the maximum continuous drain current rating for SIHB100N65E-GE3 at 100 °C case temperature?
The SIHB100N65E-GE3 supports 19 A continuous drain current at TC = 100 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the D2PAK package and internal silicon junction temperature constraints. At TC = 25 °C, the rating rises to 30 A. Designers must verify actual case temperature under operating conditions using RthJC = 0.6 °C/W and measured power dissipation to ensure safe operation of SIHB100N65E-GE3.
Does SIHB100N65E-GE3 include a Kelvin-source connection, and how is it implemented?
Yes, SIHB100N65E-GE3 features a dedicated Kelvin-source (SK) terminal separate from the main source (S) pin. It is internally bonded to the source region but electrically isolated from the high-current source path, allowing gate drive return to be referenced directly to the MOSFET's intrinsic source potential. This eliminates voltage drop across source inductance during high-di/dt switching, preventing false turn-on-a critical advantage in high-frequency, high-power applications using SIHB100N65E-GE3.
What is the typical gate charge (Qg) value for SIHB100N65E-GE3, and how does it affect driver selection?
The typical total gate charge (Qg) for SIHB100N65E-GE3 is 41 nC at VGS = 10 V, with Qgs = 16 nC and Qgd = 15 nC. This relatively low Qg enables efficient driving with medium-power gate drivers (e.g., 1–2 A peak), reducing driver IC cost and heat generation. When designing gate drive circuits for SIHB100N65E-GE3, designers should size Rg to achieve desired switching speed while maintaining EMI compliance-typical values range from 5 Ω to 15 Ω for 100–200 kHz operation.
Is SIHB100N65E-GE3 rated for avalanche energy, and what is its single-pulse value?
Yes, SIHB100N65E-GE3 is fully rated for unclamped inductive switching (UIS) with a guaranteed single-pulse avalanche energy (EAS) of 127 mJ under test conditions of VDD = 140 V, L = 28.2 mH, Rg = 25 Ω, and IAS = 3.0 A. This ruggedness allows SIHB100N65E-GE3 to safely absorb inductive energy in motor drive, welding, and flyback converter applications without external snubbers-provided junction temperature remains within -55 °C to +150 °C limits during the event.
What package type does SIHB100N65E-GE3 use, and what are its thermal characteristics?
SIHB100N65E-GE3 uses the D2PAK (TO-263AB) surface-mount package with an exposed drain pad for direct thermal attachment to a heatsink or PCB copper area. Its maximum junction-to-case thermal resistance (RthJC) is 0.6 °C/W, enabling up to 208 W power dissipation at TC = 25 °C. The package is lead (Pb)-free and halogen-free, compliant with RoHS Directive 2011/65/EU and Vishay's Green Standard (Document #99912). Proper solder paste volume and thermal pad layout are critical to achieving SIHB100N65E-GE3's rated thermal performance.
SIHB100N65E-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- E
- Package/Case:
- TO-263-3, D2PAK (2 Leads + Tab), TO-263AB
- Packaging:
- Tube
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 650 V
- Current - Continuous Drain (Id) @ 25°C:
- 30A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 100mOhm @ 12A, 10V
- Vgs(th) (Max) @ Id:
- 5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 62 nC @ 10 V
- Vgs (Max):
- ±30V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2137 pF @ 100 V
- FET Feature:
- -
- Power Dissipation (Max):
- 208W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-263 (D2PAK)
SIHB100N65E-GE3 FAQ
1.How can I place an order for SIHB100N65E-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIHB100N65E-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIHB100N65E-GE3 reliable?
The price and inventory of SIHB100N65E-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIHB100N65E-GE3 is usually 5 days.
3.What payment methods are accepted for SIHB100N65E-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIHB100N65E-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIHB100N65E-GE3?
SIHB100N65E-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIHB100N65E-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIHB100N65E-GE3?
For technical support, including SIHB100N65E-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIHB100N65E-GE3 requirements.
6.How does Aetrix verify that SIHB100N65E-GE3 is sourced from the original manufacturer or authorized distributors?
All SIHB100N65E-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIHB100N65E-GE3 meets industry standards.
7.What is the process for return or replacement of SIHB100N65E-GE3?
All SIHB100N65E-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIHB100N65E-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIHB100N65E-GE3 part is unused and in its original packaging.
Return procedure for SIHB100N65E-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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