Vishay Siliconix SIR406DP-T1-GE3
- Part No.:
- SIR406DP-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIR406DP-T1-GE3.pdf
- Description:
- MOSFET N-CH 25V 40A PPAK SO-8
- Quantity:
- Payment:

- Shipping:

Inventory:9,365
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIR406DP-T1-GE3 from Vishay Siliconix is an N-channel 25-V TrenchFET® Gen III Power MOSFET in PowerPAK® SO-8 package, delivering 40 A continuous drain current at TC = 25 °C, RDS(on) of 3.8 mΩ at VGS = 10 V and 4.8 mΩ at VGS = 4.5 V, with 15.8 nC total gate charge - optimized for high-efficiency POL and server DC/DC converters.
For engineers reviewing the SIR406DP-T1-GE3 datasheet, SIR406DP-T1-GE3 pinout, SIR406DP-T1-GE3 application, or SIR406DP-T1-GE3 equivalent, key selection criteria include its lead-free/halogen-free PowerPAK SO-8 footprint, 100 % Rg and avalanche testing, junction-to-case thermal resistance of 2.1 °C/W, and suitability for high-current, low-voltage synchronous rectification in compact power modules.
Technical Context
This MOSFET employs TrenchFET® Gen III silicon technology to achieve ultra-low RDS(on) while maintaining robust avalanche capability (EAS = 45 mJ) and tight gate threshold voltage control (VGS(th) = 1.2–2.4 V). Its dynamic performance includes Ciss = 2083 pF, Crss = 207 pF, and fast switching with td(on) = 11 ns and tf = 9 ns under 10 V drive.
The device operates within -55 °C to +150 °C junction temperature range and features a fully rated 25 V drain-source breakdown voltage with positive VDS temperature coefficient (24 mV/°C), enabling stable parallel operation. Its PowerPAK® SO-8 package provides direct die-to-PCB thermal conduction via exposed copper drain pad, achieving RthJC = 2.1 °C/W - matching DPAK-level thermal performance in SO-8 footprint.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 25 V - Maximum blocking voltage compatible with 3.3 V, 5 V, and 12 V input rails in point-of-load systems |
| RDS(on) | 3.8 mΩ @ VGS = 10 V - Enables <1 W conduction loss at 16 A, critical for high-current CPU/GPU VRMs |
| ID (continuous) | 40 A @ TC = 25 °C - Package-limited current rating supporting high-density power stages |
| Qg | 15.8 nC @ VGS = 4.5 V - Low gate charge enables efficient drive from standard PWM controllers without external buffers |
| RthJC | 2.1 °C/W - Enables direct thermal coupling to PCB copper, reducing junction temperature rise by ~40 °C vs. standard SO-8 |
| VGS(th) | 1.2–2.4 V - Ensures reliable turn-on with 3.3 V logic-level gate drivers and supports dual-gate control schemes |
| EAS | 45 mJ - Fully tested avalanche energy rating allows safe operation under inductive switching stress in non-synchronous topologies |
Pinout & Package
PowerPAK® SO-8 is a leadless surface-mount package with same 5.15 mm × 6.15 mm footprint and pinout as standard SO-8, featuring exposed copper drain pad on bottom for enhanced thermal transfer. The package uses trench-based silicon for low RDS(on) and high current density.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Drain (D) | Four parallel drain terminals connected to exposed bottom copper pad - provides low-inductance, high-current path to PCB ground plane |
| 5 | Gate (G) | Single gate input with Rg = 0.2–1.7 Ω - supports fast, controlled switching with minimal gate ringing |
| 6, 7, 8 | Source (S) | Three parallel source terminals - reduces source inductance and improves current sharing in paralleled configurations |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen III silicon | Delivers 3.8 mΩ RDS(on) at 10 V in SO-8 footprint - 40 % lower on-resistance than prior-generation equivalents |
| 100 % Rg tested | Guarantees consistent gate drive timing across production lots, eliminating need for gate resistor tuning in high-volume designs |
| 100 % avalanche tested | Validates EAS = 45 mJ per unit - ensures reliability in hard-switched or fault-prone DC/DC stages without derating |
| PowerPAK® SO-8 package | Enables drop-in replacement for SO-8 layouts while delivering DPAK-level thermal performance (RthJC = 2.1 °C/W) |
| Halogen-free & RoHS-compliant | Meets IEC 61249-2-21 and Directive 2002/95/EC - supports environmentally regulated server and telecom equipment |
Applications
| Server Voltage Regulator Modules | High-Density POL Converters |
|---|---|
Use Scenario: Primary synchronous rectifier in 48 V to 12 V intermediate bus converter feeding multiple CPU/GPU VRMs in rack-mounted servers. IC Role / Device Role / Timing Role: High-side or low-side switch operating at 300–600 kHz with 40 A peak current, driven by integrated gate driver ICs. Use Value: 3.8 mΩ RDS(on) limits conduction loss to ≤0.6 W at full load, while PowerPAK SO-8's 2.1 °C/W RthJC maintains TJ < 115 °C on 2 oz copper board. | Use Scenario: Output synchronous rectifier in compact 12 V to 1.8 V buck converter powering FPGA or ASIC core logic on embedded compute cards. IC Role / Device Role / Timing Role: Low-side switch in multiphase topology, switching at 1 MHz with 15 A RMS current per phase. Use Value: 4.8 mΩ RDS(on) at 4.5 V gate drive enables direct control from 3.3 V PWM controller, eliminating level-shifter complexity and layout area. |
| Telecom DC/DC Brick Modules | Industrial PLC Power Supplies |
Use Scenario: Secondary-side synchronous rectifier in isolated 48 V input, 5 V/20 A output brick supplying baseband processing units. IC Role / Device Role / Timing Role: Fast-recovery body diode operation during dead-time, with 0.73 V VSD ensuring low reverse recovery loss. Use Value: Qrr = 15–28 nC and trr = 24–45 ns minimize switching loss during light-load ZVS transitions, improving efficiency at 10–25 % load. | Use Scenario: Input-side hot-swap FET and OR-ing diode replacement in redundant 24 V power distribution for programmable logic controllers. IC Role / Device Role / Timing Role: Bidirectional current-handling MOSFET used in ideal diode configuration with external controller. Use Value: 40 A continuous ID and 70 A pulsed IDM support inrush current limiting and fault isolation without thermal shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR404DP-T1-GE3 | Same PowerPAK SO-8 package, but 30 V VDS and 4.5 mΩ RDS(on) @ 10 V | Better suited for 3.3 V/5 V input rails where 25 V rating is excessive; slightly higher conduction loss | Select when system VDS stress remains <22 V and cost optimization is prioritized over lowest RDS(on) |
| SiR626DP-T1-GE3 | Same 25 V rating, but 2.8 mΩ RDS(on) @ 10 V and 22.5 nC Qg in identical package | Higher gate charge increases driver loss; preferred only when sub-3 mΩ RDS(on) justifies added gate drive complexity | Choose only when conduction loss dominates total loss budget and gate driver can support 22.5 nC charge |
Compared with SIR406DP-T1-GE3, SiR404DP-T1-GE3 trades 0.7 mΩ higher RDS(on) for broader voltage margin and lower cost, while SiR626DP-T1-GE3 delivers 1.0 mΩ lower RDS(on) at the expense of 42 % higher Qg - making SIR406DP-T1-GE3 the optimal balance of conduction efficiency, switching speed, and drive simplicity for 25 V POL applications.
Availability
SIR406DP-T1-GE3 is available at Aetrix Electronics and suitable for server VRMs, telecom DC/DC bricks, and industrial PLC power supplies requiring stable component supply, long-term lifecycle assurance, and halogen-free compliance.
Supply support for SIR406DP-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency and reliability.
The SIR406DP-T1-GE3 belongs to Vishay's TrenchFET® Gen III PowerPAK® SO-8 family, engineered specifically for high-current, low-voltage DC/DC conversion in space-constrained computing and communications infrastructure.
FAQ
What is the maximum continuous drain current rating for SIR406DP-T1-GE3 at 70 °C case temperature?
The SIR406DP-T1-GE3 is rated for 40 A continuous drain current at TC = 25 °C and TC = 70 °C, as specified in the Absolute Maximum Ratings table under "Continuous Drain Current (TJ = 150 °C)" with footnote "g. Package Limited." This reflects its thermal design - the PowerPAK® SO-8 package constrains current based on package construction rather than silicon limits, enabling consistent 40 A delivery across that temperature range when properly heatsinked.
Does SIR406DP-T1-GE3 support 3.3 V gate drive in practical applications?
Yes, SIR406DP-T1-GE3 supports robust operation with 3.3 V gate drive due to its VGS(th) range of 1.2–2.4 V and RDS(on) = 4.8 mΩ at VGS = 4.5 V. At 3.3 V, typical RDS(on) is ~6.2 mΩ (extrapolated from published curves), enabling use with 3.3 V logic-level controllers in low-duty-cycle or moderate-current POL stages - though full 40 A capability requires ≥4.5 V drive per datasheet conditions.
What is the significance of "100 % Rg tested" for SIR406DP-T1-GE3?
"100 % Rg tested" means every SIR406DP-T1-GE3 unit undergoes production screening for gate resistance (Rg = 0.2–1.7 Ω), ensuring tight parametric control of switching speed and gate drive current requirements. This eliminates lot-to-lot variation in turn-on/turn-off timing, simplifies gate driver selection, and prevents unexpected oscillation or shoot-through in high-frequency synchronous buck converters using SIR406DP-T1-GE3.
Can SIR406DP-T1-GE3 be mounted on a standard SO-8 land pattern?
Yes, SIR406DP-T1-GE3 uses the exact same 5.15 mm × 6.15 mm footprint and pinout as standard SO-8, allowing direct mounting on legacy SO-8 PCBs. However, optimal thermal performance requires extending the drain pad copper area beyond the minimum SO-8 land pattern - Vishay recommends ≥0.25 in² additional spreading copper to realize the full RthJC = 2.1 °C/W benefit of the PowerPAK® SO-8 package.
What is the body diode forward voltage (VSD) of SIR406DP-T1-GE3 at 3 A current?
The body diode forward voltage VSD of SIR406DP-T1-GE3 is specified as 0.73–1.1 V at IS = 3 A and TJ = 25 °C. This low VSD, combined with trr = 24–45 ns and Qrr = 15–28 nC, makes SIR406DP-T1-GE3 well-suited for synchronous rectification and bidirectional current applications where body diode conduction occurs during dead-time or fault conditions.
SIR406DP-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 25 V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 3.8mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 50 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2083 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5W (Ta), 48W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIR406DP-T1-GE3 FAQ
1.How can I place an order for SIR406DP-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIR406DP-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIR406DP-T1-GE3 reliable?
The price and inventory of SIR406DP-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIR406DP-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIR406DP-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIR406DP-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIR406DP-T1-GE3?
SIR406DP-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIR406DP-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIR406DP-T1-GE3?
For technical support, including SIR406DP-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIR406DP-T1-GE3 requirements.
6.How does Aetrix verify that SIR406DP-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIR406DP-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIR406DP-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIR406DP-T1-GE3?
All SIR406DP-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIR406DP-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIR406DP-T1-GE3 part is unused and in its original packaging.
Return procedure for SIR406DP-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIR406DP-T1-GE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
