Vishay Siliconix SIR514DP-T1-BE3
- Part No.:
- SIR514DP-T1-BE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIR514DP-T1-BE3.pdf
- Description:
- N-CHANNEL 100 V (D-S) MOSFET 150
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIR514DP-T1-BE3 from Vishay Siliconix is an N-channel 100 V (D-S) TrenchFET® Gen V power MOSFET in PowerPAK® SO-8 package, delivering RDS(on) = 0.0058 Ω at VGS = 10 V, Qg = 23 nC (typ.), and 84.8 A continuous drain current at TC = 25 °C - optimized for high-efficiency synchronous rectification and primary-side switching in DC/DC converters.
For engineers reviewing the SIR514DP-T1-BE3 datasheet, SIR514DP-T1-BE3 pinout, SIR514DP-T1-BE3 application, or SIR514DP-T1-BE3 equivalent, this page provides verified electrical parameters, thermal resistance data (RthJC = 1.2 °C/W typ.), body diode characteristics (VSD = 0.76 V typ. at IS = 5 A), avalanche rating (EAS = 61.25 mJ), and layout-critical package dimensions for PowerPAK SO-8 leadless mounting.
Technical Context
This MOSFET employs TrenchFET® Gen V silicon architecture, tuned specifically for low RDS(on) × Qoss figure-of-merit to minimize switching losses in hard-switched topologies. Its gate threshold voltage (VGS(th) = 2–4 V) supports standard 5 V and 10 V gate drive, while the 1.2 °C/W typical junction-to-case thermal resistance enables high-power density designs with minimal heatsinking.
The device integrates a robust intrinsic body diode with trr = 46 ns (typ.) and Qrr = 56 nC (typ.), enabling efficient reverse recovery in OR-ing and synchronous rectifier configurations. It is 100 % Rg and UIS tested, with absolute maximum VGS = ±20 V and guaranteed avalanche energy rating of 61.25 mJ under single-pulse conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - rated drain-source blocking voltage for primary-side switch operation in 48 V and 60 V bus systems |
| RDS(on) max @ VGS = 10 V | 0.0058 Ω - enables <1.5 W conduction loss at 20 A, critical for high-current DC/DC output stages |
| Qg typ. | 23 nC - low gate charge reduces driver power requirement and improves switching efficiency at 300–1000 kHz |
| ID continuous @ TC = 25 °C | 84.8 A - supports high-current power delivery without external heatsink when mounted on 1" × 1" FR4 board |
| RthJC max | 1.5 °C/W - ensures predictable thermal path to PCB copper or heatsink, enabling accurate junction temperature estimation |
| VSD typ. @ IS = 5 A | 0.76 V - low forward voltage minimizes conduction loss in bidirectional OR-ing and hot-swap applications |
| EAS | 61.25 mJ - validated single-pulse avalanche energy supports reliable operation during transient overvoltage events |
Pinout & Package
Package: PowerPAK® SO-8 (leadless, exposed-drain thermal pad). Dimensions: 6.15 mm × 5.15 mm × 1.04 mm (L × W × H); thermal pad area ≈ 3.76 mm × 4.90 mm per manufacturer drawing 71655.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source terminals reduce source inductance and improve current sharing in high-di/dt switching |
| 5, 6, 7, 8 | Drain (D) | Four parallel drain terminals + large bottom thermal pad provide low-inductance, low-resistance power path and thermal interface |
| G (Pin 1 top view) | Gate (G) | Single gate input located adjacent to source; requires controlled 1 Ω gate resistor to limit dv/dt-induced turn-on in high-speed layouts |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen V silicon | Optimized for lowest RDS(on) × Qoss FOM - directly reduces total switching loss in high-frequency DC/DC converters |
| 100 % Rg and UIS tested | Ensures gate resistance consistency (0.5–1.8 Ω) and ruggedness against unclamped inductive switching stress |
| Exposed drain thermal pad | Enables direct thermal coupling to PCB copper pour - achieves 1.2 °C/W RthJC without solder paste voiding mitigation |
| Body diode trr = 46 ns (typ.) | Reduces reverse recovery loss and EMI in synchronous rectifier mode, especially below 100 kHz operation |
| Lead (Pb)-free and halogen-free | Complies with RoHS Directive 2011/65/EU and JEDEC JS709B - suitable for industrial and telecom end-equipment |
Applications
| Synchronous Rectification | Primary-Side Switch |
|---|---|
|
Use Scenario: Secondary-side synchronous rectifier in isolated 12 V/48 V output LLC resonant converter. IC Role / Device Role / Timing Role: Low-side N-channel MOSFET replacing Schottky diode to reduce conduction loss and improve efficiency above 10 A load. Use Value: Achieves <0.8 V forward drop at 20 A (vs. >0.5 V for Schottky), cutting rectifier loss by >40 % at full load. |
Use Scenario: High-side primary switch in 600 W telecom DC/DC brick operating at 300 kHz. IC Role / Device Role / Timing Role: Fast-switching N-channel MOSFET driven by gate transformer, handling 80 V bus transients. Use Value: 23 nC Qg and 1.2 °C/W RthJC enable <1.2 W switching loss and <95 °C junction temp at 84.8 A peak. |
| OR-ing and Hot Swap | Battery Management System |
|
Use Scenario: Dual-input OR-ing controller for redundant 24 V power supplies in industrial PLC backplane. IC Role / Device Role / Timing Role: Back-to-back configured N-channel MOSFET providing low-loss, bidirectional current path with fast fault isolation. Use Value: 0.0058 Ω RDS(on) limits voltage drop to <120 mV at 20 A, minimizing bus imbalance and thermal rise. |
Use Scenario: Charge/discharge path switch in 4-cell Li-ion battery pack with 16.8 V max pack voltage. IC Role / Device Role / Timing Role: High-current protection switch placed between battery cell stack and system load/charger. Use Value: 100 V VDS rating provides 2× margin over 16.8 V pack; 61.25 mJ EAS withstands short-circuit energy during fuseless protection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF540NPBF | RDS(on) = 0.044 Ω @ 10 V; TO-220 package; 33 A ID; no Qg or EAS spec provided in datasheet | Higher conduction loss, larger footprint, no avalanche rating - unsuitable for high-density or high-reliability DC/DC | Select only for cost-sensitive, low-frequency (<100 kHz), non-avalanche-critical linear regulator or motor gate drive |
| SiR626DP | Same PowerPAK SO-8 package; 100 V; RDS(on) = 0.0032 Ω @ 10 V; Qg = 31 nC; higher current (100 A) | Lower RDS(on) but higher Qg - better for ultra-low conduction loss, worse for high-frequency switching efficiency | Prefer for <50 kHz applications where conduction loss dominates; avoid if gate drive capability is limited or fSW > 500 kHz |
Compared with IRF540NPBF, SIR514DP-T1-BE3 delivers 7.5× lower RDS(on), 10× higher current rating, and certified avalanche capability - making it viable for modern high-efficiency SMPS. Against SiR626DP, it trades 40 % higher RDS(on) for 26 % lower Qg, favoring high-frequency operation with constrained gate drive.
Availability
SIR514DP-T1-BE3 is available at Aetrix Electronics and suitable for synchronous rectification, primary-side switching, and OR-ing applications requiring stable component supply, Pb-free compliance, and validated avalanche performance in industrial power systems.
Supply support for SIR514DP-T1-BE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency and reliability.
The SIR514DP-T1-BE3 belongs to Vishay's TrenchFET® Gen V power MOSFET family, engineered for high-frequency, high-current DC/DC conversion in telecom, server, and industrial power supplies where low RDS(on) × Qoss is critical.
FAQ
What is the maximum continuous drain current rating for SIR514DP-T1-BE3 at case temperature of 70 °C?
The SIR514DP-T1-BE3 supports 67.8 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This value reflects derating due to thermal resistance limitations and must be validated against actual PCB copper area and airflow. The SIR514DP-T1-BE3 maintains its 0.0058 Ω RDS(on) up to 125 °C junction temperature, ensuring stable conduction performance across the operating range.
Does SIR514DP-T1-BE3 have a specified avalanche energy rating, and how is it tested?
Yes, the SIR514DP-T1-BE3 has a single-pulse avalanche energy rating of 61.25 mJ, measured under L = 0.1 mH with IAS = 35 A. It is 100 % UIS (unclamped inductive switching) tested per JEDEC standard JESD24-11, confirming ruggedness against transient overvoltage events in real-world power circuits. This rating is integral to the SIR514DP-T1-BE3 qualification and applies directly to the part number without derating.
What is the gate-source threshold voltage range for SIR514DP-T1-BE3, and how does it affect drive compatibility?
The SIR514DP-T1-BE3 has a VGS(th) range of 2 V to 4 V at ID = 250 μA, enabling reliable turn-on with standard 5 V logic-level drivers and full enhancement with 10 V gate drive. Its negative temperature coefficient (−6.9 mV/°C) ensures inherent current sharing stability in paralleled configurations. This VGS(th) behavior is confirmed in the SIR514DP-T1-BE3 datasheet Section 2, Table "Specifications".
How does the PowerPAK SO-8 package of SIR514DP-T1-BE3 differ from standard SO-8 in terms of thermal and electrical performance?
The PowerPAK SO-8 package used by SIR514DP-T1-BE3 is leadless with an exposed copper drain thermal pad on the bottom surface, unlike standard SO-8 which uses gull-wing leads. This design achieves RthJC = 1.2 °C/W (vs. >30 °C/W for SO-8), reduces source inductance via four parallel source pins, and eliminates bond wire parasitics. These features make the SIR514DP-T1-BE3 suitable for high-current, high-frequency applications where thermal and switching performance are critical.
Is SIR514DP-T1-BE3 suitable for use in synchronous rectifier circuits with zero-voltage switching (ZVS)?
Yes, the SIR514DP-T1-BE3 is well-suited for ZVS synchronous rectification due to its low Qgd (1.7 nC typ.), fast tr/tf (8–16 ns), and low Coss (720 pF typ.), which minimize capacitive turn-on loss and improve ZVS soft-switching window. Its body diode trr = 46 ns (typ.) and Qrr = 56 nC (typ.) further support clean commutation. These parameters are explicitly characterized for the SIR514DP-T1-BE3 in the "Dynamic" section of the datasheet.
SIR514DP-T1-BE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen V
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 20.8A (Ta), 84.8A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 7.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 5.8mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 47 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2550 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5W (Ta), 83.3W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIR514DP-T1-BE3 FAQ
1.How can I place an order for SIR514DP-T1-BE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIR514DP-T1-BE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIR514DP-T1-BE3 reliable?
The price and inventory of SIR514DP-T1-BE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIR514DP-T1-BE3 is usually 5 days.
3.What payment methods are accepted for SIR514DP-T1-BE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIR514DP-T1-BE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIR514DP-T1-BE3?
SIR514DP-T1-BE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIR514DP-T1-BE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIR514DP-T1-BE3?
For technical support, including SIR514DP-T1-BE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIR514DP-T1-BE3 requirements.
6.How does Aetrix verify that SIR514DP-T1-BE3 is sourced from the original manufacturer or authorized distributors?
All SIR514DP-T1-BE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIR514DP-T1-BE3 meets industry standards.
7.What is the process for return or replacement of SIR514DP-T1-BE3?
All SIR514DP-T1-BE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIR514DP-T1-BE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIR514DP-T1-BE3 part is unused and in its original packaging.
Return procedure for SIR514DP-T1-BE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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