Vishay Siliconix SIR642DP-T1-GE3
- Part No.:
- SIR642DP-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIR642DP-T1-GE3.pdf
- Description:
- MOSFET N-CH 40V 60A PPAK SO-8
- Quantity:
- Payment:

- Shipping:

Inventory:4,728
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIR642DP-T1-GE3 from Vishay Siliconix is an N-channel 30-V TrenchFET® Power MOSFET in PowerPAK SO-8 package, delivering 30 A continuous drain current at TC = 25 °C, RDS(on) of 7.9 mΩ at VGS = 10 V, and 10 mΩ at VGS = 4.5 V, optimized for high-side switching in server VRM and POL DC/DC converters.
For engineers reviewing the SIR642DP-T1-GE3 datasheet, SIR642DP-T1-GE3 pinout, SIR642DP-T1-GE3 application, or SIR642DP-T1-GE3 equivalent, key selection criteria include its 30-V VDS rating, low gate charge (8.8 nC at 4.5 V), 100 % UIS-tested ruggedness, halogen-free construction per IEC 61249-2-21, and thermal performance matching DPAK via PowerPAK SO-8 footprint compatibility.
Technical Context
This MOSFET employs trench-gate silicon technology to achieve low RDS(on) with fast switching dynamics, supported by 20–30 nC total gate charge and sub-40 ns turn-off delay under 10-V drive. Its body diode exhibits 21–42 ns reverse recovery time and 15–30 nC Qrr, enabling efficient synchronous rectification in buck converters.
The device operates within -55 °C to +150 °C junction temperature range, features ±20 V gate-source voltage rating, and is characterized for stable on-resistance over temperature-0.0079 Ω at 25 °C rising to ~0.015 Ω at 125 °C-enabling predictable conduction loss modeling in high-power-density VRM designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage; defines safe operation in 12 V input bus and 5/3.3 V output POL stages. |
| RDS(on) | 7.9 mΩ @ VGS = 10 V - Enables <1 W conduction loss at 30 A, critical for high-efficiency server power delivery. |
| ID (Cont.) | 30 A @ TC = 25 °C - Package-limited current; supports high-current phases without external heatsink in compact layouts. |
| Qg | 8.8 nC @ VGS = 4.5 V - Low gate charge reduces driver power and enables efficient 500 kHz+ switching in multiphase VRMs. |
| RthJC | 2.4 °C/W (typ.) - Junction-to-case thermal resistance matches DPAK; allows direct thermal pad coupling to PCB copper for >26 W dissipation. |
| UIS Rating | 100 % tested - Ensures robustness against inductive load transients in hot-swap and load-dump scenarios. |
| Package | PowerPAK SO-8 - Leadless, SO-8 footprint-compatible package with exposed drain pad for low-inductance, high-current routing and superior thermal transfer. |
Pinout & Package
PowerPAK SO-8 is a leadless surface-mount package with 8 terminals arranged in standard SO-8 footprint (6.15 mm × 5.15 mm), featuring an exposed bottom-side drain pad for thermal and electrical connection. Pin numbering follows JEDEC MS-012 standard with pins 1–4 on left side and 5–8 on right side when viewed from top.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 8 | Drain (D) | High-current output node; electrically and thermally connected to large bottom-side copper pad for low RDS(on) and thermal path to PCB. |
| 4 | Gate (G) | Control input; requires <10 V drive for full enhancement; low 0.2–2.0 Ω gate resistance minimizes ringing. |
| 5, 6, 7 | Source (S) | Return path for channel current; tied to power ground plane; forms Kelvin sense path for accurate current monitoring. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Enables 7.9 mΩ RDS(on) in SO-8 footprint-~40 % lower than conventional SO-8 MOSFETs at same voltage class. |
| 100 % UIS tested | Guarantees survivability under unclamped inductive switching stress up to 31 A avalanche current and 48 mJ energy. |
| Halogen-free construction | Complies with IEC 61249-2-21; eliminates brominated flame retardants without compromising dielectric or thermal performance. |
| PowerPAK SO-8 package | Delivers DPAK-level thermal resistance (2.4 °C/W) in SO-8 outline-enables drop-in upgrade of legacy SO-8 designs with no layout change. |
| Low Qgd/Qgs ratio | Qgd = 2.2 nC, Qgs = 3.5 nC → ratio ~0.63; improves hard-switching EMI behavior and reduces Miller-induced shoot-through risk. |
Applications
| Server VRM Phase Legs | Point-of-Load Converters |
|---|---|
Use Scenario: High-current, multi-phase buck converter supplying CPU/GPU core voltage (0.8–1.2 V) from 12 V bus in data center servers. IC Role / Device Role / Timing Role: High-side synchronous rectifier switch operating at 300–1000 kHz with precise gate timing control. Use Value: 7.9 mΩ RDS(on) and 8.8 nC Qg reduce conduction and switching losses, enabling >95 % efficiency at 30 A per phase while maintaining thermal headroom. | Use Scenario: Compact 3.3 V or 5 V DC/DC regulator powering FPGA I/O banks or ASIC peripherals on embedded compute modules. IC Role / Device Role / Timing Role: Primary high-side switch in integrated power stage, driven by controller IC with 4.5 V logic-level gate signal. Use Value: 10 mΩ RDS(on) at 4.5 V ensures full enhancement with standard PWM controllers, eliminating need for level-shifting or bootstrap circuits. |
| Hot-Swap Controllers | Industrial DC Power Distribution |
Use Scenario: Inrush current limiting and fault protection in 24–48 V backplane systems where board insertion must not disrupt upstream supply. IC Role / Device Role / Timing Role: Series pass element controlled by hot-swap controller IC to ramp voltage linearly during insertion. Use Value: 100 % UIS testing and 31 A avalanche current rating ensure reliable operation during sustained overcurrent and short-circuit events. | Use Scenario: High-reliability 24 V DC distribution in factory automation PLCs, where MOSFETs switch motor drives or solenoid loads. IC Role / Device Role / Timing Role: Solid-state replacement for electromechanical relays in high-cycle-count load switching applications. Use Value: Robust 30 V VDS rating and -55 °C to +150 °C operating range support wide ambient conditions and long service life without contact wear. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR462DP-T1-GE3 | Identical die and package; same Vishay part number variant with identical electrical specs and thermal performance. | No functional difference; both qualified for high-reliability server and industrial use. | Select based on distributor availability and tape-and-reel packaging preference. |
| IRF7470PBF | Higher RDS(on) (11.5 mΩ @ 10 V), higher Qg (22 nC), SO-8 (not PowerPAK); 30 V, 30 A rating but inferior thermal resistance (RthJC = 3.5 °C/W). | Limited to lower-frequency (<300 kHz), lower-current applications due to higher losses and thermal impedance. | Use only if PowerPAK SO-8 footprint is unavailable; expect ~25 % higher conduction loss and reduced thermal margin. |
Compared with SiR462DP-T1-GE3, the SiR462DP-T1-GE3 offers identical performance and qualification, while IRF7470PBF trades lower cost for significantly higher RDS(on), gate charge, and thermal resistance-making it unsuitable for high-efficiency, high-frequency VRM designs where SIR642DP-T1-GE3's 7.9 mΩ and 2.4 °C/W deliver measurable system-level efficiency and thermal advantage.
Availability
SIR642DP-T1-GE3 is available at Aetrix Electronics and suitable for server VRM design, point-of-load DC/DC conversion, and industrial hot-swap power distribution requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support.
Supply support for SIR642DP-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, reliability, and miniaturization.
The SIR642DP-T1-GE3 belongs to Vishay's TrenchFET® PowerPAK SO-8 product line, engineered specifically for high-current, high-frequency power conversion in space-constrained computing and industrial systems where thermal density and switching loss are critical.
FAQ
What is the maximum continuous drain current rating for SIR642DP-T1-GE3 at 70 °C case temperature?
The SIR642DP-T1-GE3 supports 30 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating is package-limited and assumes proper PCB thermal design with adequate copper area on the drain pad to maintain case temperature at or below 70 °C under steady-state operation.
Does SIR642DP-T1-GE3 require a gate driver with negative voltage capability?
No, SIR642DP-T1-GE3 does not require negative gate drive. Its gate threshold voltage is 1–3 V and maximum rated VGS is ±20 V, making it fully compatible with standard 0–5 V or 0–10 V gate drivers. The device turns off completely at VGS = 0 V, and no negative bias is needed for reliable operation in synchronous buck or hot-swap configurations.
Is SIR642DP-T1-GE3 pin-compatible with standard SO-8 MOSFETs?
Yes, SIR642DP-T1-GE3 uses the PowerPAK SO-8 package, which maintains identical pin count, pin spacing (1.27 mm pitch), and outline dimensions (6.15 mm × 5.15 mm) as standard SO-8. Pin 1 (Drain) through pin 4 (Gate) and pin 5–8 (Source/Drain) align directly-enabling drop-in replacement without PCB redesign, though optimal thermal performance requires matching the drain pad land pattern.
What is the typical body diode forward voltage of SIR642DP-T1-GE3 at 4 A source current?
The typical body diode forward voltage (VSD) of SIR642DP-T1-GE3 is 0.8–1.2 V at IS = 4.0 A and VGS = 0 V, measured at TJ = 25 °C. This low VSD supports efficient reverse conduction during dead-time intervals in synchronous rectification, reducing crossover losses compared to discrete Schottky solutions.
How is the 100 % UIS test performed on SIR642DP-T1-GE3?
The 100 % UIS (Unclamped Inductive Switching) test subjects each SIR642DP-T1-GE3 unit to a controlled inductive energy pulse (L = 0.1 mH) at rated current (31 A) and junction temperature, verifying avalanche capability up to 48 mJ. This production test ensures every device can safely absorb transient inductive energy without degradation-critical for reliability in VRM and hot-swap applications.
SIR642DP-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 40 V
- Current - Continuous Drain (Id) @ 25°C:
- 60A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 2.4mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.3V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 84 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 4155 pF @ 20 V
- FET Feature:
- -
- Power Dissipation (Max):
- 4.8W (Ta), 41.7W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIR642DP-T1-GE3 FAQ
1.How can I place an order for SIR642DP-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIR642DP-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIR642DP-T1-GE3 reliable?
The price and inventory of SIR642DP-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIR642DP-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIR642DP-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIR642DP-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIR642DP-T1-GE3?
SIR642DP-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIR642DP-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIR642DP-T1-GE3?
For technical support, including SIR642DP-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIR642DP-T1-GE3 requirements.
6.How does Aetrix verify that SIR642DP-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIR642DP-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIR642DP-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIR642DP-T1-GE3?
All SIR642DP-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIR642DP-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIR642DP-T1-GE3 part is unused and in its original packaging.
Return procedure for SIR642DP-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIR642DP-T1-GE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
