Vishay Siliconix SIR818DP-T1-GE3
- Part No.:
- SIR818DP-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIR818DP-T1-GE3.pdf
- Description:
- MOSFET N-CH 30V 50A PPAK SO-8
- Quantity:
- Payment:

- Shipping:

Inventory:4,055
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIR818DP-T1-GE3 from Vishay Siliconix is an N-channel 30 V (D-S) TrenchFET® Gen III Power MOSFET in PowerPAK® SO-8 package, delivering 50 A continuous drain current at TC = 25 °C, RDS(on) = 2.8 mΩ at VGS = 10 V, and 30.5 nC total gate charge - optimized for low-side switching in high-efficiency DC/DC converters used in notebook PCs and server POL applications.
For engineers reviewing the SIR818DP-T1-GE3 datasheet, SIR818DP-T1-GE3 pinout, SIR818DP-T1-GE3 application, or SIR818DP-T1-GE3 equivalent, key selection criteria include its 30 V VDS, ultra-low RDS(on) at 4.5 V and 10 V drive, 100 % Rg and UIS tested reliability, halogen-free and RoHS-compliant construction, and thermal performance matching DPAK-level junction-to-case resistance (1.2 °C/W typical).
Technical Context
This MOSFET employs trench-based silicon architecture with optimized cell pitch and gate oxide design to achieve sub-3 mΩ on-resistance while maintaining robust avalanche capability (EAS = 125 mJ). Its gate charge profile (Qg = 30.5 nC @ 4.5 V) supports fast switching in synchronous buck topologies with minimal driver loss.
The PowerPAK® SO-8 package features exposed copper drain pads on the bottom side for direct thermal conduction to PCB copper, enabling junction-to-case thermal resistance of 1.2 °C/W - identical to DPAK - while retaining standard SO-8 footprint compatibility and eliminating leadframe thermal bottlenecks inherent in traditional SO-8 packages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage; suitable for 24 V input rails and 12 V intermediate bus systems. |
| RDS(on) @ VGS = 10 V | 2.8 mΩ - Enables <1 W conduction loss at 20 A, critical for high-current POL stages. |
| RDS(on) @ VGS = 4.5 V | 3.3 mΩ - Ensures stable operation with 5 V or logic-level gate drivers in compact designs. |
| ID (continuous, TC = 25 °C) | 50 A - Supports high-current output stages without external heatsinking when mounted on ≥1 in² copper. |
| Qg (total gate charge) | 30.5 nC @ 4.5 V - Low drive energy requirement reduces gate driver power loss and EMI during hard switching. |
| RthJC (junction-to-case) | 1.2 °C/W typical - Matches DPAK thermal performance, enabling direct replacement in thermally constrained layouts. |
| EAS | 125 mJ - Rated single-pulse avalanche energy ensures robustness against inductive switching transients in DC/DC converters. |
Pinout & Package
PowerPAK® SO-8 is a leadless, surface-mount package with 8 terminals arranged in standard SO-8 footprint (6.15 mm × 5.15 mm), featuring exposed copper drain pads on the bottom for enhanced thermal transfer. The package is halogen-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control terminal; accepts 0–20 V gate drive; low input capacitance (Ciss = 3660 pF) minimizes Miller effect. |
| 2 (S) | Source | Reference node for gate drive; connected to power ground plane; low-inductance layout essential for stability. |
| 3 (S) | Source | Second source connection; paralleled with Pin 2 to reduce source inductance and improve switching speed. |
| 4 (S) | Source | Third source connection; provides additional low-impedance return path for high di/dt currents. |
| 5 (D) | Drain | Main power output node; tied internally to bottom-side exposed copper pad for thermal and electrical conduction. |
| 6 (D) | Drain | Second drain connection; electrically and thermally tied to Pin 5 and bottom pad for current sharing. |
| 7 (D) | Drain | Third drain connection; enhances current handling and thermal spreading across PCB copper area. |
| 8 (D) | Drain | Fourth drain connection; completes symmetric drain layout for balanced current distribution and reduced parasitic inductance. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen III silicon | Delivers 2.8 mΩ RDS(on) at 10 V in SO-8 footprint - 40 % lower than prior-gen equivalents, reducing conduction loss in high-current POLs. |
| 100 % Rg and UIS tested | Ensures gate resistance consistency and ruggedness against unclamped inductive switching stress - critical for reliable server VRM operation. |
| PowerPAK® SO-8 package | Provides DPAK-equivalent thermal resistance (1.2 °C/W) in SO-8 outline, enabling drop-in thermal upgrade without board redesign. |
| Halogen-free & RoHS compliant | Meets IEC 61249-2-21 and Directive 2002/95/EC - required for environmentally regulated computing and telecom equipment. |
| Low Qgd/Qg ratio | Qgd = 9.6 nC / Qg = 30.5 nC ≈ 0.31 - suppresses Miller-induced shoot-through in synchronous rectification, improving efficiency above 500 kHz. |
Applications
| Server POL Converter | Notebook PC VRM |
|---|---|
Use Scenario: High-current point-of-load converter supplying CPU core voltage (0.8–1.3 V) from 12 V input in 1U rack servers. IC Role / Device Role: Low-side synchronous rectifier MOSFET in multiphase buck converter, conducting up to 50 A per phase with minimal conduction loss. Use Value: 2.8 mΩ RDS(on) at 10 V enables <0.5 W loss at 15 A, directly improving system efficiency and reducing thermal load on adjacent components. | Use Scenario: Compact, high-density VRM on thin-and-light notebook motherboard powering GPU or SoC at ≤1 V with tight transient response. IC Role / Device Role: Low-side switch operating with 5 V gate drive in 300–600 kHz buck stage, leveraging low Qg for fast turn-on/turn-off. Use Value: 30.5 nC Qg at 4.5 V reduces gate driver power consumption by ~35 % vs. legacy SO-8 MOSFETs, easing thermal management in space-constrained layouts. |
| ORing FET for Hot-Swap | Industrial DC/DC Module |
Use Scenario: Redundant 12 V power rail ORing application in telecom shelf where back-to-back MOSFETs prevent reverse current during hot-swap events. IC Role / Device Role: Single N-channel MOSFET configured as ideal diode with external gate control, replacing Schottky diodes to eliminate forward voltage drop. Use Value: 0.71 V body diode forward voltage (VSD) at 4 A and low RDS(on) cut conduction loss by >60 % vs. 0.45 V Schottky, improving power budget in dual-rail systems. | Use Scenario: Isolated 24 V to 5 V DC/DC module for industrial PLC I/O modules requiring high reliability and extended temperature operation. IC Role / Device Role: Low-side switch in primary-side active clamp or secondary-side synchronous rectifier, operating continuously at TJ up to 125 °C. Use Value: RDS(on) increase normalized to 1.4× at 125 °C (vs. 25 °C) ensures predictable loss rise - verified across -55 °C to 150 °C operating range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 30 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR872DP-T1-GE3 | RDS(on) = 3.2 mΩ @ 10 V; Qg = 27.5 nC; same PowerPAK SO-8 package and pinout. | Slightly higher conduction loss but lower gate charge - better suited for very high-frequency (>1 MHz) POLs where switching loss dominates. | Select SiR872DP-T1-GE3 when optimizing for gate drive efficiency over absolute lowest RDS(on). |
| IRF7478PBF | Standard SO-8 package; RDS(on) = 3.8 mΩ @ 10 V; RthJC = 16 °C/W - 13× worse thermal resistance than SIR818DP-T1-GE3. | Not suitable for high-current or thermally dense layouts; requires significant PCB copper or heatsinking to match SIR818DP-T1-GE3 thermal performance. | Choose IRF7478PBF only for cost-sensitive, low-power (<10 A) applications where thermal headroom is abundant. |
Compared with SiR872DP-T1-GE3 and IRF7478PBF, SIR818DP-T1-GE3 delivers the lowest RDS(on) in its class with DPAK-matching thermal resistance - making it optimal for high-current, space-constrained POL and server VRM designs where conduction loss and junction temperature are limiting factors.
Availability
SIR818DP-T1-GE3 is available at Aetrix Electronics and suitable for server power delivery, notebook VRMs, and industrial DC/DC modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SIR818DP-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, reliability, and miniaturization.
The SIR818DP-T1-GE3 belongs to Vishay's TrenchFET® Gen III Power MOSFET product line, engineered specifically for high-current, high-frequency DC/DC conversion in computing, telecom, and industrial power systems where low RDS(on) and superior thermal performance are critical.
FAQ
What is the maximum continuous drain current rating for SIR818DP-T1-GE3 at 70 °C case temperature?
The SIR818DP-T1-GE3 supports 50 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating is package-limited and assumes proper PCB thermal design with adequate copper area under the exposed drain pad to maintain junction temperature ≤150 °C.
Does SIR818DP-T1-GE3 support logic-level gate drive?
Yes, SIR818DP-T1-GE3 is fully compatible with logic-level gate drive: its RDS(on) is specified at 3.3 mΩ @ VGS = 4.5 V, and gate threshold voltage (VGS(th)) ranges from 1.0 V to 2.4 V, ensuring robust turn-on with standard 5 V microcontroller or PWM controller outputs.
What is the thermal resistance from junction to ambient for SIR818DP-T1-GE3 on a standard 1" x 1" FR4 board?
On a 1" x 1" FR4 board, the SIR818DP-T1-GE3 has a typical junction-to-ambient thermal resistance (RthJA) of 19 °C/W and a maximum of 24 °C/W, as measured under standard test conditions (Note b in datasheet). Performance improves significantly with added copper area or multilayer boards.
Is SIR818DP-T1-GE3 suitable for ORing applications, and what body diode characteristics support this use?
Yes, SIR818DP-T1-GE3 is well-suited for ORing due to its low VSD (0.71 V typical at 4 A) and fast body diode recovery (trr = 29 ns typical). These parameters minimize forward conduction loss and reverse recovery spikes when used as an ideal diode in redundant power systems.
How does the PowerPAK® SO-8 package of SIR818DP-T1-GE3 differ from standard SO-8 in terms of thermal performance and layout compatibility?
The PowerPAK® SO-8 package of SIR818DP-T1-GE3 retains full pinout and footprint compatibility with standard SO-8 but replaces leads with exposed copper drain pads on the bottom. This yields RthJC = 1.2 °C/W - matching DPAK - versus 16 °C/W for standard SO-8, enabling direct thermal upgrade without PCB redesign.
SIR818DP-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 50A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 2.8mOhm @ 20A, 10V
- Vgs(th) (Max) @ Id:
- 2.4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 95 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3660 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 5.2W (Ta), 69W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIR818DP-T1-GE3 FAQ
1.How can I place an order for SIR818DP-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIR818DP-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIR818DP-T1-GE3 reliable?
The price and inventory of SIR818DP-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIR818DP-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIR818DP-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIR818DP-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIR818DP-T1-GE3?
SIR818DP-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIR818DP-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIR818DP-T1-GE3?
For technical support, including SIR818DP-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIR818DP-T1-GE3 requirements.
6.How does Aetrix verify that SIR818DP-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIR818DP-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIR818DP-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIR818DP-T1-GE3?
All SIR818DP-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIR818DP-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIR818DP-T1-GE3 part is unused and in its original packaging.
Return procedure for SIR818DP-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIR818DP-T1-GE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
