Vishay Siliconix SIR820DP-T1-GE3
- Part No.:
- SIR820DP-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIR820DP-T1-GE3.pdf
- Description:
- MOSFET N-CH 30V 40A PPAK SO-8
- Quantity:
- Payment:

- Shipping:

Inventory:2,013
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SIR820DP-T1-GE3 from Vishay Siliconix is an N-channel 30 V (D-S) TrenchFET® power MOSFET in PowerPAK® SO-8 package, rated for 40 A continuous drain current at TC = 25 °C, with RDS(on) of 3.0 mΩ at VGS = 10 V and 3.8 mΩ at VGS = 4.5 V, used as low-side switch in DC/DC converters for notebook PCs, graphics cards, and server power stages.
For engineers reviewing the SIR820DP-T1-GE3 datasheet, SIR820DP-T1-GE3 pinout, SIR820DP-T1-GE3 application, or SIR820DP-T1-GE3 equivalent, key selection criteria include its 3.0 mΩ on-resistance at 10 V gate drive, 28.6 nC total gate charge, 70 °C/W maximum junction-to-ambient thermal resistance (t ≤ 10 s), robust 100 % Rg and UIS testing, and compatibility with standard SO-8 PCB footprints while delivering DPAK-level thermal performance.
Technical Context
This MOSFET employs trench-gate silicon technology optimized for high-current, low-voltage switching in synchronous buck converters. Its gate threshold voltage (1.2–2.4 V) enables reliable turn-on with 4.5 V logic-level drive, and its low Qgd (7.3 nC typ.) supports fast, low-loss switching transitions.
The device integrates a robust body diode with 0.74–1.1 V forward voltage at 5 A and 15–30 ns reverse recovery time, enabling efficient freewheeling in hard-switched topologies. Thermal design leverages the exposed drain pad of the leadless PowerPAK SO-8 package, achieving 3.5 °C/W typical junction-to-case resistance for direct board-level heat sinking.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage for 12 V and 24 V input DC/DC stages |
| RDS(on) @ VGS = 10 V | 3.0 mΩ - Enables <1 W conduction loss at 18 A in high-efficiency low-side switch applications |
| RDS(on) @ VGS = 4.5 V | 3.8 mΩ - Supports logic-level gate drive without level-shifting in compact portable power designs |
| Qg | 28.6 nC (typ.) - Determines gate driver power requirement and switching loss trade-off at 500 kHz–1 MHz |
| ID (TC = 25 °C) | 40 A - Continuous current rating under heatsink-mounted conditions, suitable for >100 W point-of-load rails |
| RthJC | 3.5 °C/W (typ.) - Enables direct thermal coupling to PCB copper, reducing die temperature rise vs. standard SO-8 |
| UIS Tested | 100 % production tested - Guarantees ruggedness against inductive switching stress in real-world converter layouts |
Pinout & Package
Package: PowerPAK® SO-8 - leadless, surface-mount package with same 6.15 mm × 5.15 mm footprint and pinout as standard SO-8, featuring exposed drain pad on bottom for enhanced thermal conduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source terminals reduce source inductance and improve current sharing in high-di/dt switching |
| 5 | Gate (G) | Single gate input with 0.2–1.3 Ω gate resistance - sets Miller charge control and switching speed stability |
| 6, 7, 8 | Drain (D) | Three large-area drain terminals connected to exposed bottom pad - primary thermal and current path to PCB |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® process technology | Delivers lowest RDS(on) per die area among Vishay's 30 V SO-8 footprint MOSFETs, enabling higher power density |
| 100 % Rg and UIS tested | Ensures gate robustness and avalanche energy handling (20 mJ) without derating in unclamped inductive loads |
| PowerPAK SO-8 package | Provides DPAK-equivalent thermal resistance (3.5 °C/W) in SO-8 footprint - eliminates need for layout redesign |
| Low Qgd / Qg ratio | 0.255 (7.3/28.6) - minimizes Miller-induced shoot-through risk and improves controllability in high-frequency sync-buck |
| Body diode trr | 15–30 ns - reduces reverse recovery losses and EMI in hard-switched converters operating up to 1 MHz |
Applications
| Server VRM Low-Side Switch | Notebook CPU Core Supply |
|---|---|
Use Scenario: High-current, high-efficiency 3-phase buck converter supplying 1–2 V @ 100+ A to modern server CPUs. IC Role / Device Role / Timing Role: Low-side synchronous rectifier switch operating at 300–600 kHz with 40 A peak current capability. Use Value: 3.0 mΩ RDS(on) limits conduction loss to <1.5 W at full load, while PowerPAK thermal design maintains TJ < 125 °C without external heatsink. |
Use Scenario: Compact dual-phase buck regulator powering mobile CPU cores in ultrathin notebooks with strict height constraints. IC Role / Device Role / Timing Role: Logic-level (4.5 V) low-side switch enabling direct PWM controller interface and minimizing gate drive complexity. Use Value: 3.8 mΩ RDS(on) at 4.5 V ensures <1.2 W loss at 18 A, and 1.27 mm package height fits sub-3 mm system stack-ups. |
| GPU Power Delivery | Industrial DC/DC Module |
Use Scenario: Multi-phase 12 V input to 0.8–1.2 V output converter for discrete graphics processing units requiring transient response < 1 μs. IC Role / Device Role / Timing Role: Low-inductance, low-RDS(on) low-side FET placed adjacent to controller for minimal loop area and optimal dv/dt immunity. Use Value: Four-source-pin configuration reduces source inductance by ~40 % vs. single-source SO-8, improving switching waveform fidelity and reducing EMI filtering burden. |
Use Scenario: Isolated 48 V to 12 V intermediate bus converter in industrial PLC or motor drive systems with extended ambient temperature range. IC Role / Device Role / Timing Role: Primary low-side switch in non-isolated secondary-side regulation stage, operating continuously at TA = 70 °C. Use Value: Rated 18.7 A at TA = 70 °C with 22–27 °C/W RthJA ensures stable operation without forced air, supporting fanless enclosure designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 30 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SiR822DP-T1-GE3 | Higher RDS(on): 3.3 mΩ @ 10 V; identical PowerPAK SO-8 package and pinout | Slightly lower current capability (38 A vs. 40 A) but same thermal and layout compatibility | Select when marginally higher on-resistance is acceptable for cost optimization in mid-power designs |
| IRLHS6342TRPBF | Different package (PowerPAIR® 3.3 × 3.3 mm); RDS(on) = 3.2 mΩ @ 4.5 V; Qg = 22 nC | Smaller footprint and lower gate charge, but requires new PCB layout and has lower ID rating (30 A) | Prefer for space-constrained portable designs where gate drive efficiency outweighs layout reuse needs |
Compared with SIR820DP-T1-GE3, SiR822DP-T1-GE3 offers identical mechanical fit with minor conduction loss trade-off, while IRLHS6342TRPBF sacrifices layout compatibility for size and gate-drive efficiency - making SIR820DP-T1-GE3 optimal for high-current, drop-in SO-8 footprint upgrades.
Availability
SIR820DP-T1-GE3 is available at Aetrix Electronics and suitable for server VRMs, notebook CPU core supplies, GPU power delivery, and industrial DC/DC modules requiring stable component supply across multi-year production cycles.
Supply support for SIR820DP-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency and reliability.
The SIR820DP-T1-GE3 belongs to Vishay's TrenchFET® Gen IV PowerPAK® SO-8 family, engineered specifically for high-current, high-frequency DC/DC conversion in computing and communications infrastructure where thermal density and layout reuse are critical.
FAQ
What is the maximum continuous drain current rating for SIR820DP-T1-GE3 at 70 °C case temperature?
The SIR820DP-T1-GE3 is rated for 40 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This rating reflects package-limited conduction capability under heatsink-cooled conditions and is validated by 100 % UIS and Rg production testing. The value remains unchanged from the TC = 25 °C rating due to thermal design headroom in the PowerPAK SO-8 construction.
Does SIR820DP-T1-GE3 support logic-level gate drive, and what is its guaranteed RDS(on) at 4.5 V?
Yes, SIR820DP-T1-GE3 supports logic-level gate drive with a gate threshold voltage range of 1.2–2.4 V and guaranteed RDS(on) of 3.8 mΩ maximum at VGS = 4.5 V and ID = 10 A. This enables direct interfacing with 3.3 V or 5 V PWM controllers without gate drivers in space-constrained applications like notebook CPU VRMs.
Is SIR820DP-T1-GE3 pin-compatible with standard SO-8 MOSFETs, and what mechanical changes are required?
Yes, SIR820DP-T1-GE3 uses the PowerPAK® SO-8 package with identical 6.15 mm × 5.15 mm footprint and pinout as standard SO-8 devices. No PCB layout changes are needed - it mounts directly to existing SO-8 land patterns. The only difference is the exposed drain pad on the bottom, which enhances thermal performance without altering top-side routing.
What is the total gate charge (Qg) specification for SIR820DP-T1-GE3, and how does it impact switching loss?
The SIR820DP-T1-GE3 has a typical total gate charge (Qg) of 28.6 nC at VDS = 15 V, VGS = 10 V, and ID = 10 A. This value determines gate driver power consumption and contributes directly to switching loss; at 1 MHz operation, it results in ~286 μW of gate drive loss per MHz, making it suitable for high-frequency synchronous buck converters where driver efficiency is critical.
How is thermal performance of SIR820DP-T1-GE3 characterized, and what is its junction-to-case resistance?
The SIR820DP-T1-GE3 has a typical junction-to-case (drain) thermal resistance (RthJC) of 3.5 °C/W under steady-state conditions, measured from die junction to the exposed drain pad. This value enables direct thermal coupling to PCB copper planes, delivering DPAK-level cooling in an SO-8 footprint - verified by thermal transient impedance curves and comparative testing on 4-layer FR-4 boards.
SIR820DP-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 3mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 95 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3512 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 37.8W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIR820DP-T1-GE3 FAQ
1.How can I place an order for SIR820DP-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIR820DP-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIR820DP-T1-GE3 reliable?
The price and inventory of SIR820DP-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIR820DP-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIR820DP-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIR820DP-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIR820DP-T1-GE3?
SIR820DP-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIR820DP-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIR820DP-T1-GE3?
For technical support, including SIR820DP-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIR820DP-T1-GE3 requirements.
6.How does Aetrix verify that SIR820DP-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIR820DP-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIR820DP-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIR820DP-T1-GE3?
All SIR820DP-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIR820DP-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIR820DP-T1-GE3 part is unused and in its original packaging.
Return procedure for SIR820DP-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SIR820DP-T1-GE3 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

