Vishay Siliconix SIRA84BDP-T1-GE3
- Part No.:
- SIRA84BDP-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SIRA84BDP-T1-GE3.pdf
- Description:
- MOSFET N-CH 30V 22A/70A PPAK SO8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SIRA84BDP-T1-GE3 from Vishay Siliconix is an N-channel 30 V TrenchFET® Gen IV power MOSFET in PowerPAK® SO-8 package, delivering RDS(on) = 4.6 mΩ at VGS = 10 V and 7.1 mΩ at VGS = 4.5 V, with 70 A continuous drain current (TC = 25 °C), optimized for high-efficiency synchronous rectification in DC/DC converters.
For engineers reviewing the SIRA84BDP-T1-GE3 datasheet, SIRA84BDP-T1-GE3 pinout, SIRA84BDP-T1-GE3 application, or SIRA84BDP-T1-GE3 equivalent, this device supports high-power-density VRMs, embedded DC/DC modules, and low-voltage, high-current switching where low conduction loss and fast switching are critical.
Technical Context
This MOSFET employs trench-based silicon architecture to achieve ultra-low on-resistance and enhanced gate charge efficiency. Its 10.6 nC total gate charge (at VGS = 4.5 V) and 0.0052 Ω typical RDS(on) at 4.5 V enable efficient operation in 5 V–12 V gate-driven synchronous buck stages.
The device integrates a robust body diode with 0.8–1.1 V forward voltage at 10 A and 20–40 ns reverse recovery time, supporting bidirectional current handling in multiphase topologies. Thermal resistance RthJC is 2.7 °C/W (typical), enabling high-power dissipation with minimal case-to-junction temperature rise.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum drain-source blocking voltage for 12 V input rail systems with margin. |
| RDS(on) @ 10 V | 4.6 mΩ max - Enables ≤0.5 W conduction loss at 10 A, critical for <1% efficiency loss in high-current VRMs. |
| RDS(on) @ 4.5 V | 7.1 mΩ max - Supports direct drive from 5 V controllers without level-shifting, reducing BOM count. |
| Qg | 10.6 nC typ. @ 4.5 V - Low gate charge minimizes driver power and switching loss in 300–1000 kHz DC/DC designs. |
| ID (continuous) | 70 A @ TC = 25 °C - Sustains high output currents in compact, thermally managed PCB layouts. |
| VGS(th) | 1.2–2.4 V - Ensures reliable turn-on with standard logic-level gate drivers and avoids false triggering. |
| RthJC | 2.7 °C/W typ. - Allows >20 W power dissipation with ≤55 °C junction rise above case, supporting high-density thermal design. |
Pinout & Package
Package: PowerPAK® SO-8 (leadless, exposed copper drain pads on bottom side; dimensions: 6.15 mm × 5.15 mm × 1.04 mm).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Source (S) | Four parallel source terminals reduce source inductance and improve current sharing in high-di/dt applications. |
| 5, 6, 7, 8 | Drain (D) | Four exposed-copper drain pads on bottom surface provide low-inductance, high-current path to PCB ground plane. |
| G (pin 1 top-side marking) | Gate (G) | Single gate terminal located at corner; layout-compatible with standard SO-8 footprint but requires leadless reflow profile. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV process | Delivers 30% lower RDS(on) × Qg figure-of-merit vs. prior generation, improving switching efficiency in high-frequency DC/DC. |
| 100% Rg and UIS tested | Ensures gate resistance consistency (<0.3–2.8 Ω) and ruggedness against unclamped inductive switching events in real-world loads. |
| PowerPAK® SO-8 package | Reduces thermal resistance by 50% vs. standard SO-8; enables >2× higher current density without heatsink in space-constrained modules. |
| Body diode trr = 20–40 ns | Minimizes reverse recovery loss during synchronous FET commutation, directly improving light-load efficiency. |
| Lead (Pb)-free and halogen-free | Complies with RoHS 2011/65/EU and JEDEC JS709A, supporting environmentally compliant industrial and computing end equipment. |
Applications
| Server VRM Phase Legs | GPU Power Delivery |
|---|---|
Use Scenario: High-current, multi-phase buck converter supplying core voltage to Intel/AMD CPUs in data center servers. IC Role / Device Role / Timing Role: Low-side synchronous rectifier in 300–600 kHz phase-leg topology, conducting up to 70 A per phase. Use Value: 4.6 mΩ RDS(on) reduces conduction loss by ≥1.5 W per phase vs. 6 mΩ alternatives, lowering thermal load and fan power. |
Use Scenario: Point-of-load regulator delivering 0.8–1.2 V at >500 A to discrete GPUs in AI accelerators and gaming workstations. IC Role / Device Role / Timing Role: High-current, low-VDS switch in paralleled dual-phase configuration with tight thermal coupling. Use Value: 2.7 °C/W RthJC allows direct thermal coupling to copper pour, sustaining >60 A continuous without derating at 85 °C ambient. |
| Telecom DC/DC Modules | Industrial PLC Power Supplies |
Use Scenario: 48 V–12 V intermediate bus converter in 1 RU telecom shelf with strict size and efficiency targets. IC Role / Device Role / Timing Role: Primary-side synchronous rectifier in isolated forward or active-clamp forward topology. Use Value: 7.1 mΩ RDS(on) at 4.5 V enables direct drive from PWM controller, eliminating gate driver IC and saving board area. |
Use Scenario: 24 V input, 3.3/5/12 V output triple-rail power supply in programmable logic controller backplane. IC Role / Device Role / Timing Role: Secondary-side switch in non-isolated buck regulators powering FPGA I/O banks and microcontrollers. Use Value: 100% UIS tested rating ensures survival under motor-drive-induced inductive transients and ESD events in factory-floor environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRL8721PBF | RDS(on) = 5.8 mΩ @ 4.5 V; Qg = 13.5 nC; TO-220 package (larger footprint, higher RthJA) | Requires heatsink and larger PCB area; less suitable for ultra-thin modules or high-density server VRMs. | Select when mechanical mounting or legacy TO-220 compatibility is required over thermal density. |
| DMTH3007LPSQ-13 | RDS(on) = 5.2 mΩ @ 4.5 V; Qg = 12.5 nC; PowerDI 5060 package (smaller than PowerPAK SO-8, lower current rating) | Max ID = 42 A (TC = 25 °C); insufficient for >50 A phase-leg designs without paralleling. | Select for space-constrained, medium-current (<40 A) industrial SMPS where footprint reduction outweighs peak current need. |
Compared with IRL8721PBF and DMTH3007LPSQ-13, SIRA84BDP-T1-GE3 delivers the lowest RDS(on) × Qg product in a thermally superior leadless package, making it optimal for high-current, high-efficiency, and space-limited synchronous rectification where both conduction and switching losses must be minimized simultaneously.
Availability
SIRA84BDP-T1-GE3 is available at Aetrix Electronics and suitable for server VRMs, GPU power delivery, telecom DC/DC modules, industrial PLC power supplies, and embedded computing requiring stable component supply across multi-year production cycles.
Supply support for SIRA84BDP-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics for power management and signal conditioning.
The SIRA84BDP-T1-GE3 belongs to Vishay's TrenchFET® Gen IV power MOSFET family, engineered specifically for high-efficiency, high-current synchronous rectification in next-generation computing and communications power systems.
FAQ
What is the maximum continuous drain current rating for SIRA84BDP-T1-GE3 at 70 °C case temperature?
The SIRA84BDP-T1-GE3 supports 56 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the PowerPAK® SO-8 package and ensures safe operation under sustained high-power conditions without exceeding the 150 °C maximum junction temperature. The SIRA84BDP-T1-GE3 maintains full functionality within this range when mounted on appropriate copper area per Vishay's recommended pad layout.
Does SIRA84BDP-T1-GE3 require a gate driver IC when used with a 5 V PWM controller?
No, the SIRA84BDP-T1-GE3 does not require an external gate driver IC when driven by a 5 V PWM controller. Its gate threshold voltage (VGS(th)) ranges from 1.2 V to 2.4 V, and its RDS(on) is fully characterized at VGS = 4.5 V (7.1 mΩ max), enabling direct logic-level drive. The SIRA84BDP-T1-GE3's 10.6 nC total gate charge at 4.5 V further ensures manageable drive requirements for standard microcontroller or PWM IC outputs.
What is the thermal resistance from junction to case (RthJC) for SIRA84BDP-T1-GE3, and how is it measured?
The SIRA84BDP-T1-GE3 has a typical junction-to-case thermal resistance (RthJC) of 2.7 °C/W, with a maximum of 3.5 °C/W, measured under steady-state conditions from the silicon die to the exposed drain paddle. This value is validated using standardized test methods per JESD51-1 and applies when the device is soldered to a PCB with adequate copper thermal mass per Vishay's PowerPAK® SO-8 layout guidelines. The SIRA84BDP-T1-GE3 leverages its four-drain-pad construction to achieve this low RthJC.
Can SIRA84BDP-T1-GE3 be used in avalanche-rated circuits?
Yes, the SIRA84BDP-T1-GE3 is rated for single-pulse avalanche energy (EAS) of 11.3 mJ and single-pulse avalanche current (IAS) of 15 A (L = 0.1 mH), confirming its capability to withstand controlled inductive switching transients. These ratings are verified per JEDEC standards and apply to short-duration, non-repetitive events. For SIRA84BDP-T1-GE3, avalanche operation should remain within datasheet limits and not be relied upon for continuous protection-external clamping remains recommended for repetitive stress.
Is SIRA84BDP-T1-GE3 compatible with standard SO-8 reflow profiles?
No, SIRA84BDP-T1-GE3 is not compatible with standard SO-8 reflow profiles due to its leadless PowerPAK® SO-8 construction. It requires adherence to Vishay's specific solder profile (document 73257), including peak temperature ≤260 °C and controlled ramp rates to ensure void-free solder joints on the exposed drain pads. Manual soldering with an iron is explicitly discouraged. The SIRA84BDP-T1-GE3 demands precise thermal management during assembly to maintain reliability and thermal performance.
SIRA84BDP-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen IV
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 22A (Ta), 70A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 4.6mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 32 nC @ 10 V
- Vgs (Max):
- +20V, -16V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1050 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 3.7W (Ta), 36W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SIRA84BDP-T1-GE3 FAQ
1.How can I place an order for SIRA84BDP-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SIRA84BDP-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SIRA84BDP-T1-GE3 reliable?
The price and inventory of SIRA84BDP-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SIRA84BDP-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SIRA84BDP-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SIRA84BDP-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SIRA84BDP-T1-GE3?
SIRA84BDP-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SIRA84BDP-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SIRA84BDP-T1-GE3?
For technical support, including SIRA84BDP-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SIRA84BDP-T1-GE3 requirements.
6.How does Aetrix verify that SIRA84BDP-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SIRA84BDP-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SIRA84BDP-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SIRA84BDP-T1-GE3?
All SIRA84BDP-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SIRA84BDP-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SIRA84BDP-T1-GE3 part is unused and in its original packaging.
Return procedure for SIRA84BDP-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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