Vishay Siliconix SISS30LDN-T1-GE3
- Part No.:
- SISS30LDN-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8S
- Datasheet:
-
SISS30LDN-T1-GE3.pdf
- Description:
- MOSFET N-CH 80V 16A/55.5A PPAK
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SISS30LDN-T1-GE3 from Vishay Siliconix is an N-channel 80 V (D-S) TrenchFET® Gen IV power MOSFET in PowerPAK® 1212-8S package, with RDS(on) = 8.5 mΩ @ VGS = 10 V, Qg = 15.2 nC @ VGS = 4.5 V, and 55.5 A continuous drain current at TC = 25 °C - optimized for high-efficiency synchronous rectification and DC/DC converter primary-side switching.
For engineers reviewing the SISS30LDN-T1-GE3 datasheet, SISS30LDN-T1-GE3 pinout, SISS30LDN-T1-GE3 application, or SISS30LDN-T1-GE3 equivalent, key selection criteria include its low RDS(on) × Qoss figure-of-merit, 100 % Rg and UIS tested reliability, and thermal performance with RthJC = 1.7 °C/W (typical) for high-power-density industrial and solar microinverter designs.
Technical Context
This MOSFET employs TrenchFET® Gen IV silicon technology to achieve a tuned balance between conduction loss (RDS(on)) and switching loss (Qg, Qoss, Ciss). Its gate threshold voltage (VGS(th) = 1–2.5 V) enables robust 4.5 V logic-level drive compatibility while maintaining tight control over turn-on behavior across temperature.
The device integrates a fast body diode with trr = 35 ns (typ.) and Qrr = 49 nC (typ.), supporting high-frequency hard-switched and synchronous rectifier topologies. Its PowerPAK 1212-8S leadless package delivers low-inductance source connections and enhanced thermal transfer via exposed drain copper on the bottom side.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 80 V - supports primary-side switching in 48 V input DC/DC converters and solar microinverters up to 60 V bus. |
| RDS(on) max @ 10 V | 8.5 mΩ - enables ≤ 4.7 W conduction loss at 55.5 A, critical for thermally constrained PCB layouts. |
| RDS(on) max @ 4.5 V | 12.2 mΩ - ensures reliable enhancement-mode operation with standard 5 V microcontroller GPIO or PWM drivers. |
| Qg typ @ 4.5 V | 15.2 nC - reduces gate drive power and enables efficient operation at ≥ 500 kHz switching frequencies. |
| ID continuous @ TC = 25 °C | 55.5 A - supports high-current motor drive and battery switch applications without external heatsinking. |
| RthJC (typ.) | 1.7 °C/W - allows direct thermal coupling to copper planes or heatsinks, enabling > 40 W steady-state dissipation. |
| Body diode VSD | 0.77 V (typ.) - lowers reverse recovery losses in synchronous rectification vs. discrete Schottky alternatives. |
Pinout & Package
PowerPAK® 1212-8S is a surface-mount, leadless, 3.3 mm × 3.3 mm package with exposed drain pad on the bottom side. The top-side terminals are arranged in two rows of four pins; pins 1–4 are Source, pins 5–8 are Drain, and pin 2 is Gate (confirmed by top-view diagram and labeling in datasheet S25-0354).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 3, 4 | Source | Low-inductance return path for high di/dt currents; electrically tied to exposed drain pad via internal substrate connection. |
| 2 | Gate | Control terminal with Rg = 0.82 Ω (typ.); requires <16 nC gate charge for full enhancement at 4.5 V. |
| 5–8 | Drain | High-current output node; connected to large-area exposed copper on bottom side for thermal and electrical conduction. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen IV silicon | Delivers industry-leading RDS(on) × Qoss FOM for reduced switching + conduction loss trade-off in high-frequency SMPS. |
| 100 % Rg and UIS tested | Ensures gate robustness against transient overvoltage and avalanche energy tolerance (EAS = 20 mJ) in unclamped inductive switching. |
| Exposed drain thermal pad | Enables direct thermal interface to PCB ground plane or heatsink, achieving RthJC = 1.7 °C/W (typ.) without solder paste voiding concerns. |
| Low Qgd/Qg ratio | Qgd = 3.9 nC / Qg = 15.2 nC → ~26 % - improves Miller immunity and reduces risk of spurious turn-on in high-dV/dt environments. |
Applications
| Synchronous Rectification | Primary-Side Switch |
|---|---|
Use Scenario: Secondary-side synchronous rectifier in isolated 12 V/48 V output LLC resonant converters for telecom and server PSUs. IC Role / Device Role / Timing Role: Low-VDS power switch replacing Schottky diodes to reduce forward voltage drop and improve efficiency at light-to-full load. Use Value: Achieves >0.5 % system efficiency gain over 40 V Schottky due to 0.77 V VSD and low RDS(on) conduction loss. |
Use Scenario: High-side switch in non-isolated buck converters powering FPGA core rails in industrial edge controllers. IC Role / Device Role / Timing Role: Main power switch handling 55.5 A peak current with fast 6 ns rise time and 10 ns turn-on delay for precise PWM control. Use Value: Enables 95 %+ efficiency at 500 kHz with minimal gate drive loss thanks to 15.2 nC Qg at 4.5 V. |
| Solar Microinverter | Motor Drive Switch |
Use Scenario: Half-bridge leg in single-phase transformerless solar microinverters interfacing 30–60 V PV strings. IC Role / Device Role / Timing Role: High-reliability, avalanche-rated switch managing bidirectional current flow and reverse recovery during MPPT modulation. Use Value: 20 mJ EAS rating and 35 ns trr support safe operation under partial shading-induced transients without snubbers. |
Use Scenario: Phase-leg switch in 24 V BLDC motor drives for automated guided vehicles (AGVs) and HVAC blowers. IC Role / Device Role / Timing Role: Fast-switching, low-RDS(on) MOSFET delivering 51.8 A continuous source-drain diode current for regenerative braking. Use Value: Body diode VSD = 0.77 V minimizes heat generation during freewheeling, reducing thermal stress on PCB copper. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 80 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF7470PBF | RDS(on) = 11.5 mΩ @ 10 V; Qg = 22 nC @ 4.5 V; TO-252 package; RthJA = 62 °C/W (typ.) | Higher thermal resistance limits power density; less suitable for compact microinverter modules. | Prefer SISS30LDN-T1-GE3 where board space and thermal performance are constrained. |
| DMTH8006LSD-13 | RDS(on) = 7.2 mΩ @ 10 V; Qg = 20.5 nC @ 4.5 V; PowerDI 5060 package; no 100 % UIS test documented | Lower RDS(on) but higher Qg increases gate drive loss; lacks explicit UIS qualification. | Choose SISS30LDN-T1-GE3 when avalanche ruggedness and low Qg are prioritized over minimal RDS(on). |
Compared with IRF7470PBF and DMTH8006LSD-13, SISS30LDN-T1-GE3 offers superior thermal performance (RthJC = 1.7 °C/W), lower gate charge at 4.5 V, and guaranteed UIS testing - making it optimal for high-reliability, high-frequency, space-constrained industrial and renewable energy systems.
Availability
SISS30LDN-T1-GE3 is available at Aetrix Electronics and suitable for solar microinverter, industrial motor drive, and high-efficiency DC/DC converter applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SISS30LDN-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in power MOSFETs, diodes, and optoelectronics with emphasis on high-reliability, high-efficiency solutions for industrial and automotive markets.
The SISS30LDN-T1-GE3 belongs to Vishay's TrenchFET® Gen IV power MOSFET product line, engineered specifically for high-frequency, high-efficiency switching in space-constrained power conversion systems including solar, computing, and motor control.
FAQ
What is the maximum continuous drain current rating for SISS30LDN-T1-GE3 at 70 °C case temperature?
The SISS30LDN-T1-GE3 supports 44 A continuous drain current at TC = 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limitations of the PowerPAK 1212-8S package under sustained high-power operation and must be validated against actual board layout and airflow conditions. The SISS30LDN-T1-GE3 datasheet confirms this value under steady-state conditions with proper PCB copper area.
Does SISS30LDN-T1-GE3 support 4.5 V gate drive in practical applications?
Yes, SISS30LDN-T1-GE3 is fully characterized for 4.5 V gate drive, with RDS(on) = 12.2 mΩ (max) and Qg = 15.2 nC (typ.) at that voltage. Its VGS(th) range of 1–2.5 V ensures strong enhancement even with marginal gate drive margins, making it compatible with standard 5 V logic and microcontroller outputs. The SISS30LDN-T1-GE3 has been validated in synchronous rectifier designs operating exclusively at 4.5 V gate bias.
What is the thermal resistance from junction to case (RthJC) for SISS30LDN-T1-GE3?
The SISS30LDN-T1-GE3 has a typical junction-to-case thermal resistance (RthJC) of 1.7 °C/W, with a maximum of 2.2 °C/W, as measured from the silicon die to the exposed drain pad. This low value is enabled by the PowerPAK 1212-8S package's direct copper thermal path and is critical for high-power-density designs. The SISS30LDN-T1-GE3 thermal performance is documented in the Thermal Resistance Ratings section of Vishay's S25-0354 datasheet.
Is SISS30LDN-T1-GE3 qualified for avalanche energy handling?
Yes, SISS30LDN-T1-GE3 is 100 % UIS (unclamped inductive switching) tested and rated for single-pulse avalanche energy (EAS) of 20 mJ at TJ = 25 °C, with IAS = 20 A. This qualification ensures robustness in flyback, LLC, and other topologies where inductive energy must be safely absorbed during switching transitions. The SISS30LDN-T1-GE3 datasheet explicitly lists these parameters in the Absolute Maximum Ratings table.
What is the body diode reverse recovery time (trr) of SISS30LDN-T1-GE3?
The SISS30LDN-T1-GE3 body diode exhibits a typical reverse recovery time (trr) of 35 ns under conditions of IF = 10 A, di/dt = 100 A/μs, and TJ = 25 °C. This fast recovery supports high-frequency synchronous rectification with minimal switching loss and voltage overshoot. The SISS30LDN-T1-GE3 trr and associated Qrr = 49 nC (typ.) are specified in the Dynamic Characteristics table of the official datasheet.
SISS30LDN-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET® Gen IV
- Package/Case:
- PowerPAK® 1212-8S
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 80 V
- Current - Continuous Drain (Id) @ 25°C:
- 16A (Ta), 55.5A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 8.5mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 50 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2070 pF @ 40 V
- FET Feature:
- -
- Power Dissipation (Max):
- 4.8W (Ta), 57W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8S
SISS30LDN-T1-GE3 FAQ
1.How can I place an order for SISS30LDN-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SISS30LDN-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SISS30LDN-T1-GE3 reliable?
The price and inventory of SISS30LDN-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SISS30LDN-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SISS30LDN-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SISS30LDN-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SISS30LDN-T1-GE3?
SISS30LDN-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SISS30LDN-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SISS30LDN-T1-GE3?
For technical support, including SISS30LDN-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SISS30LDN-T1-GE3 requirements.
6.How does Aetrix verify that SISS30LDN-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SISS30LDN-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SISS30LDN-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SISS30LDN-T1-GE3?
All SISS30LDN-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SISS30LDN-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SISS30LDN-T1-GE3 part is unused and in its original packaging.
Return procedure for SISS30LDN-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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