Vishay Siliconix SISS5112DN-T1-GE3
- Part No.:
- SISS5112DN-T1-GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® 1212-8S
- Datasheet:
-
SISS5112DN-T1-GE3.pdf
- Description:
- N-CHANNEL 100 V (D-S) MOSFET POW
- Quantity:
- Payment:

- Shipping:

Inventory:11,904
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Product details
Overview
SISS5112DN-T1-GE3 from Vishay Siliconix is an N-channel 100 V (D-S) TrenchFET® Gen V power MOSFET in PowerPAK® 1212-8S package, delivering RDS(on) = 14.9 mΩ at VGS = 10 V, Qg = 8 nC typ., and 40.7 A continuous drain current at TC = 25 °C - optimized for high-efficiency synchronous rectification and primary-side switching in DC/DC converters.
For engineers reviewing the SISS5112DN-T1-GE3 datasheet, SISS5112DN-T1-GE3 pinout, SISS5112DN-T1-GE3 application, or SISS5112DN-T1-GE3 equivalent, key selection criteria include its low RDS(on) × Qoss figure-of-merit, 100% Rg and UIS tested reliability, and thermal performance with RthJC = 1.9 °C/W (typ.) for high-power density designs.
Technical Context
This MOSFET employs a trench-based silicon structure tuned for minimal conduction and switching losses, with gate charge characteristics optimized for fast turn-on/turn-off (td(on) = 9 ns, td(off) = 11 ns @ VGEN = 10 V) and low output charge (Qoss = 30 pC). Its body diode exhibits trr = 39 ns and Qrr = 39 nC, supporting efficient hard-switched and synchronous rectifier operation.
The device operates across -55 °C to +150 °C junction temperature range, features ±20 V gate-source voltage rating, and is qualified for surface-mount reflow per JEDEC J-STD-020 (peak 260 °C), with exposed copper drain pads on the bottom side for enhanced thermal conduction in the leadless PowerPAK 1212-8S package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - supports primary-side switching in 48 V input DC/DC and offline auxiliary supplies up to 80 V DC bus |
| RDS(on) max @ 10 V | 14.9 mΩ - enables <1.5 W conduction loss at 40 A, critical for high-current power stages |
| Qg typ. | 8 nC - reduces gate drive power and allows use of lower-cost drivers in high-frequency (>500 kHz) topologies |
| ID cont. @ TC = 25 °C | 40.7 A - supports compact 100 W–200 W power modules without forced airflow |
| RthJC max | 2.4 °C/W - permits direct thermal coupling to heatsinks or PCB copper for >40 W dissipation in thermally constrained layouts |
| VGS(th) | 2–4 V - ensures robust turn-on with standard 5 V or 3.3 V logic-level gate drivers |
| Ciss | 790 pF - balances EMI control and switching speed in hard-switched SMPS designs |
Pinout & Package
SISS5112DN-T1-GE3 uses the leadless PowerPAK® 1212-8S package (3.3 mm × 3.3 mm footprint, 0.75 mm nominal height), with exposed drain copper on the bottom side for thermal and electrical connection. Top-side terminals are arranged in dual-row configuration: pins 1–4 are source (S), pins 5–8 are drain (D), and pin 2 (top center) is gate (G).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 (Top) | Source (S) | Common source node; electrically and thermally tied to internal S metallization; requires full-solder coverage for current sharing and thermal relief |
| 5, 6, 7, 8 (Top) | Drain (D) | High-side switch node; connected to exposed copper pad on bottom - must be routed to large copper pour for heat dissipation |
| 2 (Top center) | Gate (G) | Control input; isolated from D/S by oxide; requires low-inductance gate loop layout to minimize ringing during fast switching |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® Gen V architecture | Delivers industry-leading RDS(on) × Qg and RDS(on) × Qoss FOMs for reduced total switching loss in high-frequency converters |
| 100 % Rg and UIS tested | Ensures gate resistance consistency and ruggedness against unclamped inductive switching stress in motor drive and flyback applications |
| Low Qgd/Qg ratio (0.087) | Minimizes Miller effect, enabling stable operation with minimal external gate resistance in high-dV/dt environments |
| VSD = 0.78 V typ. @ IS = 5 A | Reduces reverse recovery loss in synchronous rectification vs. discrete Schottky diodes, improving light-load efficiency |
| Lead (Pb)-free and halogen-free | Complies with RoHS 2011/65/EU and JEDEC JS709C, suitable for automotive and industrial end equipment requiring green compliance |
Applications
| Synchronous Rectification | Primary Side Switch |
|---|---|
Use Scenario: Secondary-side switching in isolated DC/DC converters (e.g., LLC resonant, forward, or active clamp flyback) operating at 100–500 kHz. IC Role / Device Role / Timing Role: Low-side synchronous rectifier replacing Schottky diode to reduce conduction loss and improve efficiency above 20% load. Use Value: Achieves >1.2% efficiency gain at 48 V input / 12 V output, 20 A load due to RDS(on) = 14.9 mΩ and low Qrr = 39 nC. | Use Scenario: High-side main switch in non-isolated buck converters or isolated flyback/forward topologies with 36–75 V input rails. IC Role / Device Role / Timing Role: Primary power switch handling repetitive 40 A peak currents with fast turn-off (tf = 4 ns) to minimize overlap loss. Use Value: Enables >95% efficiency at 100 kHz with minimal gate drive loss (Qg = 8 nC) and thermal margin (RthJC = 1.9 °C/W). |
| DC/DC Converter Power Stage | Motor Drive Control |
Use Scenario: High-current buck or half-bridge stage in point-of-load (POL) regulators for FPGA, ASIC, or GPU core supplies. IC Role / Device Role / Timing Role: High-efficiency power switch operating at 300–1000 kHz with tight duty cycle control and low dead-time sensitivity. Use Value: Supports 40 A continuous output with <1.8 W conduction loss and <0.4 W switching loss at 500 kHz, reducing thermal design complexity. | Use Scenario: H-bridge leg or phase-leg switch in 24–48 V brushed DC or BLDC motor drives with PWM frequencies up to 20 kHz. IC Role / Device Role / Timing Role: Robust power switch handling pulsed 70 A avalanche current (IAS = 20 A) and repetitive UIS events during commutation. Use Value: Eliminates need for external freewheeling diodes via low-VSD body diode (0.78 V) and controlled trr = 39 ns, reducing component count and board space. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel 100 V power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF5305PBF | Higher RDS(on) (60 mΩ @ 10 V), TO-220 package, slower switching (Qg = 54 nC) | Lower power density, limited to ≤100 kHz operation, requires heatsink | Choose for cost-sensitive, low-frequency (<100 kHz), through-hole designs where thermal mass outweighs size constraints |
| SISF100DN-T1-GE3 | Same PowerPAK 1212-8S package, but 100 V/12.5 mΩ/11.5 nC - lower RDS(on), higher Qg | Better conduction loss, slightly higher gate drive requirement; identical thermal and layout compatibility | Choose when <12 mΩ RDS(on) is required and 11.5 nC Qg is acceptable for driver capability |
Compared with IRF5305PBF, SISS5112DN-T1-GE3 delivers 4× lower conduction loss and 85% smaller footprint; versus SISF100DN-T1-GE3, it trades 2.4 mΩ higher RDS(on) for 3.5 nC lower Qg, favoring high-frequency, gate-drive-limited designs.
Availability
SISS5112DN-T1-GE3 is available at Aetrix Electronics and suitable for DC/DC converters, motor drive control, and power supply designs requiring stable component supply, long-term manufacturability, and RoHS-compliant leadless packaging.
Supply support for SISS5112DN-T1-GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics with emphasis on power efficiency, ruggedness, and miniaturization.
The SISS5112DN-T1-GE3 belongs to Vishay's TrenchFET® Gen V family, engineered specifically for high-frequency, high-current power conversion in space-constrained industrial, computing, and telecom applications.
FAQ
What is the maximum continuous drain current rating for SISS5112DN-T1-GE3 at case temperature of 70 °C?
The maximum continuous drain current for SISS5112DN-T1-GE3 is 32.6 A when the case temperature is maintained at 70 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits of the PowerPAK 1212-8S package and ensures safe operation within the 150 °C maximum junction temperature. Designers must verify heatsinking and PCB copper area to sustain this current in real-world conditions. SISS5112DN-T1-GE3 maintains RDS(on) stability across this range due to its positive temperature coefficient.
Does SISS5112DN-T1-GE3 support logic-level gate drive?
Yes, SISS5112DN-T1-GE3 supports logic-level gate drive with a gate threshold voltage (VGS(th)) range of 2–4 V, allowing reliable turn-on using standard 3.3 V or 5 V microcontroller outputs or gate drivers. Its RDS(on) remains low (18.5 mΩ max at VGS = 7.5 V), ensuring efficient operation even with marginal gate voltage margins. SISS5112DN-T1-GE3 does not require bootstrap or level-shift circuitry in low-side configurations.
What is the thermal resistance from junction to case (RthJC) for SISS5112DN-T1-GE3, and how is it measured?
The typical junction-to-case thermal resistance (RthJC) for SISS5112DN-T1-GE3 is 1.9 °C/W, with a maximum of 2.4 °C/W, measured from the silicon die to the exposed drain copper pad on the bottom of the PowerPAK 1212-8S package. This value assumes direct thermal interface to a heatsink or large PCB copper pour. SISS5112DN-T1-GE3 leverages the entire bottom-side drain pad for heat transfer, making thermal vias under the pad essential for achieving rated performance.
Is SISS5112DN-T1-GE3 suitable for avalanche energy handling in inductive switching applications?
Yes, SISS5112DN-T1-GE3 is rated for single-pulse avalanche energy (EAS) of 20 mJ and single-pulse avalanche current (IAS) of 20 A with L = 0.1 mH, confirming its capability to withstand unclamped inductive switching events common in motor drive and flyback converter primary switches. All units undergo 100% UIS testing, ensuring robustness. SISS5112DN-T1-GE3 should not be operated repeatedly in avalanche without derating per Vishay's application notes.
How does the PowerPAK 1212-8S package of SISS5112DN-T1-GE3 differ from traditional SO-8 in thermal performance?
The PowerPAK 1212-8S package of SISS5112DN-T1-GE3 provides significantly better thermal performance than standard SO-8: RthJC is 1.9 °C/W (typ.) versus ~6–8 °C/W for SO-8, due to its exposed drain copper on the bottom side acting as a direct thermal path. It also offers 40% smaller footprint (3.3 mm × 3.3 mm vs. 4.9 mm × 6.0 mm) and lower parasitic inductance. SISS5112DN-T1-GE3 requires reflow soldering per JEDEC J-STD-020; manual iron soldering is not recommended.
SISS5112DN-T1-GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® 1212-8S
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 11A (Ta), 40.7A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 7.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 14.9mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 16 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 790 pF @ 50 V
- FET Feature:
- -
- Power Dissipation (Max):
- 3.7W (Ta), 52W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® 1212-8S
SISS5112DN-T1-GE3 FAQ
1.How can I place an order for SISS5112DN-T1-GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SISS5112DN-T1-GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SISS5112DN-T1-GE3 reliable?
The price and inventory of SISS5112DN-T1-GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SISS5112DN-T1-GE3 is usually 5 days.
3.What payment methods are accepted for SISS5112DN-T1-GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SISS5112DN-T1-GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SISS5112DN-T1-GE3?
SISS5112DN-T1-GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SISS5112DN-T1-GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SISS5112DN-T1-GE3?
For technical support, including SISS5112DN-T1-GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SISS5112DN-T1-GE3 requirements.
6.How does Aetrix verify that SISS5112DN-T1-GE3 is sourced from the original manufacturer or authorized distributors?
All SISS5112DN-T1-GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SISS5112DN-T1-GE3 meets industry standards.
7.What is the process for return or replacement of SISS5112DN-T1-GE3?
All SISS5112DN-T1-GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SISS5112DN-T1-GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SISS5112DN-T1-GE3 part is unused and in its original packaging.
Return procedure for SISS5112DN-T1-GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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