Microchip Technology SMAJ7.5CAE3/TR13
- Part No.:
- SMAJ7.5CAE3/TR13
- Manufacturer:
- Microchip Technology
- Category:
- TVS Diodes
- Package:
- DO-214AC, SMA
- Datasheet:
-
SMAJ7.5CAE3/TR13.pdf
- Description:
- TVS DIODE 7.5VWM 12.9VC DO214AC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SMAJ7.5CAE3/TR13 from Microsemi is a bidirectional surface-mount Transient Voltage Suppressor (TVS) designed for robust ESD, EFT, and secondary lightning surge protection in DC power rails and signal lines. It features a 7.5 V reverse standoff voltage (VWM), 8.33 V minimum breakdown voltage (VBR), clamps transients to ≤14.3 V at 35 A peak pulse current (IPP), and delivers 500 W peak pulse power (10/1000 µs). It is widely deployed in industrial I/O modules, telecom interface circuits, and automotive body control units.
For engineers reviewing the SMAJ7.5CAE3/TR13 datasheet, SMAJ7.5CAE3/TR13 pinout, SMAJ7.5CAE3/TR13 application, or SMAJ7.5CAE3/TR13 equivalent, key selection criteria include bidirectional clamping capability, DO-214AC package compatibility, IEC61000-4-2/4-4/4-5 compliance, low standby leakage (<100 µA @ VWM), and RoHS-compliant matte-tin terminations.
Technical Context
This bidirectional TVS operates symmetrically across both polarities, enabling protection of AC-coupled or floating signal paths without polarity constraints. Its <100 ps theoretical response time (unidirectional mode) and <5 ns for bidirectional operation ensure effective suppression of fast-rising ESD events per IEC61000-4-2 Level 4 (±15 kV contact).
It meets IEC61000-4-5 secondary lightning requirements with 42 Ω source impedance up to Class 4 (SMAJ7.5CAE3/TR13 supports Class 4 per spec sheet), and provides 500 W surge handling at 10/1000 µs waveform while maintaining thermal resistance of 15 °C/W junction-to-lead on standard FR4 PCBs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM (Reverse Standoff) | 7.5 V - Maximum continuous DC or RMS voltage the device blocks without clamping; defines safe operating window for 5–9 V rail protection. |
| VBR min @ IBR | 8.33 V @ 1 mA - Minimum voltage at which avalanche conduction begins; ensures reliable triggering above normal operating voltage. |
| VC @ IPP | 14.3 V @ 35 A - Clamped voltage during 500 W transient (10/1000 µs); limits downstream IC stress to safe levels under surge. |
| IPP (Peak Pulse) | 35 A - Peak current survivable at rated clamping voltage; enables protection against IEC61000-4-5 42 Ω Class 4 surges (up to 1 kV open-circuit). |
| ID @ VWM | <100 µA - Low leakage current at standoff voltage; prevents excessive power loss or false triggering in battery-powered systems. |
| Package | DO-214AC (SMA) - Industry-standard surface-mount outline with wide leads for thermal dissipation and mechanical robustness; compatible with automated SMT assembly. |
| RoHS Status | e3 suffix - Matte-tin plating compliant with RoHS Directive 2011/65/EU; no lead, cadmium, mercury, hexavalent chromium, PBB, or PBDE. |
Pinout & Package
DO-214AC (SMA) package: molded thermosetting epoxy case meeting UL94V-0; void-free construction; C-bend (modified J-bend) leads with annealed matte-tin plating; cathode band omitted on bidirectional devices (SMAJ7.5CAE3/TR13 has no polarity marking).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode / Cathode (Bidirectional) | Surge current path terminal | Both terminals are electrically symmetrical; connects across protected line and ground (or between differential lines) to clamp overvoltage in either direction. |
| Case / Body | Thermal and mechanical interface | Non-conductive epoxy body; heat transfer occurs via leads to PCB copper; requires recommended pad layout (Microsemi Doc MSC0270A, Page 5) for optimal thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping | Enables single-device protection of AC signals, RS-485 buses, or ungrounded sensor interfaces without external diode pairing. |
| 500 W peak pulse power (10/1000 µs) | Supports high-energy transients including IEC61000-4-5 secondary lightning surges with 42 Ω source impedance up to Class 4. |
| Fast response: <5 ns (bidirectional) | Minimizes voltage overshoot during ESD events (IEC61000-4-2), protecting sub-20 V logic and analog front-ends before damage occurs. |
| RoHS-compliant e3 termination | Matte-tin plating ensures solderability per MIL-STD-750 Method 2026 and eliminates lead-based contamination in final assemblies. |
| Tape-and-reel packaging (TR13) | 2500 units per 13-inch reel per EIA-481-1-A standard; optimized for high-volume SMT placement with consistent feed reliability. |
Applications
| Industrial PLC Analog Input | Automotive Body Control Module |
|---|---|
Use Scenario: Protection of 0–10 V or 4–20 mA analog input channels against field-induced surges and ESD during sensor wiring. IC Role / Device Role / Timing Role: Bidirectional TVS placed between input pin and ground to clamp transients before they reach precision ADC or op-amp front-end. Use Value: Limits clamped voltage to ≤14.3 V, ensuring downstream components rated for ≥16 V absolute maximum survive repeated 1 kV IEC61000-4-5 surges. |
Use Scenario: Guarding LIN bus or switched 12 V supply lines in door modules, seat controllers, or lighting nodes against load dump and ESD. IC Role / Device Role / Timing Role: Parallel-connected TVS absorbing energy from inductive kickback and ±8 kV contact ESD per ISO 10605. Use Value: Withstands 35 A peak pulse and maintains <100 µA leakage at 7.5 V, preventing battery drain while enabling fail-safe operation in 12 V systems. |
| Telecom Ethernet PHY Interface | Medical Patient Monitoring Port |
Use Scenario: Surge protection on RJ-45 magnetics center taps or MDI-X lines exposed to induced RF and lightning-induced surges. IC Role / Device Role / Timing Role: Bidirectional clamping device placed across differential pair or common-mode node to suppress asymmetrical transients. Use Value: Symmetric VBR (8.33 V) and low capacitance enable minimal signal distortion on 10/100BASE-TX lines while passing IEC61000-4-4 EFT testing. |
Use Scenario: Safeguarding isolated USB or serial diagnostic ports on bedside monitors against accidental ESD during clinical handling. IC Role / Device Role / Timing Role: Final-stage TVS on connector-facing side of isolation barrier to prevent ESD coupling into patient-connected circuitry. Use Value: Meets IEC61000-4-2 Level 4 (±15 kV contact) with <5 ns response, ensuring immunity without compromising creepage/clearance requirements of 60601-1. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ7.5CA TR13 (non-e3) | Same electrical specs and DO-214AC package; uses SnPb (tin-lead) terminations instead of RoHS-compliant matte-tin (e3). | Not suitable for RoHS-restricted end markets (EU, China, Korea); acceptable where legacy Pb-based assembly is maintained. | Select only if SnPb reflow profile and regulatory compliance allow; otherwise prefer SMAJ7.5CAE3/TR13 for new designs. |
| SMBJ7.5CA-E3/52 (Vishay) | Same VWM (7.5 V), VBR (8.33 V), and VC (14.3 V), but SMB package (DO-214AA) - 25% smaller footprint and higher thermal resistance (20 °C/W vs. 15 °C/W). | Lower power derating on FR4; not recommended for sustained surge duty cycles or high ambient temperature environments (>85 °C). | Acceptable for space-constrained consumer designs with moderate surge exposure; verify thermal margin using Vishay's SMBJ derating curve. |
Compared with SMAJ7.5CA TR13 and SMBJ7.5CA-E3/52, SMAJ7.5CAE3/TR13 uniquely combines RoHS compliance, DO-214AC thermal performance (15 °C/W), and full IEC61000-4-5 Class 4 support - making it optimal for industrial and medical applications requiring long-term regulatory alignment and robust surge endurance.
Availability
SMAJ7.5CAE3/TR13 is available at Aetrix Electronics and suitable for industrial PLC analog inputs, automotive body control modules, telecom Ethernet PHY interfaces, and medical patient monitoring ports requiring stable component supply, RoHS compliance, and verified IEC61000-4-2/4-4/4-5 immunity.
Supply support for SMAJ7.5CAE3/TR13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microsemi (now part of Microchip Technology) is a U.S.-based semiconductor company specializing in high-reliability analog, mixed-signal, and radiation-hardened components for aerospace, defense, and industrial markets.
The SMAJ series was engineered for surface-mount transient suppression in harsh environments - delivering 500 W surge capability, fast response, and extended temperature operation (-65 °C to +150 °C) for mission-critical power and signal line protection.
FAQ
What does the 'CA' suffix mean in SMAJ7.5CAE3/TR13?
The 'CA' suffix denotes a bidirectional configuration - meaning SMAJ7.5CAE3/TR13 clamps overvoltage symmetrically in both polarities, unlike unidirectional 'A' variants. This allows single-device protection of AC signals, differential buses, or floating nodes without polarity concerns. The device has no cathode marking, confirming its bidirectional nature per Microsemi documentation.
Is SMAJ7.5CAE3/TR13 compatible with lead-free reflow profiles?
Yes, SMAJ7.5CAE3/TR13 features RoHS-compliant matte-tin (e3) terminations qualified for soldering at 260 °C for 10 seconds, fully supporting IPC/JEDEC J-STD-020B Level 1 moisture sensitivity and standard lead-free reflow profiles. Its DO-214AC package withstands thermal cycling without delamination or solder joint failure.
What IEC standards does SMAJ7.5CAE3/TR13 meet for surge immunity?
SMAJ7.5CAE3/TR13 is validated per IEC61000-4-2 (ESD ±15 kV contact), IEC61000-4-4 (EFT ±4 kV), and IEC61000-4-5 (secondary lightning with 42 Ω source impedance up to Class 4). These ratings are explicitly confirmed in Microsemi's MSC0270A datasheet for the SMAJ5.0–170CA family, including SMAJ7.5CAE3/TR13.
How does the clamping voltage of SMAJ7.5CAE3/TR13 affect system-level protection design?
The 14.3 V clamping voltage (VC) of SMAJ7.5CAE3/TR13 at 35 A defines the maximum voltage seen by downstream components during a 500 W transient. Designers must ensure all protected ICs have absolute maximum ratings exceeding 14.3 V - for example, selecting 16 V-rated op-amps or 20 V-tolerant microcontroller I/O pins - to guarantee survival under worst-case surge conditions.
Can SMAJ7.5CAE3/TR13 be used in place of a unidirectional TVS like SMAJ7.5A?
No - SMAJ7.5CAE3/TR13 is bidirectional and lacks polarity marking, while SMAJ7.5A is unidirectional with a cathode band. Substituting them requires circuit review: SMAJ7.5CAE3/TR13 may be used on AC or floating nodes, but cannot replace SMAJ7.5A in DC-coupled forward-biased configurations (e.g., power rail to ground) without risking improper clamping behavior or increased leakage.
SMAJ7.5CAE3/TR13 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- DO-214AC, SMA
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 7.5V
- Voltage - Breakdown (Min):
- 8.33V
- Voltage - Clamping (Max) @ Ipp:
- 12.9V
- Current - Peak Pulse (10/1000µs):
- 38.8A
- Power - Peak Pulse:
- 500W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AC (SMA)
SMAJ7.5CAE3/TR13 FAQ
1.How can I place an order for SMAJ7.5CAE3/TR13 through Aetrix?
Please submit a Request for Quotation (RFQ) for SMAJ7.5CAE3/TR13 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SMAJ7.5CAE3/TR13 reliable?
The price and inventory of SMAJ7.5CAE3/TR13 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SMAJ7.5CAE3/TR13 is usually 5 days.
3.What payment methods are accepted for SMAJ7.5CAE3/TR13?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SMAJ7.5CAE3/TR13 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SMAJ7.5CAE3/TR13?
SMAJ7.5CAE3/TR13 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SMAJ7.5CAE3/TR13 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SMAJ7.5CAE3/TR13?
For technical support, including SMAJ7.5CAE3/TR13 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SMAJ7.5CAE3/TR13 requirements.
6.How does Aetrix verify that SMAJ7.5CAE3/TR13 is sourced from the original manufacturer or authorized distributors?
All SMAJ7.5CAE3/TR13 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SMAJ7.5CAE3/TR13 meets industry standards.
7.What is the process for return or replacement of SMAJ7.5CAE3/TR13?
All SMAJ7.5CAE3/TR13 units undergo pre-shipment inspection (PSI). If there is an issue with SMAJ7.5CAE3/TR13, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SMAJ7.5CAE3/TR13 part is unused and in its original packaging.
Return procedure for SMAJ7.5CAE3/TR13:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SMAJ7.5CAE3/TR13 Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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onsemi

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Diodes Incorporated

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Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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Nexperia USA Inc.

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Toshiba Semiconductor and Storage

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Diodes Incorporated
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