onsemi SMDA05CDR2G
- Part No.:
- SMDA05CDR2G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SMDA05CDR2G.pdf
- Description:
- TVS DIODE 5VWM 11VC 8-SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:5,290
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SMDA05CDR2G from onsemi is a bi-directional ESD/surge protection diode array in SO-8 package, designed for high-speed data line protection with 5.0 V reverse working voltage, ±15 kV air/±8 kV contact ESD rating per IEC 61000-4-2, and 300 W peak pulse power (8 × 20 µs). It protects up to four I/O lines in notebook PCs and LAN equipment.
For engineers reviewing the SMDA05CDR2G datasheet, pinout, applications, or equivalent options, key selection criteria include clamping voltage at 1 A (≤9.8 V), junction capacitance (350 pF @ 0 V, 1 MHz), and SO-8 pin-compatible layout for multi-line transient suppression in space-constrained interfaces.
Technical Context
The SMDA05CDR2G integrates four identical bi-directional TVS diodes in a single SO-8 package, each configured as an anode-cathode pair sharing a common cathode terminal (Pin 8). Its architecture enables simultaneous protection of four independent signal lines without cross-talk or shared impedance paths.
It operates within −55 °C to +150 °C junction temperature range and supports reflow soldering up to 260 °C for 10 seconds. The device meets IEC 61000-4-2 (ESD), -4-4 (EFT), and -4-5 (surge) immunity standards with validated 12 A surge current capability (8/20 µs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Working Voltage | 5.0 V - Maximum continuous DC or RMS signal voltage before leakage rises significantly. |
| Breakdown Voltage @ 1 mA | 6.0 V min - Ensures reliable turn-on during transients while avoiding false triggering on nominal 5 V logic. |
| Clamping Voltage @ 1 A | 9.8 V max - Limits protected line voltage to safe levels during 1 A ESD events, preserving downstream ICs. |
| Junction Capacitance | 350 pF @ 0 V, 1 MHz - Low enough for USB 2.0 and RS-485 but requires layout de-tuning for >100 MHz signals. |
| Peak Pulse Power | 300 W (8 × 20 µs) - Sustains short-duration surges typical of industrial EFT and lightning-induced coupling. |
| ESD Rating | ±15 kV air / ±8 kV contact (IEC 61000-4-2) - Meets Level 4 immunity for end-equipment compliance testing. |
Pinout & Package
SO-8 package (Case 751-07), surface-mount, Pb-free, RoHS-compliant, with 1.27 mm pitch and 4.9 mm × 6.0 mm body dimensions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | Anode (per channel) | Each connects to one protected I/O line; low-leakage path to common cathode during normal operation. |
| 5, 6, 7 | No Connect (NC) | Internally unconnected; must remain floating-no routing or grounding permitted. |
| 8 | Common Cathode | Single return path for all four channels; must be connected to system ground with low-inductance trace. |
Key Features
| Feature | Design Value |
|---|---|
| Bi-directional ESD protection | Enables symmetric clamping for AC-coupled or bidirectional data lines (e.g., USB D+/D−, RS-485 A/B) without polarity constraints. |
| 300 W peak power rating | Handles repetitive 8/20 µs surges up to 12 A (IEC 61000-4-5), supporting industrial-grade port-level protection. |
| 350 pF junction capacitance | Preserves signal integrity on 480 Mbps USB 2.0 links when combined with proper PCB layout and series impedance matching. |
| SO-8 footprint compatibility | Allows drop-in replacement of legacy quad TVS arrays (e.g., SMAJ5.0A variants) without board redesign. |
| Pb-free, Halogen-free, RoHS | Meets global environmental compliance requirements for consumer, computing, and enterprise equipment manufacturing. |
Applications
| USB 2.0 Port Protection | LAN/WAN Interface Protection |
|---|---|
|
Use Scenario: Protecting D+ and D− differential pairs on motherboard USB ports against ESD discharge during hot-plug events. IC Role / Device Role / Timing Role: Transient voltage suppressor placed directly at connector, clamping fast-rising ESD pulses before they reach USB transceiver IC. Use Value: Maintains <5.0 V working voltage margin while limiting clamped voltage to ≤9.8 V at 1 A, preventing latch-up or damage in USB PHYs rated for 5.5 V absolute maximum. |
Use Scenario: Shielding RJ-45 Ethernet PHY interface pins (TX+/TX−, RX+/RX−) from induced surges in office building wiring. IC Role / Device Role / Timing Role: Quad-channel TVS array providing coordinated protection across all four differential lanes with shared cathode return. Use Value: Delivers 300 W peak power handling and 12 A surge current capability per IEC 61000-4-5, meeting EN 61000-4-5 Level 3 requirements for Class A equipment. |
| Notebook PC I/O Protection | Server Backplane Data Lines |
|
Use Scenario: Safeguarding serial (SATA, PCIe) and parallel (LPC, SMBus) control lines on thin-client motherboards exposed to user-handling ESD. IC Role / Device Role / Timing Role: Compact SO-8 solution protecting up to four low-voltage control signals with minimal PCB area and no external components. Use Value: Achieves ±8 kV contact ESD immunity (IEC 61000-4-2) while adding only 350 pF load per line-compatible with 100 MHz clocked buses like LPC. |
Use Scenario: Protecting hot-swap controller communication lines (I²C, PMBus) on server backplanes subject to repeated insertion/removal transients. IC Role / Device Role / Timing Role: Multi-line protector ensuring signal continuity during field maintenance by suppressing EFT bursts (40 A, 5/50 ns) on management bus lines. Use Value: Complies with IEC 61000-4-4 Level 4 (40 A) for fast transient immunity, enabling robust firmware updates and telemetry without bus lockup. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD/surge protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E05U06DQAR | Lower capacitance (0.5 pF per line), 5.5 V VRWM, same SO-8 package but internal structure differs (quad uni-directional with separate cathodes). | Better suited for USB 3.0/PCIe Gen3 where sub-1 pF loading is critical; not bi-directional, requiring external bias for AC lines. | Select TPD4E05U06DQAR only when ultra-low capacitance is mandatory and signal polarity is known and stable. |
| SMAJ5.0A | Discrete SMA package, 5.0 V VRWM, 600 W peak power, but single-channel-requires four devices and more PCB area. | Higher power handling but lacks integrated quad configuration; less suitable for dense I/O headers with tight spacing. | Choose SMAJ5.0A when higher surge margin (>300 W) is needed per line and board space allows discrete placement. |
Compared with TPD4E05U06DQAR and SMAJ5.0A, the SMDA05CDR2G uniquely balances quad integration, bi-directionality, and 350 pF capacitance-making it optimal for cost-sensitive, space-constrained 5 V high-speed interfaces where polarity independence matters.
Availability
SMDA05CDR2G is available at Aetrix Electronics and suitable for USB 2.0 port protection, LAN/WAN interface hardening, and notebook PC I/O line safeguarding requiring stable component supply across production lifecycles.
Supply support for SMDA05CDR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The SMDA05C Series belongs to onsemi's transient protection portfolio, engineered specifically for multi-line ESD/surge suppression in high-speed digital interfaces where compactness, reliability, and standard compliance are critical.
FAQ
What is the maximum clamping voltage of the SMDA05CDR2G at 5 A surge current?
The SMDA05CDR2G has a maximum clamping voltage of 11 V at 5.0 A peak pulse current (8 × 20 µs waveform). This value ensures downstream 5 V logic ICs remain within safe operating limits during moderate surge events, as confirmed in the "SMDA05C ELECTRICAL CHARACTERISTICS" table on page 2 of the official datasheet. The SMDA05CDR2G maintains consistent clamping performance across its specified operating temperature range.
Does the SMDA05CDR2G support bi-directional signal lines like USB D+ and D−?
Yes, the SMDA05CDR2G is explicitly designed as a bi-directional ESD protection device, with each of Pins 1–4 functioning as an anode tied to a protected line and Pin 8 serving as the common cathode. This architecture enables symmetrical clamping for AC-coupled or full-duplex differential pairs without polarity constraints-directly supporting USB 2.0 D+/D−, RS-485 A/B, and other bidirectional interfaces. The SMDA05CDR2G datasheet confirms this in the "PIN CONFIGURATION AND SCHEMATIC" diagram on page 1.
What is the junction capacitance of the SMDA05CDR2G and how does it affect high-speed signal integrity?
The SMDA05CDR2G exhibits 350 pF junction capacitance measured at 0 V bias and 1 MHz, as specified in the "SMDA05C ELECTRICAL CHARACTERISTICS" table. This capacitance loads each protected line, making the SMDA05CDR2G suitable for USB 2.0 (480 Mbps) and RS-485 but potentially limiting use in >1 GHz applications unless compensated via series impedance or layout optimization. The SMDA05CDR2G's capacitance is fixed and process-determined-not adjustable or trimmable.
Can the SMDA05CDR2G replace older discrete TVS diodes in existing SO-8 footprints?
Yes, the SMDA05CDR2G uses the standard SO-8 package (Case 751-07) with 1.27 mm pitch and matches industry-standard land patterns. Its Pin 1–4/anode and Pin 8/common cathode configuration aligns with common quad TVS layouts, enabling direct substitution for legacy designs using discrete arrays-provided NC pins (5–7) are left unconnected. The SMDA05CDR2G datasheet confirms mechanical compatibility on page 3 under "ORDERING INFORMATION" and "MECHANICAL CASE OUTLINE".
Is the SMDA05CDR2G compliant with RoHS and halogen-free standards?
Yes, the SMDA05CDR2G is explicitly certified Pb-free, halogen-free, and BFR-free, and fully complies with EU RoHS Directive 2011/65/EU, as stated in the "Features" section on page 1 of the datasheet. The marking "G" in the part number denotes Pb-free packaging, and the device carries UL 94 V-0 flammability rating-meeting environmental and safety requirements for commercial and industrial electronics. The SMDA05CDR2G's compliance documentation is maintained by onsemi and available upon request.
SMDA05CDR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 4
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 11V
- Current - Peak Pulse (10/1000µs):
- 17A (8/20µs)
- Power - Peak Pulse:
- 300W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 350pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
SMDA05CDR2G FAQ
1.How can I place an order for SMDA05CDR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for SMDA05CDR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SMDA05CDR2G reliable?
The price and inventory of SMDA05CDR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SMDA05CDR2G is usually 5 days.
3.What payment methods are accepted for SMDA05CDR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SMDA05CDR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SMDA05CDR2G?
SMDA05CDR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SMDA05CDR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SMDA05CDR2G?
For technical support, including SMDA05CDR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SMDA05CDR2G requirements.
6.How does Aetrix verify that SMDA05CDR2G is sourced from the original manufacturer or authorized distributors?
All SMDA05CDR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SMDA05CDR2G meets industry standards.
7.What is the process for return or replacement of SMDA05CDR2G?
All SMDA05CDR2G units undergo pre-shipment inspection (PSI). If there is an issue with SMDA05CDR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SMDA05CDR2G part is unused and in its original packaging.
Return procedure for SMDA05CDR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SMDA05CDR2G Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
