Vishay Siliconix SQJ128ELP-T1_GE3
- Part No.:
- SQJ128ELP-T1_GE3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- PowerPAK® SO-8
- Datasheet:
-
SQJ128ELP-T1_GE3.pdf
- Description:
- AUTOMOTIVE N-CHANNEL 30 V (D-S)
- Quantity:
- Payment:

- Shipping:

Inventory:9,000
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Product details
Overview
SQJ128ELP-T1_GE3 from Vishay Siliconix is an automotive-grade N-channel TrenchFET® Gen IV MOSFET rated for 30 V drain-source voltage, 437 A continuous drain current at TC = 25 °C, and 175 °C maximum junction temperature. It features RDS(on) of 1.158 mΩ at VGS = 10 V and 1.66 mΩ at VGS = 4.5 V, optimized for high-efficiency power conversion in engine control units and 48 V mild-hybrid DC-DC stages.
For engineers reviewing the SQJ128ELP-T1_GE3 datasheet, SQJ128ELP-T1_GE3 pinout, SQJ128ELP-T1_GE3 application, or SQJ128ELP-T1_GE3 equivalent, key selection criteria include its AEC-Q101 qualification, ultra-low on-resistance with Qgd/Qgs < 1 for fast switching, 100 % Rg and UIS testing, and PowerPAK SO-8L package thermal performance (RthJC = 0.4 °C/W).
Technical Context
This MOSFET employs trench-based silicon architecture to achieve low conduction loss and controlled gate charge distribution. Its Qgd/Qgs ratio < 1 minimizes Miller-induced switching delay and improves hard-switching robustness in synchronous rectification and high-frequency buck converters.
The device integrates a robust body diode with trr = 52–104 ns and Qrr = 55–110 nC, enabling reliable reverse recovery in bidirectional power flow applications. Thermal design is supported by a low junction-to-case resistance (0.4 °C/W) and validated 175 °C operation under sustained automotive load profiles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum blocking voltage compatible with 24 V/48 V automotive bus systems |
| RDS(on) @ 10 V | 1.158 mΩ - Enables < 0.5 W conduction loss at 200 A, critical for high-current motor drivers |
| RDS(on) @ 4.5 V | 1.66 mΩ - Ensures full enhancement with standard 3.3 V/5 V logic-level gate drivers |
| ID (TC = 25 °C) | 437 A - Supports peak-phase currents in electric power steering and traction inverters |
| Qg / Qgd | 99 nC / 19 nC - Low total and gate-drain charge enables < 100 ns turn-off delay with 1 Ω driver |
| RthJC | 0.4 °C/W - Allows > 400 W power dissipation with minimal junction-to-heatsink thermal penalty |
| TJ max | +175 °C - Qualified for under-hood environments per AEC-Q101 Grade 0 |
Pinout & Package
Package: PowerPAK® SO-8L (PPKSO8LWLA), surface-mount, thermally enhanced dual-side cooling capable package with exposed drain paddle. Dimensions: 6.15 mm × 4.90 mm × 1.05 mm (E × D1 × A).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 7, 8 | Source (S) | Five parallel source terminals reduce source inductance and improve current sharing in high-di/dt switching |
| 4 | Gate (G) | Single gate input with Rg = 0.6–2.0 Ω - supports direct drive from MCU GPIO or dedicated gate driver ICs |
| 5, 6 | Drain (D) | Two drain terminals connected to internal copper paddle - primary thermal and current path to PCB heatsink |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualified | Validated for automotive mission-critical systems including engine management and ADAS power supplies |
| Qgd/Qgs < 1 | Reduces Miller plateau duration and improves EMI profile in 200–500 kHz DC-DC converters |
| 100 % Rg and UIS tested | Ensures gate robustness against transient overvoltage and avalanche energy tolerance up to 103.5 mJ |
| Body diode trr ≤ 104 ns | Enables efficient synchronous rectification without external Schottky replacement in 48 V battery systems |
| Thermal RthJC = 0.4 °C/W | Permits > 450 W steady-state power handling with 1"² FR4 PCB copper area, eliminating need for external heatsinks |
Applications
| Engine Control Unit (ECU) High-Side Switch | 48 V Mild-Hybrid DC-DC Converter |
|---|---|
Use Scenario: High-current fuel injector or ignition coil driver requiring fast turn-on/turn-off and 175 °C ambient operation. IC Role / Device Role / Timing Role: High-side N-channel switch controlled via isolated gate driver; operates in PWM mode at 1–10 kHz. Use Value: Ultra-low RDS(on) reduces I²R losses below 1.5 W at 300 A, while AEC-Q101 qualification ensures reliability across 15-year vehicle lifetime. | Use Scenario: Primary-side synchronous rectifier in 3 kW bi-directional DC-DC converter linking 12 V and 48 V domains. IC Role / Device Role / Timing Role: Low-side switch in synchronous buck topology operating at 300 kHz with 50 ns dead-time control. Use Value: Qgd/Qgs < 1 enables precise zero-voltage switching transition, reducing switching loss by ≥25 % vs. Gen III equivalents. |
| Electric Power Steering (EPS) Motor Inverter | On-Board Charger (OBC) Auxiliary Power Supply |
Use Scenario: Phase-leg half-bridge switch in 1.5 kW EPS inverter exposed to under-hood temperatures up to 150 °C. IC Role / Device Role / Timing Role: N-channel MOSFET in three-phase inverter leg; driven by isolated gate driver with 10 V gate bias. Use Value: 175 °C TJ rating and RDS(on) drift < 2× from 25 °C to 175 °C ensure stable torque delivery during sustained high-load maneuvers. | Use Scenario: Primary switch in auxiliary 300 W flyback converter powering OBC control circuitry from high-voltage battery. IC Role / Device Role / Timing Role: Main power switch operating at 100 kHz with 50 % duty cycle; requires low Coss and fast trr for efficiency. Use Value: Coss = 1352 pF and trr = 52 ns minimize capacitive loss and reverse recovery loss, achieving > 92 % efficiency at full load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRL1404ZPBF | RDS(on) = 3.4 mΩ @ 10 V; TO-220 package; RthJC = 1.25 °C/W; not AEC-Q101 qualified | Limited to industrial/non-automotive use; higher conduction loss and inferior thermal performance | Select only for cost-sensitive non-automotive designs where 175 °C operation and AEC-Q101 are not required |
| STL220N3LLH6 | RDS(on) = 0.95 mΩ @ 10 V; PowerFLAT 8x8 package; AEC-Q101 qualified; Qgd/Qgs = 0.82 | Higher current rating (520 A), but larger footprint (8 mm × 8 mm) and no bottom-side thermal pad access | Prefer when board space allows and higher current headroom is needed; avoid if PowerPAK SO-8L layout is fixed |
Compared with IRL1404ZPBF, SQJ128ELP-T1_GE3 delivers 66 % lower RDS(on), 3× better thermal resistance, and automotive qualification-enabling smaller heatsinks and longer field life. Against STL220N3LLH6, it trades 15 % higher RDS(on) for 30 % smaller footprint and superior PCB-level thermal coupling via exposed drain paddle.
Availability
SQJ128ELP-T1_GE3 is available at Aetrix Electronics and suitable for engine control units, 48 V mild-hybrid DC-DC converters, and electric power steering inverters requiring stable component supply across multi-year automotive production programs.
Supply support for SQJ128ELP-T1_GE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in high-performance MOSFETs, diodes, and optoelectronics for automotive, industrial, and computing markets.
The SQJ128ELP-T1_GE3 belongs to Vishay's TrenchFET® Gen IV automotive MOSFET family, engineered specifically for high-current, high-temperature power switching in next-generation 48 V architectures and electrified powertrain systems.
FAQ
What is the maximum continuous drain current rating for SQJ128ELP-T1_GE3 at 125 °C case temperature?
The SQJ128ELP-T1_GE3 supports 252 A continuous drain current at TC = 125 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limits under sustained high-temperature operation typical in under-hood automotive environments. The device maintains RDS(on) stability up to 175 °C junction temperature, making SQJ128ELP-T1_GE3 suitable for thermally constrained layouts where case temperature exceeds 100 °C.
Does SQJ128ELP-T1_GE3 require a gate resistor for safe operation in a 300 kHz synchronous buck converter?
Yes - while SQJ128ELP-T1_GE3 has an internal gate resistance of 0.6–2.0 Ω, external gate resistance is recommended to control dV/dt and prevent shoot-through in high-frequency synchronous buck topologies. For 300 kHz operation with a 1 Ω driver, a 5–10 Ω series gate resistor optimizes switching speed versus EMI and ringing. The SQJ128ELP-T1_GE3 datasheet confirms Qgd/Qgs < 1, which reduces Miller feedback sensitivity, but external tuning remains essential for system-level stability.
Is SQJ128ELP-T1_GE3 pin-compatible with other PowerPAK SO-8L N-channel MOSFETs such as SQJQ910ELP?
No - SQJ128ELP-T1_GE3 is not pin-compatible with SQJQ910ELP. Although both use the PowerPAK SO-8L package, SQJQ910ELP has a different pinout: pins 1–3 are Drain, pin 4 is Gate, and pins 5–8 are Source. In contrast, SQJ128ELP-T1_GE3 assigns pins 1,2,3,7,8 to Source and pins 5,6 to Drain. Layout reuse is not possible without redesign; SQJ128ELP-T1_GE3 requires its specific land pattern per Vishay document 78020.
What is the body diode forward voltage of SQJ128ELP-T1_GE3 at 15 A and room temperature?
The body diode forward voltage (VSD) of SQJ128ELP-T1_GE3 is rated at ≤ 1.1 V at IF = 15 A and VGS = 0 V, per the "Source-Drain Diode Ratings and Characteristics" section. This low VSD, combined with trr = 52–104 ns and Qrr = 55–110 nC, makes SQJ128ELP-T1_GE3 suitable for freewheeling and bidirectional conduction in synchronous rectifiers without external diode supplementation.
Can SQJ128ELP-T1_GE3 be used in a high-side configuration with bootstrap gate driving?
Yes - SQJ128ELP-T1_GE3 supports high-side operation with bootstrap gate driving, provided VGS remains within ±20 V and the high-side driver supplies sufficient gate charge (Qg = 99–150 nC). Its 30 V VDS rating and low Qgd enable clean turn-on even with bootstrap voltage droop. However, due to its N-channel structure, SQJ128ELP-T1_GE3 requires a floating gate driver stage; it cannot replace a P-channel device in simple source-follower configurations. Designers must verify bootstrap capacitor sizing and dead-time control to avoid cross-conduction.
SQJ128ELP-T1_GE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- PowerPAK® SO-8
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 437A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 1.15mOhm @ 15A, 10V
- Vgs(th) (Max) @ Id:
- 2.2V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 150 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 7315 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 500W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PowerPAK® SO-8
SQJ128ELP-T1_GE3 FAQ
1.How can I place an order for SQJ128ELP-T1_GE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SQJ128ELP-T1_GE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SQJ128ELP-T1_GE3 reliable?
The price and inventory of SQJ128ELP-T1_GE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SQJ128ELP-T1_GE3 is usually 5 days.
3.What payment methods are accepted for SQJ128ELP-T1_GE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SQJ128ELP-T1_GE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SQJ128ELP-T1_GE3?
SQJ128ELP-T1_GE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SQJ128ELP-T1_GE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SQJ128ELP-T1_GE3?
For technical support, including SQJ128ELP-T1_GE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SQJ128ELP-T1_GE3 requirements.
6.How does Aetrix verify that SQJ128ELP-T1_GE3 is sourced from the original manufacturer or authorized distributors?
All SQJ128ELP-T1_GE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SQJ128ELP-T1_GE3 meets industry standards.
7.What is the process for return or replacement of SQJ128ELP-T1_GE3?
All SQJ128ELP-T1_GE3 units undergo pre-shipment inspection (PSI). If there is an issue with SQJ128ELP-T1_GE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SQJ128ELP-T1_GE3 part is unused and in its original packaging.
Return procedure for SQJ128ELP-T1_GE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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