My Inquiry
My Account
onsemi SRV05-4MR6T1G
- Part No.:
- SRV05-4MR6T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
SRV05-4MR6T1G.pdf
- Description:
- TVS DIODE 5VWM 17.5VC 6TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,723
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SRV05-4MR6T1G from onsemi is a unidirectional 4-channel ESD protection diode array in TSOP-6 package, designed for high-speed data line protection with 5 V working voltage, <5 pF capacitance, and 12.5 V clamping voltage at 1 A pulse. It safeguards USB 2.0, DVI, and Ethernet 10/100 interfaces against IEC61000-4-2 ±8 kV contact ESD events.
For engineers reviewing the SRV05-4MR6T1G datasheet, pinout, applications, or equivalent options, key selection criteria include low clamping voltage under 17.5 V at 5 A, junction capacitance ≤5.0 pF between I/O and GND, compliance with IEC61000-4-4 (40 A EFT) and IEC61000-4-5 (12 A lightning), and TSOP-6 footprint compatibility with SOT-23-6 and SC-74.
Technical Context
The SRV05-4MR6T1G integrates four steering diodes and one TVS diode in a single TSOP-6 package to route transients from I/O pins (1,3,4,6) to reference pins (2 = VN, 5 = VP). Its unidirectional architecture enables clamping to VCC or ground depending on configuration-Option 1 uses pin 5 as VCC reference, Option 3 leaves pin 5 open for TVS-based referencing.
Clamping behavior follows VC = VF + VTVS, where VF is steering diode forward voltage and VTVS is TVS breakdown (~6.0 V). Measured clamping is 12.5 V at 1 A and 17.5 V at 5 A (8×20 µs pulse), with junction capacitance of 3.0–5.0 pF (I/O-to-GND) ensuring minimal signal distortion on USB/DVI lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Working Voltage | 5.0 V - Matches standard USB 2.0 and DVI power rail levels without overvoltage stress. |
| Clamping Voltage @ 1 A | 12.5 V - Limits transient voltage seen by protected IC during low-energy ESD events. |
| Clamping Voltage @ 5 A | 17.5 V - Maintains safe voltage margin under higher-energy IEC61000-4-2 contact discharge. |
| Junction Capacitance | 3.0–5.0 pF (I/O-to-GND) - Enables use on >480 Mbps USB 2.0 differential pairs without signal integrity loss. |
| ESD Rating | ±8 kV contact per IEC61000-4-2 - Certified protection level for handheld device interface ports. |
| Peak Pulse Power | 300 W (8×20 µs) - Sustains transient energy from lightning surges (IEC61000-4-5, 12 A). |
| Leakage Current | 5.0 µA @ 5 V - Negligible standby current draw on data lines, preserving low-power system operation. |
Pinout & Package
TSOP-6 package (Case 318G), 1.5 mm × 3.0 mm × 0.95 mm body, Pb-free, RoHS-compliant, UL 94 V-0 rated. Footprint compatible with SOT-23-6 and SC-74.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O Line 1 | Protected high-speed data line (e.g., USB D+); connected to internal steering diode anode. |
| 2 | VN (Ground Reference) | Common cathode connection for all four steering diodes; must be tied directly to low-inductance ground plane. |
| 3 | I/O Line 2 | Protected high-speed data line (e.g., USB D−); same internal structure as Pin 1. |
| 4 | I/O Line 3 | Third protected line (e.g., DVI TMDS+); shares clamping path via internal TVS when referenced to Pin 5. |
| 5 | VP (VCC Reference) | Positive supply input for biasing steering diodes; reduces capacitance and sets clamping threshold to VCC + VF. |
| 6 | I/O Line 4 | Fourth protected line (e.g., DVI TMDS−); fully symmetric with Pins 1/3/4 in layout and function. |
Key Features
| Feature | Design Value |
|---|---|
| 4-line integrated protection | Single TSOP-6 package replaces four discrete diodes and one TVS, reducing PCB area by >60% vs. discrete solution. |
| Low clamping voltage | 12.5 V at 1 A ensures downstream ICs (e.g., USB transceivers) remain within absolute maximum ratings during ESD. |
| Sub-5 pF I/O-to-GND capacitance | Preserves signal rise/fall times on 480 Mbps USB 2.0 channels; measured at 1 MHz, 0 V bias. |
| VCC-referenced steering | Pin 5 connection to VCC lowers diode capacitance and enables clamping to VCC + VF instead of ground-only paths. |
| IEC61000-4-4/4-5 compliance | Withstands 40 A EFT bursts and 12 A lightning surges-critical for industrial Ethernet and telecom interfaces. |
Applications
| USB 2.0 Port Protection | DVI Interface Protection |
|---|---|
Use Scenario: Protecting upstream/downstream USB 2.0 ports on laptops, docking stations, and peripherals from user-handled ESD events. IC Role / Device Role / Timing Role: ESD protection array placed between USB connector and controller IC, clamping transients before they reach PHY circuitry. Use Value: Prevents latch-up or gate oxide damage in USB transceivers by limiting clamping voltage to ≤17.5 V at 5 A while adding <5 pF loading to D+/D− lines. | Use Scenario: Shielding DVI-D source/sink connections in monitors, graphics cards, and set-top boxes from cable-discharge ESD. IC Role / Device Role / Timing Role: Unidirectional TVS array protecting three TMDS data pairs and one clock pair against ±8 kV contact ESD per IEC61000-4-2. Use Value: Maintains signal integrity up to 1.65 Gbps with 3.0–5.0 pF capacitance, avoiding jitter or eye-diagram closure on TMDS channels. |
| Ethernet 10/100 PHY Protection | T1/E1 Line Interface Protection |
Use Scenario: Safeguarding Ethernet PHY differential pairs (TX+/TX−, RX+/RX−) on embedded networking equipment exposed to field ESD. IC Role / Device Role / Timing Role: Four-channel ESD suppressor routing transients from each PHY line to local ground or VCC rail via internal steering diodes. Use Value: Achieves 300 W peak power handling and 17.5 V clamping at 5 A-meeting IEC61000-4-2 Level 4 without degrading 100BASE-TX signal fidelity. | Use Scenario: Protecting T1/E1 line interface circuits (TTIP/TRING, RTIP/RRING) in telecom access equipment from lightning-induced surges. IC Role / Device Role / Timing Role: Transient voltage suppressor providing bidirectional clamping path through internal TVS and steering diodes on tip/ring pairs. Use Value: Withstands 12 A IEC61000-4-5 lightning surges while maintaining <5 pF capacitance-critical for maintaining T1's 1.544 Mbps timing accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NUP2201DT1G | 2-channel, 5.5 V VRWM, 15.5 V VC @ 1 A, 12 pF I/O-to-GND capacitance | Higher capacitance limits use to ≤12 Mbps interfaces; lacks 4-line integration | Select when only two lines require protection and board space permits larger capacitance tolerance. |
| TPD2E001DRYR | 2-channel, 5 V VRWM, 12 V VC @ 1 A, 3.5 pF I/O-to-GND, SOT-563 package | Only protects two lines; requires two devices for four-line coverage; smaller 1.6 mm × 1.6 mm footprint | Choose for ultra-compact layouts where dual-device placement is acceptable and 3.5 pF capacitance is preferred over integration. |
Compared with NUP2201DT1G and TPD2E001DRYR, the SRV05-4MR6T1G delivers true 4-line integration in TSOP-6, lower clamping (12.5 V vs. 15.5 V), and tighter capacitance control (3–5 pF vs. 12 pF or 3.5 pF), making it optimal for space-constrained, high-speed USB/DVI designs requiring single-package simplicity.
Availability
SRV05-4MR6T1G is available at Aetrix Electronics and suitable for USB 2.0 port protection, DVI interface shielding, and Ethernet 10/100 PHY surge suppression requiring stable component supply across production volumes.
Supply support for SRV05-4MR6T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The SRV05-4MR6T1G belongs to onsemi's transient voltage suppressor (TVS) diode array product line, engineered specifically for high-speed digital interface protection where low capacitance, precise clamping, and multi-line integration are mandatory.
FAQ
What is the maximum clamping voltage of SRV05-4MR6T1G under IEC61000-4-2 ESD stress?
The SRV05-4MR6T1G exhibits a clamping voltage of 12.5 V at 1 A and 17.5 V at 5 A under 8×20 µs pulse conditions per IEC61000-4-2. Oscilloscope screenshots in the official datasheet confirm these values for both positive and negative 8 kV contact discharges, ensuring protected ICs remain within safe operating limits during real-world ESD events.
How does SRV05-4MR6T1G achieve low capacitance while maintaining high ESD robustness?
The SRV05-4MR6T1G achieves ≤5.0 pF I/O-to-GND capacitance through optimized silicon geometry and process tuning, while sustaining 300 W peak power via integrated TVS and steering diode architecture. This balance allows it to protect 480 Mbps USB 2.0 links without signal degradation-unlike discrete solutions where robustness typically increases capacitance.
Can SRV05-4MR6T1G be used for bidirectional signal lines like RS-485?
No-SRV05-4MR6T1G is a unidirectional TVS array designed for single-ended or differential data lines referenced to VCC or ground (e.g., USB, DVI). It lacks symmetrical breakdown for true bidirectional clamping. For RS-485, use bidirectional arrays such as NUP4201MR6T1G or SMAJ5.0A, which specify equal positive/negative clamping thresholds.
What is the recommended PCB layout practice for SRV05-4MR6T1G to minimize inductive effects during ESD events?
Minimize trace length from SRV05-4MR6T1G pins 1/3/4/6 to connectors and from pins 2 (VN) and 5 (VP) to low-inductance ground/power planes. Use solid ground pour beneath the device, avoid vias in protection paths, and place the SRV05-4MR6T1G within 5 mm of the protected connector to limit L·di/dt voltage overshoot during nanosecond-scale ESD transients.
Is SRV05-4MR6T1G compliant with lead-free soldering standards and RoHS requirements?
Yes-SRV05-4MR6T1G is explicitly marked "Pb-Free" in its ordering code and meets J-STD-020 moisture sensitivity level 1 (MSL1) requirements. Its TSOP-6 package supports reflow profiles up to 260°C peak temperature for 10 seconds, complying with IPC/JEDEC J-STD-020D and RoHS Directive 2011/65/EU.
SRV05-4MR6T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 17.5V
- Current - Peak Pulse (10/1000µs):
- 5A (8/20µs)
- Power - Peak Pulse:
- 300W
- Power Line Protection:
- Yes
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 3pF @ 1MHz
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
SRV05-4MR6T1G FAQ
1.How can I place an order for SRV05-4MR6T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for SRV05-4MR6T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SRV05-4MR6T1G reliable?
The price and inventory of SRV05-4MR6T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SRV05-4MR6T1G is usually 5 days.
3.What payment methods are accepted for SRV05-4MR6T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SRV05-4MR6T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SRV05-4MR6T1G?
SRV05-4MR6T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SRV05-4MR6T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SRV05-4MR6T1G?
For technical support, including SRV05-4MR6T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SRV05-4MR6T1G requirements.
6.How does Aetrix verify that SRV05-4MR6T1G is sourced from the original manufacturer or authorized distributors?
All SRV05-4MR6T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SRV05-4MR6T1G meets industry standards.
7.What is the process for return or replacement of SRV05-4MR6T1G?
All SRV05-4MR6T1G units undergo pre-shipment inspection (PSI). If there is an issue with SRV05-4MR6T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SRV05-4MR6T1G part is unused and in its original packaging.
Return procedure for SRV05-4MR6T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SRV05-4MR6T1G Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
