STMicroelectronics ST25R3911B-ASWB
- Part No.:
- ST25R3911B-ASWB
- Manufacturer:
- STMicroelectronics
- Category:
- RFID, RF Access, Monitoring ICs
- Package:
- Die
- Datasheet:
-
ST25R3911B-ASWB.pdf
- Description:
- NFC / HF RFID READER IC
- Quantity:
- Payment:

- Shipping:

Inventory:1,313
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Product details
Overview
ST25R3911B-ASWB from STMicroelectronics is a high-performance HF NFC initiator/reader IC supporting ISO 14443A/B, ISO 15693, FeliCa®, and ISO 18092 (NFCIP-1) active P2P at up to 6.8 Mbit/s AFE framing, with integrated 1.4 W differential antenna drivers, automatic antenna tuning (AAT), and capacitive wake-up sensing. It operates across 2.4–5.5 V and −40 °C to +125 °C in QFN32 (5 × 5 mm) package, targeting infrastructure-grade NFC readers requiring robust RF performance and ultra-low-power tag detection.
For engineers reviewing the ST25R3911B-ASWB datasheet, ST25R3911B-ASWB pinout, ST25R3911B-ASWB application, or ST25R3911B-ASWB equivalent, key selection considerations include VHBR support (3.4/6.8 Mbit/s), dual AM/PM demodulation channels, differential 1 Ω antenna drive capability, capacitive sensor integration for zero-field wake-up, and SPI interface with 96-byte FIFO - all validated for EMVCo® 2.6b, access control, and NFC infrastructure deployments.
Technical Context
The ST25R3911B-ASWB implements a dual-path analog front end with independent AM and PM demodulator chains, each featuring programmable gain stages, band-pass filtering optimized for subcarrier frequencies from 212 kHz to 6.8 MHz, and automatic channel selection logic. Its transmitter integrates two 1 Ω differential low-impedance drivers (RFO1/RFO2) capable of single-ended or differential antenna driving, with OOK/AM modulation and slow-ramp field control compliant with Syndicat des transports d'Ile de France (STIF) timing requirements.
It embeds a dedicated phase/amplitude detector for real-time antenna LC tank monitoring, enabling closed-loop AAT and tuning optimization without external components. The on-chip capacitive sensor (CSI/CSO pins) and RC oscillator with wake-up timer support autonomous, sub-100 µA card-presence detection - decoupled from RF field activation - while the 6 Mbit/s SPI with hardware flow control ensures deterministic host communication during high-throughput VHBR transactions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VHBR Support | 3.4 Mbit/s PICC→PCD and 6.8 Mbit/s PCD→PICC framing; requires 27.12 MHz crystal for full operation |
| Antenna Drive | Dual 1 Ω differential drivers (RFO1/RFO2); supports single-ended or differential antenna topologies with <1.4 W output |
| Demodulation | Independent AM and PM receive chains with automatic selection; supports subcarriers up to 6.8 MHz |
| Capacitive Wake-up | Integrated CSI/CSO sensor enables <100 µA card-detection without RF field; threshold-based interrupt generation |
| SPI Interface | 6 Mbit/s 4-wire SPI with 96-byte hardware FIFO; supports transparent mode for custom protocol framing |
| Supply Range | 2.4 V to 5.5 V core supply; I/O pins tolerate 1.65 V to 5.5 V - enables direct interfacing with diverse MCUs |
| Operating Temp | −40 °C to +125 °C - qualified for industrial and automotive-grade NFC infrastructure applications |
Pinout & Package
ST25R3911B-ASWB is housed in a wettable-flank QFN32 (5 × 5 mm, 0.5 mm pitch) package, optimized for automated optical inspection (AOI) and high-reliability solder joint formation in industrial reader modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RFO1 / RFO2 | Differential antenna driver outputs | Low-impedance (1 Ω) push-pull outputs; enable direct PCB antenna drive without matching networks or baluns |
| RFI1 / RFI2 | Differential receiver inputs | Accept signals from capacitor-divided antenna terminals; support phase/amplitude detection for AAT and PM demodulation |
| CSI / CSO | Capacitive sensor interface | Two-pin differential capacitance measurement path for low-power card presence detection without RF activation |
| XTI / XTO | Crystal oscillator terminals | Support 13.56 MHz or 27.12 MHz crystals; fast-start transconductance boost enables stable oscillation within microseconds |
| MOSI / MISO / SCLK / /SS | SPI interface signals | Full-duplex 6 Mbit/s interface with hardware FIFO; /SS enables multi-device sharing on same bus |
| IRQ | Interrupt request output | Open-drain signal asserting on wake-up event, FIFO threshold, framing error, or calibration completion |
Key Features
| Feature | Design Value |
|---|---|
| Automatic Antenna Tuning (AAT) | Real-time LC tank phase/amplitude feedback loop eliminates manual tuning; maintains optimal coupling across temperature and mechanical stress |
| Dual Demodulation Architecture | Separate AM and PM receive paths with auto-selection ensure reliable decoding across ISO 14443A (OOK), ISO 14443B (AM), and FeliCa® (PM) protocols |
| Dynamic Power Output (DPO) | Software-controlled segment-based driver impedance adjustment enables precise field strength regulation without external DACs or resistors |
| Transparent Mode Operation | Bypasses internal framing logic to expose raw digitized subcarrier data via SPI - essential for MIFARE Classic® emulation and proprietary protocol development |
| Low-Power Detection Suite | Combines capacitive sensing, amplitude/phase-based RF field detection, and RC wake-up timer - enables <5 µA average system current in standby |
Applications
| EMVCo® Payment Terminal | Secure Access Control Reader |
|---|---|
Use Scenario: Contactless payment terminal validating chip-based cards per EMVCo® 2.6b specification in retail and transit environments. IC Role / Device Role / Timing Role: NFC initiator performing high-reliability 6.8 Mbit/s PCD→PICC framing, field stabilization, and collision avoidance during card polling. Use Value: VHBR support reduces transaction time by >40% vs legacy 106 kbit/s readers; AAT maintains read range consistency across plastic housing thermal expansion. | Use Scenario: Multi-factor physical access system using ISO 14443B smart cards and NFC-enabled mobile credentials in office buildings and data centers. IC Role / Device Role / Timing Role: Dual-mode initiator supporting both legacy contactless cards and modern secure element handshakes with dynamic modulation index adaptation. Use Value: Automatic AM/PM channel selection ensures interoperability with diverse credential types; capacitive wake-up cuts standby power to <10 µA per door reader. |
| NFC Infrastructure Gateway | Industrial Asset Tagging System |
Use Scenario: Fixed-mount NFC gateway collecting telemetry from battery-powered tags in factory automation and logistics hubs. IC Role / Device Role / Timing Role: High-sensitivity reader operating in continuous listen mode with periodic low-power wake-up cycles to detect passive tags. Use Value: Integrated phase detector enables sub-1 dB SNR degradation over 10-year antenna aging; DPO allows adaptive field strength for varying tag orientation and distance. | Use Scenario: Ruggedized handheld scanner reading ISO 15693 tags on metal assets in harsh industrial environments with wide temperature swings. IC Role / Device Role / Timing Role: Reader IC delivering 1.4 W differential drive into detuned antennas, with built-in amplitude compensation for metal-induced Q-factor reduction. Use Value: Wide −40 °C to +125 °C operating range ensures reliability in unconditioned facilities; wettable-flank QFN enables IPC-A-610 Class 3 solder joint integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HF NFC initiator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP PN7160 | Single 50 Ω antenna driver; no differential output; max 0.7 W output; lacks capacitive wake-up and AAT | Targeted at cost-sensitive consumer devices; not rated for industrial temp or EMVCo® certification | Select when BOM cost is primary constraint and RF performance margins are sufficient for short-range use cases |
| Infineon SLI13 | Supports only ISO 14443A/B; no VHBR, no ISO 15693/FeliCa®; no integrated capacitive sensor or AAT | Designed for simple access badge readers; lacks infrastructure-grade features like dual demodulation and 125 °C rating | Select for legacy system upgrades where protocol scope is limited and thermal robustness is not required |
Compared with PN7160 and SLI13, the ST25R3911B-ASWB uniquely delivers differential 1.4 W drive, VHBR, AAT, and capacitive wake-up in a single industrial-grade IC - enabling certified EMVCo® terminals, long-range infrastructure readers, and thermally demanding deployments without external compensation circuitry.
Availability
ST25R3911B-ASWB is available at Aetrix Electronics and suitable for EMVCo® payment terminals, secure access control systems, NFC infrastructure gateways, and industrial asset tagging applications requiring stable component supply, extended temperature operation, and certified NFC performance.
Supply support for ST25R3911B-ASWB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and sensors for industrial, automotive, and consumer markets.
The ST25R series targets high-reliability NFC infrastructure applications, emphasizing RF performance, protocol flexibility, and ultra-low-power operation - specifically engineered for certified payment terminals, secure access systems, and industrial IoT readers.
FAQ
What crystal frequency is required for VHBR operation?
The ST25R3911B-ASWB requires a 27.12 MHz crystal to achieve full 6.8 Mbit/s PCD→PICC VHBR framing. While it supports 13.56 MHz crystals for standard modes, VHBR functionality is disabled unless the higher-frequency crystal is used and properly configured in the oscillator control registers.
How does automatic antenna tuning (AAT) improve system reliability?
AAT continuously monitors phase and amplitude of the antenna LC tank via RFI1/RFI2 and adjusts driver parameters in real time to maintain resonance. This compensates for environmental drift - such as temperature-induced capacitance shifts or mechanical stress - ensuring consistent read range and coupling efficiency without manual recalibration or external tuning components.
Can the ST25R3911B-ASWB drive two separate antennas?
Yes - in single-ended mode, the ST25R3911B-ASWB can drive two independent antennas by configuring IO configuration register 1 bit rfo2 to multiplex RFO1 and RFO2 outputs. Each antenna is activated selectively, enabling spatial diversity or multi-zone coverage without external RF switches or additional driver ICs.
What is the role of the CSI and CSO pins beyond capacitive sensing?
CSI and CSO pins are dedicated exclusively to the integrated capacitive sensor - they form a differential measurement path for detecting changes in parasitic capacitance caused by nearby objects. These pins do not serve general-purpose I/O, analog input, or debug functions; their sole purpose is low-power wake-up detection, and they must be connected to calibrated copper patches per layout guidelines in AN5025.
ST25R3911B-ASWB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- ST25R
- Package/Case:
- Die
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- RFID Reader
- Frequency:
- 13.56MHz
- Standards:
- FeliCa, ISO 14443, ISO 15693, ISO 18092, MIFARE, NFC
- Interface:
- SPI
- Voltage - Supply:
- 2.4V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- Wafer
ST25R3911B-ASWB FAQ
1.How can I place an order for ST25R3911B-ASWB through Aetrix?
Please submit a Request for Quotation (RFQ) for ST25R3911B-ASWB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ST25R3911B-ASWB reliable?
The price and inventory of ST25R3911B-ASWB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ST25R3911B-ASWB is usually 5 days.
3.What payment methods are accepted for ST25R3911B-ASWB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ST25R3911B-ASWB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ST25R3911B-ASWB?
ST25R3911B-ASWB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ST25R3911B-ASWB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ST25R3911B-ASWB?
For technical support, including ST25R3911B-ASWB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ST25R3911B-ASWB requirements.
6.How does Aetrix verify that ST25R3911B-ASWB is sourced from the original manufacturer or authorized distributors?
All ST25R3911B-ASWB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ST25R3911B-ASWB meets industry standards.
7.What is the process for return or replacement of ST25R3911B-ASWB?
All ST25R3911B-ASWB units undergo pre-shipment inspection (PSI). If there is an issue with ST25R3911B-ASWB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ST25R3911B-ASWB part is unused and in its original packaging.
Return procedure for ST25R3911B-ASWB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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