Vishay Siliconix SUD40N10-25-T4-E3
- Part No.:
- SUD40N10-25-T4-E3
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Datasheet:
-
SUD40N10-25-T4-E3.pdf
- Description:
- MOSFET N-CH 100V 40A TO252
- Quantity:
- Payment:

- Shipping:

Inventory:6,752
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Product details
Overview
SUD40N10-25-T4-E3 from Vishay Siliconix is an N-channel TrenchFET® power MOSFET rated for 100 V drain-source voltage, 40 A continuous drain current at TC = 25 °C, and 0.025 Ω RDS(on) at VGS = 10 V. It features a TO-252AA (DPAK) package with drain-connected tab, 175 °C maximum junction temperature, and 100 % Rg tested. It is used in high-efficiency DC-DC converters and motor drive half-bridges.
For engineers reviewing the SUD40N10-25-T4-E3 datasheet, SUD40N10-25-T4-E3 pinout, SUD40N10-25-T4-E3 application, or SUD40N10-25-T4-E3 equivalent, key selection criteria include its 100 V rating, low 0.025 Ω on-resistance at 10 V gate drive, thermal robustness to 175 °C, and TO-252 surface-mount package suitability for high-current PCB layouts.
Technical Context
This MOSFET employs trench-gate silicon technology optimized for low conduction loss and fast switching. Its gate threshold voltage (1.0–3.0 V) enables compatibility with 3.3 V and 5 V logic-level drivers, while its 40 nC typical total gate charge supports efficient PWM operation up to several hundred kHz.
The device integrates a robust body diode with 1.0–1.5 V forward voltage at 40 A and 75–120 ns reverse recovery time, enabling synchronous rectification and freewheeling in buck and half-bridge topologies without external diode supplementation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Supports input rails up to 80 V DC with 20 % safety margin in industrial power supplies. |
| RDS(on) | 0.025 Ω @ VGS = 10 V, ID = 40 A - Delivers ≤ 40 W conduction loss at full rated current, enabling compact thermal design. |
| ID (continuous) | 40 A @ TC = 25 °C - Sustains high load current when mounted on ≥1"×1" FR4 with copper pour and thermal vias. |
| TJ max | 175 °C - Enables operation in under-hood automotive or sealed industrial enclosures without derating at ambient ≤105 °C. |
| Qg | 40–60 nC - Determines gate driver power requirement; compatible with common 1-A peak gate drivers for ≤500 kHz switching. |
| Ciss | 2400 pF - Impacts high-frequency gate drive impedance and EMI filter sizing in SMPS designs. |
| VGS(th) | 1.0–3.0 V - Ensures reliable turn-on with standard microcontroller GPIO or low-voltage PWM controllers. |
Pinout & Package
Package: TO-252AA (DPAK), surface-mount, drain-connected tab for enhanced thermal transfer to PCB copper pour.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| G (Gate) | Control electrode | Receives voltage-controlled signal to modulate channel conductivity; requires <3.5 Ω series resistance to damp ringing. |
| S (Source) | Reference node for gate drive and current return | Must be tied to power ground plane with low-inductance connection to minimize switching noise coupling. |
| D (Drain) | Main current output terminal | Internally bonded to exposed metal tab; must be connected to high-current trace or thermal pad with ≥4 thermal vias. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchFET® architecture | Enables lower RDS(on) per die area than planar MOSFETs, reducing package size and cost for given current rating. |
| 100 % Rg tested | Guarantees gate resistance between 1 Ω and 3.5 Ω, ensuring predictable gate drive timing and EMI behavior across production lots. |
| Drain-connected tab | Provides direct thermal path from junction to PCB; achieves 0.85 °C/W typical RthJC, critical for high-power density layouts. |
| 175 °C TJ max | Supports extended lifetime in thermally constrained environments where ambient exceeds 100 °C, such as LED drivers or motor control modules. |
Applications
| Motor Drive Half-Bridge | Industrial DC-DC Converter |
|---|---|
Use Scenario: High-side/low-side switching in 24–48 V BLDC motor inverters with PWM frequencies up to 20 kHz. IC Role / Device Role / Timing Role: Power switch in half-bridge leg; handles bidirectional current during commutation and freewheeling via integrated body diode. Use Value: Low RDS(on) minimizes I²R losses during conduction; 175 °C rating ensures reliability under stall-current overload conditions. | Use Scenario: Primary-side switch in isolated 48 V-to-12 V flyback or active-clamp forward converter for factory automation PLCs. IC Role / Device Role / Timing Role: Main power switch controlling energy transfer; operates with 100–300 kHz PWM and synchronous rectification on secondary side. Use Value: 40 nC Qg enables efficient gate driving with low-power controllers; TO-252 package allows dense layout with minimal thermal relief. |
| Automotive Body Control Module | High-Current Load Switch |
Use Scenario: Driving solenoids, fans, and lighting loads in 12 V/24 V vehicle subsystems with load-dump protection. IC Role / Device Role / Timing Role: High-side load switch controlled by microcontroller GPIO; includes built-in avalanche ruggedness for inductive kickback suppression. Use Value: 80 mJ single-pulse avalanche energy rating eliminates need for external TVS in many BCM applications. | Use Scenario: Hot-swap and power sequencing control for server backplanes or telecom line cards requiring 30+ A steady-state current. IC Role / Device Role / Timing Role: Low-loss pass element in OR-ing or e-fuse circuit; operated in linear mode during inrush limiting or fully saturated for steady-state conduction. Use Value: 0.028 Ω RDS(on) at 4.5 V gate drive enables use with 5 V logic controllers without level-shifting, simplifying system design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP40NF10L | TO-220 package, higher RDS(on) = 0.032 Ω @ 10 V, same 100 V/40 A rating | Through-hole mounting only; unsuitable for space-constrained SMT designs | Select when board assembly uses through-hole process or when higher thermal mass is preferred for intermittent surge handling. |
| IRF3205PBF | TO-220 package, 55 V rating, RDS(on) = 0.008 Ω @ 10 V, ID = 110 A | Limited to ≤55 V systems; superior conduction loss but incompatible with 100 V bus requirements | Select only for 24–48 V applications demanding ultra-low on-resistance; not a voltage-compatible substitute for SUD40N10-25-T4-E3. |
Compared with STP40NF10L and IRF3205PBF, the SUD40N10-25-T4-E3 offers surface-mount compatibility, tighter RDS(on) tolerance, and guaranteed 175 °C operation-making it optimal for thermally dense, high-reliability 100 V SMT power stages where lead-free compliance and PCB real estate are critical.
Availability
SUD40N10-25-T4-E3 is available at Aetrix Electronics and suitable for motor drives, industrial DC-DC converters, and automotive body control modules requiring stable component supply and RoHS-compliant manufacturing.
Supply support for SUD40N10-25-T4-E3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors, specializing in power MOSFETs, diodes, and optoelectronics with emphasis on performance, reliability, and thermal efficiency.
The SUD40N10-25-T4-E3 belongs to Vishay's TrenchFET® Gen III family, engineered specifically for high-current, high-temperature SMT power switching in industrial and automotive applications where low RDS(on), robust avalanche capability, and lead-free packaging are mandatory.
FAQ
What is the maximum continuous drain current rating for the SUD40N10-25-T4-E3 at 125 °C case temperature?
The SUD40N10-25-T4-E3 supports 23 A continuous drain current at TC = 125 °C, as specified in its Absolute Maximum Ratings table. This derating reflects thermal limitations of the TO-252 package under sustained high-temperature operation. Designers must verify heatsinking and PCB copper area to maintain TC ≤ 125 °C when operating near this limit. The SUD40N10-25-T4-E3 datasheet confirms this value under Note b for pulsed testing conditions.
Does the SUD40N10-25-T4-E3 have avalanche capability, and how is it rated?
Yes, the SUD40N10-25-T4-E3 is rated for 40 A avalanche current and 80 mJ single-pulse avalanche energy (EAS) with L = 0.1 mH. This ruggedness allows safe operation during inductive load switching transients without external snubbers in many applications. The SUD40N10-25-T4-E3 specification sheet explicitly lists these values in the Absolute Maximum Ratings section, confirming its suitability for automotive and industrial inductive switching.
Is the SUD40N10-25-T4-E3 RoHS-compliant, and what does the "E3" suffix indicate?
Yes, the SUD40N10-25-T4-E3 is RoHS-compliant. The "E3" suffix denotes lead (Pb)-free terminations per JEDEC J-STD-609, verified in Vishay's official documentation. The device meets exemption criteria for high-melting-point alloys and is qualified for lead-free reflow soldering profiles. The SUD40N10-25-T4-E3 product summary explicitly states "SUD40N10-25-E3 (Lead (Pb)-free)" and displays the RoHS-compliant logo on its datasheet cover page.
What is the typical gate threshold voltage range for the SUD40N10-25-T4-E3, and how does it affect drive requirements?
The SUD40N10-25-T4-E3 has a gate threshold voltage (VGS(th)) range of 1.0 V to 3.0 V at TJ = 25 °C, measured with VDS = VGS and ID = 250 µA. This low threshold enables direct drive from 3.3 V microcontrollers but requires careful attention to noise immunity-especially in high-dv/dt environments. The SUD40N10-25-T4-E3 datasheet specifies this range in the Static Characteristics table, supporting logic-level compatibility while necessitating proper gate routing practices.
How does the thermal resistance of the SUD40N10-25-T4-E3 compare between junction-to-case and junction-to-ambient?
The SUD40N10-25-T4-E3 has a typical junction-to-case thermal resistance (RthJC) of 0.85 °C/W and a steady-state junction-to-ambient resistance (RthJA) of 40 °C/W on a 1" × 1" FR4 board. This 47× difference highlights the critical importance of mounting the drain tab to a large copper area: effective thermal management relies almost entirely on the case-to-PCB path. The SUD40N10-25-T4-E3 Thermal Resistance Ratings table provides both values, confirming that heatsinking via the tab dominates thermal performance.
SUD40N10-25-T4-E3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- TrenchFET®
- Package/Case:
- TO-252-3, DPAK (2 Leads + Tab), SC-63
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 40A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 25mOhm @ 40A, 10V
- Vgs(th) (Max) @ Id:
- 3V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 60 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2400 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 3W (Ta), 136W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-252AA
SUD40N10-25-T4-E3 FAQ
1.How can I place an order for SUD40N10-25-T4-E3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SUD40N10-25-T4-E3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SUD40N10-25-T4-E3 reliable?
The price and inventory of SUD40N10-25-T4-E3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SUD40N10-25-T4-E3 is usually 5 days.
3.What payment methods are accepted for SUD40N10-25-T4-E3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SUD40N10-25-T4-E3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SUD40N10-25-T4-E3?
SUD40N10-25-T4-E3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SUD40N10-25-T4-E3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SUD40N10-25-T4-E3?
For technical support, including SUD40N10-25-T4-E3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SUD40N10-25-T4-E3 requirements.
6.How does Aetrix verify that SUD40N10-25-T4-E3 is sourced from the original manufacturer or authorized distributors?
All SUD40N10-25-T4-E3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SUD40N10-25-T4-E3 meets industry standards.
7.What is the process for return or replacement of SUD40N10-25-T4-E3?
All SUD40N10-25-T4-E3 units undergo pre-shipment inspection (PSI). If there is an issue with SUD40N10-25-T4-E3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SUD40N10-25-T4-E3 part is unused and in its original packaging.
Return procedure for SUD40N10-25-T4-E3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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