onsemi SZCM1213A-04SO
- Part No.:
- SZCM1213A-04SO
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SC-74, SOT-457
- Datasheet:
-
SZCM1213A-04SO.pdf
- Description:
- TVS DIODE 3.3VWM 10VC SC74
- Quantity:
- Payment:

- Shipping:

Inventory:1,629
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SZCM1213A-04SO from onsemi is a 4-channel low-capacitance ESD protection array designed for high-speed data lines, featuring 0.85 pF typical channel input capacitance, ±8 kV IEC 61000−4−2 contact discharge rating, and integrated VP–VN Zener clamping. It protects USB 2.0, HDMI, DVI, SATA, and IEEE1394 interfaces while minimizing signal distortion in compact SC−74 packages.
For engineers reviewing the SZCM1213A-04SO datasheet, pinout, applications, or equivalent options, key selection criteria include channel-to-channel capacitance matching (0.02 pF typical), clamp voltage under 1 A transient (+9.9 V / −1.6 V), supply rail protection without external bypass capacitors, and AEC−Q101 qualification for automotive use.
Technical Context
The SZCM1213A-04SO implements a dual-diode steering architecture per channel-each I/O pin connects to both VP and VN rails via series diodes-to divert ESD current to supply rails. Its embedded Zener diode between VP and VN clamps supply transients and eliminates need for external bypass capacitors during positive ESD events.
It operates across −40°C to +85°C with VP–VN supply range of 3.3 V to 5.5 V, supports ≥1000 ESD strikes per pin under IEC 61000−4−2 Level 4, and maintains stable capacitance (<2.0 pF) over voltage and temperature-critical for differential signaling integrity in HDMI and USB 2.0 applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating | ±8 kV contact discharge per IEC 61000−4−2 Level 4-ensures robust system-level ESD immunity without external TVS stacking. |
| Channel Input Capacitance | 0.85 pF typical at 1 MHz-preserves signal integrity up to 480 Mbps (USB 2.0) and 800 Mbps (FireWire). |
| Capacitance Matching | 0.02 pF typical between channels-enables precise differential pair protection in HDMI/DVI links. |
| Clamp Voltage (1 A) | +9.9 V (positive), −1.6 V (negative)-limits protected line excursion below IC absolute maximum ratings. |
| Supply Rail Protection | Zener clamping between VP and VN-absorbs ESD energy on VCC rail and removes need for 0.1 µF bypass capacitor. |
| Operating Voltage Range | VP–VN = 3.3 V to 5.5 V-compatible with standard logic I/O domains including 3.3 V and 5 V systems. |
Pinout & Package
Package: SC−74 (Case 318F), 6-pin surface-mount, Pb-free, RoHS compliant. Footprint compatible with industry-standard SO-style leadframe layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - CH1 | I/O Channel 1 | Protected signal line; bidirectionally clamped to VP/VN via internal diode pair. |
| 2 - VN | Negative Supply Rail | Reference ground for all channels and Zener cathode; must be low-inductance connection to system GND. |
| 3 - CH2 | I/O Channel 2 | Second protected signal line; matched capacitance and dynamic resistance to CH1. |
| 4 - CH3 | I/O Channel 3 | Third protected signal line; identical electrical behavior to CH1/CH2 for balanced layout. |
| 5 - VP | Positive Supply Rail | Power rail clamp node; Zener anode connection-requires minimal trace inductance to maintain low VCL. |
| 6 - CH4 | I/O Channel 4 | Fourth protected signal line; enables full-port protection for 4-lane interfaces like USB 2.0 D+/D− + ID + VBUS sense. |
Key Features
| Feature | Design Value |
|---|---|
| Four independent ESD channels | Enables single-device protection of full USB 2.0 port (D+, D−, ID, VBUS) or two differential pairs (e.g., HDMI TMDS). |
| 0.85 pF typical input capacitance | Minimizes insertion loss and phase skew at 250–500 MHz-critical for maintaining eye diagram margin in 480 Mbps links. |
| Integrated VP–VN Zener diode | Clamps supply rail transients and replaces external 0.1 µF ceramic capacitor-reducing BOM count and PCB area. |
| 0.02 pF typical channel capacitance matching | Ensures <1 ps inter-pair skew in differential signaling-prevents common-mode noise conversion in HDMI/DVI receivers. |
| AEC−Q101 qualified | Validated for automotive infotainment and ADAS camera links requiring extended temperature operation and reliability screening. |
Applications
| USB 2.0 Interface Protection | HDMI/DVI TMDS Line Protection |
|---|---|
Use Scenario: Protecting D+, D−, ID, and VBUS pins of USB 2.0 connectors in notebooks and docking stations against contact ESD. IC Role / Device Role / Timing Role: Bidirectional ESD clamp placed immediately adjacent to connector to minimize trace inductance before protection. Use Value: 0.85 pF capacitance prevents signal degradation at 480 Mbps; ±8 kV rating meets IEC 61000−4−2 system-level compliance. | Use Scenario: Shielding three TMDS data pairs and clock lane in HDMI 1.4 or DVI-D interfaces of LCD TVs and set-top boxes. IC Role / Device Role / Timing Role: Four-channel array assigned to three data lanes + clock, leveraging matched capacitance to preserve differential timing. Use Value: 0.02 pF channel matching ensures <1 ps skew-maintaining HDMI eye opening and reducing bit error rate. |
| IEEE1394 (FireWire®) Port Protection | SATA Data Lane Protection |
Use Scenario: Safeguarding 400/800 Mbps FireWire ports in digital camcorders and external storage enclosures from handling ESD. IC Role / Device Role / Timing Role: ESD shunt located at port entry point, with VP tied to 3.3 V supply and VN to chassis ground. Use Value: Low dynamic resistance (0.96 Ω positive / 0.5 Ω negative) limits clamp voltage rise during fast 1 ns ESD edges. | Use Scenario: Protecting SATA Gen II (3 Gbps) transmitter/receiver lanes in desktop motherboards and HDD controllers. IC Role / Device Role / Timing Role: Dual-channel assignment per differential pair (TX+/TX−, RX+/RX−), using shared VP/VN rails. Use Value: Stable 2.0 pF max capacitance at 1 MHz avoids resonance near 1.5 GHz fundamental frequency of SATA signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E001DRYR | 0.6 pF typical capacitance; no integrated Zener; requires external 0.1 µF VP bypass capacitor. | Better for ultra-low-capacitance needs (<0.7 pF); less suitable where board space limits external caps. | Select when lowest possible loading is critical and VP bypass cap placement is feasible. |
| ESD7L5.0ST5G | Single-channel, 5.0 V stand-off; 0.65 pF; no VP/VN rails-designed for ground-referenced clamping only. | Requires four discrete devices for quad protection; lacks supply rail clamping capability. | Choose for cost-sensitive, non-rail-clamping designs where layout allows discrete placement per line. |
Compared with TPD4E001DRYR and ESD7L5.0ST5G, the SZCM1213A-04SO uniquely integrates supply rail clamping and delivers matched 4-channel performance in one SC−74 package-reducing component count, PCB area, and layout complexity for multi-lane high-speed interfaces.
Availability
SZCM1213A-04SO is available at Aetrix Electronics and suitable for USB 2.0 interface protection, HDMI/DVI TMDS line safeguarding, and SATA Gen II data lane ESD mitigation requiring stable component supply and automotive-grade reliability.
Supply support for SZCM1213A-04SO includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The CM1213A family targets high-speed serial interface protection with ultra-low capacitance and integrated supply rail clamping-designed specifically for USB, HDMI, FireWire, and SATA systems where signal fidelity and board space are constrained.
FAQ
What is the primary function of the SZCM1213A-04SO in a circuit?
The SZCM1213A-04SO functions as a 4-channel ESD protection array that steers electrostatic discharge current away from sensitive downstream ICs by clamping I/O lines to VP and VN supply rails. Its integrated Zener diode also protects the VP rail itself. Each channel maintains 0.85 pF typical capacitance to avoid degrading high-speed signals-making SZCM1213A-04SO ideal for USB 2.0, HDMI, and SATA interfaces where signal integrity is critical.
Does the SZCM1213A-04SO require an external bypass capacitor on the VP pin?
No, the SZCM1213A-04SO does not require an external bypass capacitor on the VP pin due to its integrated Zener diode between VP and VN, which clamps supply rail transients and absorbs positive ESD energy. This eliminates the need for a 0.1 µF ceramic capacitor typically used in similar ESD arrays. However, for lowest possible clamp voltage-especially when VP is biased significantly below the Zener breakdown-the datasheet recommends adding a 0.22 µF capacitor close to the VP pin. The SZCM1213A-04SO's design inherently reduces BOM count and PCB footprint.
How many ESD strikes can the SZCM1213A-04SO withstand per channel?
The SZCM1213A-04SO is rated to withstand over 1000 ESD strikes per I/O channel under IEC 61000−4−2 Level 4 conditions: ±8 kV contact discharge, 1-second intervals, completed in one continuous test run. After 1000 strikes, the device passes full production electrical testing-including leakage, capacitance, and clamp voltage-confirming functional integrity. This endurance applies individually to each of the four channels (CH1–CH4) in the SZCM1213A-04SO, supporting long-term reliability in frequently handled ports like USB and FireWire.
Is the SZCM1213A-04SO qualified for automotive applications?
Yes, the SZCM1213A-04SO carries the "SZ" prefix indicating AEC−Q101 qualification and PPAP capability-validating its suitability for automotive infotainment, camera links, and telematics systems. It operates across −40°C to +125°C junction temperature (per AEC−Q101 stress testing), supports PPAP documentation, and meets stringent automotive reliability requirements. The SZCM1213A-04SO's low capacitance and rail-clamping architecture make it especially valuable in automotive HDMI or USB-C display/audio interfaces where ESD robustness and signal fidelity are jointly critical.
What is the package type and pin configuration of the SZCM1213A-04SO?
The SZCM1213A-04SO uses the SC−74 (Case 318F) 6-pin surface-mount package-a compact,鸥翼式 leaded outline measuring 2.0 mm × 1.25 mm × 0.95 mm. Pin 1 is CH1, Pin 2 is VN (ground reference), Pin 3 is CH2, Pin 4 is CH3, Pin 5 is VP (positive supply), and Pin 6 is CH4. This arrangement enables symmetrical routing for differential pairs. The SZCM1213A-04SO's SC−74 footprint is compatible with standard reflow profiles and automated assembly processes used in high-volume consumer and automotive electronics manufacturing.
SZCM1213A-04SO Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SC-74, SOT-457
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.3V
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 10V (Typ)
- Current - Peak Pulse (10/1000µs):
- 1A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- Yes
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-74
SZCM1213A-04SO FAQ
1.How can I place an order for SZCM1213A-04SO through Aetrix?
Please submit a Request for Quotation (RFQ) for SZCM1213A-04SO on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SZCM1213A-04SO reliable?
The price and inventory of SZCM1213A-04SO are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SZCM1213A-04SO is usually 5 days.
3.What payment methods are accepted for SZCM1213A-04SO?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SZCM1213A-04SO transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SZCM1213A-04SO?
SZCM1213A-04SO orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SZCM1213A-04SO order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SZCM1213A-04SO?
For technical support, including SZCM1213A-04SO datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SZCM1213A-04SO requirements.
6.How does Aetrix verify that SZCM1213A-04SO is sourced from the original manufacturer or authorized distributors?
All SZCM1213A-04SO products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SZCM1213A-04SO meets industry standards.
7.What is the process for return or replacement of SZCM1213A-04SO?
All SZCM1213A-04SO units undergo pre-shipment inspection (PSI). If there is an issue with SZCM1213A-04SO, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SZCM1213A-04SO part is unused and in its original packaging.
Return procedure for SZCM1213A-04SO:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SZCM1213A-04SO Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

