onsemi SZESD8472MUT5G
- Part No.:
- SZESD8472MUT5G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- 0201 (0603 Metric)
- Datasheet:
-
SZESD8472MUT5G.pdf
- Description:
- TVS DIODE 5.3VWM 14VC 2X3DFN
- Quantity:
- Payment:

- Shipping:

Inventory:25,754
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Product details
Overview
SZESD8472MUT5G from onsemi is a bi-directional ultra-low-capacitance ESD protection diode in X3DFN2 package, featuring 0.2 pF capacitance at 1 MHz, 5.3 V stand-off voltage, <1 nA leakage at VRWM, and clamping voltage of 11 V at 1 A IPP-designed for RF antenna line protection in wireless handsets.
For engineers reviewing the SZESD8472MUT5G datasheet, pinout, applications, or equivalent options, key selection criteria include capacitance linearity over voltage, insertion loss (<0.25 dB at 8.5 GHz), IEC61000-4-2 ±8 kV contact/air rating, and AEC-Q101 qualification for automotive-grade reliability.
Technical Context
The SZESD8472MUT5G is a bi-directional TVS diode with symmetrical clamping behavior across pins 1 and 2, optimized for high-frequency signal integrity. Its junction capacitance remains stable (0.15–0.30 pF) from 1 MHz to 1 GHz, and dynamic resistance is <0.75 Ω per TLP testing.
It delivers 15–17.8 V clamping at 2.4 A IEC61000-4-5 lightning surge current, with breakdown voltage specified at 7.0–12 V (IT = 1 mA), and operates across −55°C to +150°C junction temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance @ 1 MHz | 0.2 pF - enables minimal RF signal distortion in antenna front-end paths |
| Stand-off Voltage | 5.3 V - protects 5 V logic and RF ICs without false triggering |
| Clamping Voltage @ 1 A | 11 V - limits transient energy delivered to downstream RF switch or PA |
| Leakage Current @ 5.3 V | <1 nA - prevents DC bias shift in sensitive RF detector or LNA inputs |
| ESD Rating | ±8 kV contact / ±8 kV air (IEC61000-4-2 Level 4) - meets industrial and mobile handset immunity requirements |
| Package Size | 0.62 mm × 0.32 mm - fits tight-pitch RF trace routing near connectors or antennas |
| Dynamic Resistance | <0.75 Ω - ensures fast, low-impedance clamping response during ESD events |
Pinout & Package
Package: X3DFN2 (Case 152AF), 2-terminal surface-mount device, 0.62 mm × 0.32 mm × 0.24 mm, 0.35 mm pitch, Pb-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Anode/Cathode (bi-directional) | Shared terminal for symmetrical ESD clamping path between signal line and ground reference |
| Pin 2 | Anode/Cathode (bi-directional) | Paired terminal enabling bidirectional conduction-no polarity marking required in layout |
Key Features
| Feature | Design Value |
|---|---|
| Capacitance linearity over voltage | Maintains ≤0.30 pF variation from 0–5 V bias-critical for consistent impedance matching in 5G antenna tuning |
| Insertion loss | 0.050 dB @ 1 MHz / 0.250 dB @ 8.5 GHz-preserves signal amplitude in high-band RF paths |
| AEC-Q101 qualification | Validated for automotive infotainment and telematics modules requiring extended temperature and reliability compliance |
| Small footprint | 0.62 mm × 0.32 mm area-enables placement directly at RF connector or antenna feed point without trace detours |
Applications
| RF Antenna Line Protection | USB 2.0 High-Speed Data Lines |
|---|---|
Use Scenario: Protecting LTE/5G main antenna feed traces from ESD discharge during user handling or docking. IC Role / Device Role / Timing Role: Bi-directional transient voltage suppressor placed in series with RF signal path, clamping surges before reaching PA or switch. Use Value: 0.2 pF capacitance and 0.25 dB insertion loss at 8.5 GHz prevent gain roll-off and return loss degradation in sub-6 GHz bands. | Use Scenario: Safeguarding USB 2.0 D+/D− differential pair against ESD in portable accessories and host ports. IC Role / Device Role / Timing Role: Low-capacitance shunt protector mounted adjacent to USB connector, diverting transients to ground. Use Value: 5.3 V stand-off avoids data eye distortion while ±8 kV IEC61000-4-2 rating ensures system-level ESD compliance. |
| NFC Loop Antenna Interface | RF Front-End Switch Protection |
Use Scenario: Shielding 13.56 MHz NFC loop antenna traces from electrostatic discharge in payment terminals and wearables. IC Role / Device Role / Timing Role: Series-connected ESD clamp minimizing parasitic capacitance across resonant LC tank. Use Value: Stable 0.15–0.30 pF capacitance over bias ensures predictable resonance frequency and coupling efficiency. | Use Scenario: Protecting SPDT RF switches (e.g., Qorvo QM11032) from ESD-induced gate oxide damage in cellular front-end modules. IC Role / Device Role / Timing Role: Signal-line protector placed between antenna and switch input, absorbing fast transients before gate structures. Use Value: <0.75 Ω dynamic resistance and 11 V clamping at 1 A limit peak voltage seen by switch control nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD8472MUT5G | 0.2 pF @ 1 MHz, 5.3 V VRWM, X3DFN2 | Optimized for RF antenna lines with best-in-class capacitance linearity | Preferred for 5G/mmWave antenna feed protection where insertion loss and CV stability are critical |
| TPD2E007DRYR | 0.5 pF @ 1 MHz, 5.5 V VRWM, SOT-5X3 | Higher capacitance; suited for general-purpose USB/IO protection, not RF-critical paths | Select when board space allows larger package and RF performance is secondary to cost and availability |
Compared with TPD2E007DRYR, SZESD8472MUT5G offers 60% lower capacitance and superior CV linearity-making it uniquely suitable for high-frequency antenna interfaces where signal fidelity must be preserved, whereas the alternative serves broader IO protection needs with relaxed RF constraints.
Availability
SZESD8472MUT5G is available at Aetrix Electronics and suitable for RF antenna protection, USB 2.0 interface safeguarding, and NFC loop shielding requiring stable component supply and AEC-Q101-compliant ESD robustness.
Supply support for SZESD8472MUT5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient power, analog, sensor, and connectivity solutions for automotive, industrial, cloud, medical, and IoT applications.
The ESD8472 family targets ultra-high-frequency ESD protection-specifically engineered for RF front-end signal integrity in 4G/5G handsets, base stations, and wireless infrastructure where capacitance stability and minimal insertion loss are design-critical.
FAQ
What is the maximum clamping voltage of SZESD8472MUT5G under IEC61000-4-2 ESD stress?
The SZESD8472MUT5G exhibits an ESD clamping voltage of approximately 15–17 V under ±8 kV contact discharge per IEC61000-4-2, as verified in Figures 1 and 2 of the official datasheet. This clamping level is measured dynamically during the ESD event and ensures downstream RF components remain within safe operating voltage margins. The SZESD8472MUT5G maintains this performance consistently across both positive and negative polarity discharges.
Is SZESD8472MUT5G suitable for 5G NR frequency bands above 3.5 GHz?
Yes, SZESD8472MUT5G is validated for use up to 8.5 GHz with only 0.25 dB insertion loss, making it appropriate for n77/n78/n79 5G NR bands. Its 0.15–0.30 pF capacitance stability across bias voltage preserves impedance matching in high-band antenna tuners and front-end modules. The SZESD8472MUT5G's X3DFN2 package minimizes parasitic inductance, further supporting wideband RF performance.
Does SZESD8472MUT5G require external bias or control signals to operate?
No, SZESD8472MUT5G is a passive bi-directional TVS diode requiring no external bias, power, or control signals. It operates solely based on voltage threshold conduction-clamping transients when voltage exceeds its breakdown range (7.0–12 V). This self-contained operation makes the SZESD8472MUT5G ideal for always-on RF protection without added complexity or power overhead.
What is the thermal resistance and power dissipation capability of SZESD8472MUT5G?
SZESD8472MUT5G has a junction-to-ambient thermal resistance (RJA) of 400°C/W and a maximum total power dissipation of 300 mW at 25°C ambient, per FR-4 PCB mounting with minimum recommended pad size. Its low thermal mass enables rapid heat dissipation during short-duration ESD pulses, but sustained overvoltage conditions must be avoided. The SZESD8472MUT5G is not rated for continuous power handling beyond transient suppression.
How does the AEC-Q101 qualification impact the use of SZESD8472MUT5G in automotive designs?
The AEC-Q101 qualification confirms that SZESD8472MUT5G meets stress test requirements for automotive-grade reliability-including temperature cycling, HTRB, and ESD robustness-making it suitable for infotainment, telematics, and ADAS antenna modules. This qualification assures designers that the SZESD8472MUT5G will maintain performance across −40°C to +125°C ambient and survive 1000+ ESD strikes, reducing validation effort in vehicle platforms.
SZESD8472MUT5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- 0201 (0603 Metric)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 5.3V (Max)
- Voltage - Breakdown (Min):
- 7V
- Voltage - Clamping (Max) @ Ipp:
- 17.8V
- Current - Peak Pulse (10/1000µs):
- 2.4A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- RF Antenna
- Capacitance @ Frequency:
- 0.2pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 2-X3DFN (0.6x0.3) (0201)
SZESD8472MUT5G FAQ
1.How can I place an order for SZESD8472MUT5G through Aetrix?
Please submit a Request for Quotation (RFQ) for SZESD8472MUT5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SZESD8472MUT5G reliable?
The price and inventory of SZESD8472MUT5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SZESD8472MUT5G is usually 5 days.
3.What payment methods are accepted for SZESD8472MUT5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SZESD8472MUT5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SZESD8472MUT5G?
SZESD8472MUT5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SZESD8472MUT5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SZESD8472MUT5G?
For technical support, including SZESD8472MUT5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SZESD8472MUT5G requirements.
6.How does Aetrix verify that SZESD8472MUT5G is sourced from the original manufacturer or authorized distributors?
All SZESD8472MUT5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SZESD8472MUT5G meets industry standards.
7.What is the process for return or replacement of SZESD8472MUT5G?
All SZESD8472MUT5G units undergo pre-shipment inspection (PSI). If there is an issue with SZESD8472MUT5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SZESD8472MUT5G part is unused and in its original packaging.
Return procedure for SZESD8472MUT5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SZESD8472MUT5G Tags

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ESD9B5.0ST5G
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DESD3V3E1BL-7B
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D5V0H1B2LP-7B
Diodes Incorporated

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Diodes Incorporated

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DESD5V0U1BA-7
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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
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