My Inquiry
My Account
onsemi SZESD9L3.3ST5G
- Part No.:
- SZESD9L3.3ST5G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOD-923
- Datasheet:
-
SZESD9L3.3ST5G.pdf
- Description:
- TVS DIODE 3.3VWM 9VC SOD923
- Quantity:
- Payment:
- Shipping:
Inventory:6,962
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SZESD9L3.3ST5G from onsemi is a unidirectional ESD protection diode designed for ultra-low-capacitance signal line protection in high-speed interfaces. It features 0.5 pF capacitance, 3.3 V working peak reverse voltage (VRWM), 9.0 V clamping voltage at 1 A peak pulse current (IPP), and IEC 61000-4-2 Level 4 (±15 kV air/±10 kV contact) compliance - making it suitable for USB 2.0 high-speed data lines and antenna feed circuits.
For engineers reviewing the SZESD9L3.3ST5G datasheet, pinout, applications, or equivalent options, key selection criteria include clamping voltage under 1 A transient, sub-1 ns response time, SOD-923 footprint compatibility, and AEC-Q101 qualification for automotive-grade reliability.
Technical Context
This device operates as a unidirectional TVS diode with cathode-anode polarity, leveraging silicon PN junction clamping to divert ESD transients before they reach sensitive IC inputs. Its low 0.5 pF junction capacitance minimizes signal integrity impact on 480 Mbps USB 2.0 differential pairs and RF antenna paths.
The 3.3 V VRWM ensures compatibility with 3.3 V I/O rails while maintaining sufficient margin above logic-high thresholds. Clamping occurs at ≤9.0 V (VC) during 1 A IEC 61000-4-2 pulses, limiting stress on downstream transceivers without compromising speed or insertion loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance | 0.5 pF @ 0 V, 1 MHz - preserves signal integrity on USB 2.0 and RF lines |
| VRWM | 3.3 V - matches standard 3.3 V digital I/O supply rails |
| Clamping Voltage VC | 9.0 V @ IPP = 1 A - limits transient overvoltage to safe levels for 3.3 V interface ICs |
| ESD Rating | IEC 61000-4-2 Level 4: ±15 kV air / ±10 kV contact - meets industrial and automotive system-level ESD requirements |
| Response Time | <1.0 ns - activates before transient energy couples into protected circuitry |
| Leakage Current IR | 1.0 µA @ VRWM - negligible power drain on battery-powered sensor nodes |
| Package | SOD-923 (1.0 mm × 0.6 mm × 0.37 mm) - enables placement adjacent to connector pins in space-constrained layouts |
Pinout & Package
SZESD9L3.3ST5G is housed in a Pb-free, RoHS-compliant SOD-923 surface-mount package with 0.4 mm body height and MSL 1 rating. The case uses void-free thermosetting plastic meeting UL 94 V-0, and terminals are 100% matte tin plated.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Cathode) | Protected Line Input / Anode of Clamping Diode | Connected to I/O line requiring ESD protection; reverse-biased during normal operation |
| 2 (Anode) | Ground Reference / Cathode of Clamping Diode | Connected directly to low-inductance system ground plane to ensure fast transient discharge path |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.5 pF enables use on 480 Mbps USB 2.0 differential pairs without measurable eye diagram degradation |
| AEC-Q101 qualified | Validated for automotive applications including infotainment and telematics modules operating across −40 °C to +125 °C junction temperature |
| Low clamping voltage | 9.0 V VC at 1 A ensures protected ICs remain within absolute maximum ratings during ESD events |
| Fast response time | <1 ns activation prevents transient energy from propagating beyond the protection device |
| SOD-923 footprint | 0.6 mm width allows placement within 0.5 mm of USB Type-A/B or micro-B connector pads |
Applications
| USB 2.0 High-Speed Data Lines | Cellular Antenna Feed Lines |
|---|---|
Use Scenario: Protecting D+ and D− lines of USB 2.0 host/device ports against contact ESD events in portable electronics. IC Role / Device Role / Timing Role: Unidirectional clamping diode placed between connector and USB transceiver IC input pins. Use Value: 0.5 pF capacitance avoids signal rise-time degradation; 9.0 V clamping prevents transceiver latch-up or gate oxide damage. | Use Scenario: Shielding LTE/5G antenna feed traces from ESD coupling via metal enclosures or user handling. IC Role / Device Role / Timing Role: Low-capacitance shunt protector mounted at antenna connector interface. Use Value: Sub-1 ns response isolates RF front-end LNA from transient-induced DC bias shift or permanent breakdown. |
| Automotive Infotainment Displays | Industrial Sensor Interface Modules |
Use Scenario: Safeguarding HDMI or LVDS video signal lines connecting head unit to display in vehicles. IC Role / Device Role / Timing Role: ESD suppressor on high-speed video differential pairs routed through dashboard harnesses. Use Value: AEC-Q101 qualification ensures reliability under thermal cycling and vibration; 3.3 V VRWM aligns with display driver I/O voltage. | Use Scenario: Protecting analog sensor outputs (e.g., pressure, temperature) connected to ADC inputs in factory automation systems. IC Role / Device Role / Timing Role: Low-leakage (1.0 µA) shunt diode on single-ended analog signal paths. Use Value: Minimal leakage avoids measurement offset errors; 0.5 pF capacitance prevents anti-aliasing filter resonance shifts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD9L3.3ST5G | Unidirectional, 3.3 V VRWM, 0.5 pF, SOD-923 | Standard industrial grade, non-automotive marking prefix | Select when AEC-Q101 qualification is not required and cost optimization is prioritized |
| SESD9L3.3ST5G | Identical electrical specs; S-prefix denotes automotive PPAP-capable production flow | Qualified for automotive production with full PPAP documentation support | Select for Tier 1 automotive programs requiring traceable process controls and change management |
Compared with ESD9L3.3ST5G and SESD9L3.3ST5G, SZESD9L3.3ST5G provides identical electrical performance and packaging but includes site-specific control change requirements and enhanced manufacturing traceability aligned with automotive quality systems - making it appropriate for safety-critical subsystems where process deviation history must be auditable.
Availability
SZESD9L3.3ST5G is available at Aetrix Electronics and suitable for USB 2.0 interface protection, cellular antenna line safeguarding, and automotive infotainment display signal routing requiring stable component supply and long-term lifecycle assurance.
Supply support for SZESD9L3.3ST5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, high-performance silicon solutions for automotive, industrial, cloud, medical, and IoT applications.
The ESD9L Series - including SZESD9L3.3ST5G - was engineered specifically for ultra-low-capacitance board-level ESD protection in high-speed digital and RF signal paths where traditional TVS devices introduce unacceptable signal distortion.
FAQ
What is the clamping voltage of SZESD9L3.3ST5G under IEC 61000-4-2 ESD stress?
The SZESD9L3.3ST5G exhibits a maximum clamping voltage (VC) of 9.0 V when subjected to a 1 A peak pulse current per the IEC 61000-4-2 waveform. This value is measured across the device terminals during standardized ESD testing and ensures downstream 3.3 V ICs remain within their absolute maximum voltage ratings during transient events.
Is SZESD9L3.3ST5G suitable for USB 2.0 high-speed data lines?
Yes, SZESD9L3.3ST5G is explicitly validated for USB 2.0 high-speed (480 Mbps) data line protection. Its 0.5 pF capacitance introduces negligible impedance discontinuity, and its <1 ns response time ensures transients are clamped before propagating into the transceiver. onsemi's datasheet confirms suitability for this application.
What does the "SZ" prefix indicate in SZESD9L3.3ST5G?
The "SZ" prefix in SZESD9L3.3ST5G denotes compliance with unique site and control change requirements for automotive and other high-reliability applications. It signifies AEC-Q101 qualification, PPAP capability, and adherence to enhanced manufacturing traceability protocols beyond standard industrial-grade variants.
What is the package type and dimensions of SZESD9L3.3ST5G?
SZESD9L3.3ST5G uses the SOD-923 package (case 514AB), measuring 1.00 mm × 0.60 mm × 0.37 mm with a 0.4 mm body height. It features a cathode band marking on pin 1 and is rated MSL 1 for unlimited floor life under JEDEC J-STD-020 conditions.
Does SZESD9L3.3ST5G meet automotive reliability standards?
Yes, SZESD9L3.3ST5G is AEC-Q101 qualified and PPAP capable. It undergoes rigorous stress testing including temperature cycling, high-temperature operating life, and ESD robustness validation - confirming suitability for automotive infotainment, telematics, and ADAS subsystems operating from −40 °C to +125 °C junction temperature.
SZESD9L3.3ST5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOD-923
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.3V (Max)
- Voltage - Breakdown (Min):
- 4.8V
- Voltage - Clamping (Max) @ Ipp:
- 9V
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 0.5pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOD-923
SZESD9L3.3ST5G FAQ
1.How can I place an order for SZESD9L3.3ST5G through Aetrix?
Please submit a Request for Quotation (RFQ) for SZESD9L3.3ST5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SZESD9L3.3ST5G reliable?
The price and inventory of SZESD9L3.3ST5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SZESD9L3.3ST5G is usually 5 days.
3.What payment methods are accepted for SZESD9L3.3ST5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SZESD9L3.3ST5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SZESD9L3.3ST5G?
SZESD9L3.3ST5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SZESD9L3.3ST5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SZESD9L3.3ST5G?
For technical support, including SZESD9L3.3ST5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SZESD9L3.3ST5G requirements.
6.How does Aetrix verify that SZESD9L3.3ST5G is sourced from the original manufacturer or authorized distributors?
All SZESD9L3.3ST5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SZESD9L3.3ST5G meets industry standards.
7.What is the process for return or replacement of SZESD9L3.3ST5G?
All SZESD9L3.3ST5G units undergo pre-shipment inspection (PSI). If there is an issue with SZESD9L3.3ST5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SZESD9L3.3ST5G part is unused and in its original packaging.
Return procedure for SZESD9L3.3ST5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SZESD9L3.3ST5G Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
