onsemi SZSM12T1G
- Part No.:
- SZSM12T1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
SZSM12T1G.pdf
- Description:
- TVS DIODE 12VWM 19VC SOT23-3
- Quantity:
- Payment:

- Shipping:

Inventory:5,682
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Product details
Overview
SZSM12T1G from onsemi is a dual common-anode ESD protection diode array in SOT-23 package, rated for 12 V working peak reverse voltage, 13.3–15.75 V zener breakdown, and 300 W peak pulse power (8/20 µs), designed to protect two I/O lines in space-constrained interfaces such as USB, keyboard, or microprocessor control buses.
For engineers reviewing the SZSM12T1G datasheet, pinout, applications, or equivalent options, key selection criteria include clamping voltage at 1 A (19 V), low leakage (<1.0 µA @ 12 V), typical capacitance (95 pF @ 0 V), UL 94 V-0 flammability rating, and compatibility with automated SMT assembly on FR-5 or alumina substrates.
Technical Context
SZSM12T1G integrates two monolithic silicon zener junctions sharing a common anode (Pin 3), enabling dual-line unidirectional transient suppression in a single SOT-23 footprint. Its design supports either two independent unidirectional configurations (Pins 1–3 and 2–3) or a single bidirectional configuration via external routing.
The device meets IEC 61000-4-2 (±15 kV air, ±8 kV contact), IEC 61000-4-4 (40 A EFT), and IEC 61000-4-5 (12 A lightning surge) immunity standards. Thermal performance is specified for both FR-5 board (RθJA = 556 °C/W, PD = 225 mW) and alumina substrate (RθJA = 417 °C/W, PD = 300 mW).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Working Peak Reverse Voltage | 12 V - Maximum continuous reverse bias before significant leakage; sets operating voltage ceiling for protected lines. |
| Zener Breakdown Voltage | 13.3–15.75 V @ 1 mA - Ensures reliable turn-on during transients while avoiding false triggering under normal operation. |
| Clamping Voltage | 19 V @ 1 A (8/20 µs) - Limits voltage seen by downstream ICs during ESD/EFT events to safe levels. |
| Peak Pulse Power | 300 W (8/20 µs) - Withstands high-energy surges without failure, validated per Figure 3 waveform. |
| Reverse Leakage Current | <1.0 µA @ 12 V - Minimizes standby power loss and signal integrity impact on high-impedance nodes. |
| Capacitance | 95 pF @ 0 V - Low enough for USB 2.0 and parallel bus applications; measured between cathode pins with common anode grounded. |
| Flammability Rating | UL 94 V-0 - Confirms self-extinguishing plastic housing meets safety requirements for end equipment. |
Pinout & Package
SOT-23 package (Case 318, Style 12), void-free thermosetting plastic, UL 94 V-0 rated, optimized for automated placement and reflow soldering (260°C/10 s max).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Cathode (Line 1) | Connects to first protected signal line; reverse-biased during normal operation, conducts during overvoltage. |
| Pin 2 | Cathode (Line 2) | Connects to second protected signal line; electrically isolated from Pin 1, shares common anode at Pin 3. |
| Pin 3 | Common Anode | Reference node tied to system ground or supply rail; defines shared return path for both protection paths. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-line protection in one SOT-23 | Reduces PCB area vs. discrete diodes; enables compact I/O interface layouts where space is constrained. |
| Common-anode architecture | Allows independent protection of two signals referenced to same ground/supply, simplifying routing and grounding. |
| IEC 61000-4-2 compliant | Withstands ±15 kV air and ±8 kV contact ESD without degradation-meets industrial and computing ESD immunity requirements. |
| Low clamping voltage (19 V @ 1 A) | Protects 3.3 V and 5 V logic interfaces by limiting transient overshoot below IC absolute maximum ratings. |
| 95 pF capacitance @ 0 V | Preserves signal integrity for data rates up to ~20 Mbps (e.g., UART, SPI, parallel bus); avoids excessive rise-time degradation. |
Applications
| USB 2.0 Interface Protection | Keyboard/Mouse I/O Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of a USB 2.0 host or peripheral port against ESD events during hot-plug insertion. IC Role / Device Role / Timing Role: Unidirectional transient voltage suppressor placed between connector and USB transceiver IC. Use Value: Clamps transients to ≤19 V while adding only 95 pF per line-maintains USB 2.0 signal integrity and full-speed timing compliance. | Use Scenario: Safeguarding matrix scan lines and interrupt lines in PC keyboard or industrial keypad assemblies exposed to user-handling ESD. IC Role / Device Role / Timing Role: Dual-line ESD clamp on row/column I/O lines connected to microcontroller GPIOs. Use Value: Prevents latch-up or damage to MCU I/O pins during ±8 kV contact discharge, with minimal impact on scan cycle timing due to low capacitance. |
| Microprocessor Control Bus Protection | Printer Parallel Port Protection |
Use Scenario: Shielding address/data/control bus lines (e.g., RD#, WR#, ALE) connecting CPU to peripherals in embedded controllers or medical devices. IC Role / Device Role / Timing Role: Common-anode TVS array suppressing coupled transients across multiple bus lines referenced to common ground. Use Value: Simultaneous clamping of up to two critical bus signals with matched response, preserving setup/hold timing margins under surge stress. | Use Scenario: Hardening Centronics-style parallel port pins (STROBE, ACK, BUSY) in office printers or industrial label printers against cable-discharge events. IC Role / Device Role / Timing Role: Line-level ESD protector mounted at connector edge, shunting transients before reaching printer controller ASIC. Use Value: Enables robust operation in high-turnover office environments with repeated cable connect/disconnect cycles, validated to IEC 61000-4-2 Level 4. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection diode array applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5Z3.3T5G | Lower VRWM (3.3 V), lower clamping (8.5 V @ 1 A), higher capacitance (120 pF), same SOT-23 package. | Targeted for 3.3 V logic rails; unsuitable for 12 V signal lines due to premature conduction. | Select when protecting low-voltage digital interfaces where tighter clamping and lower working voltage are required. |
| CM1213A-04SO | Quad-channel (4-line), 12 V VRWM, 25 V clamping @ 1 A, 20 pF capacitance, SO-8 package. | Higher channel count and lower capacitance, but larger footprint and different pinout; requires PCB redesign. | Choose for multi-line protection where board space permits larger package and lower capacitance is critical (e.g., high-speed data lines). |
Compared with ESD5Z3.3T5G and CM1213A-04SO, SZSM12T1G uniquely balances 12 V working voltage, dual-line integration in SOT-23, and 95 pF capacitance-making it optimal for cost-sensitive, space-constrained 5 V/12 V interface protection without sacrificing ESD robustness or signal fidelity.
Availability
SZSM12T1G is available at Aetrix Electronics and suitable for USB interface protection, keyboard/mouse I/O hardening, and microprocessor control bus safeguarding requiring stable component supply and consistent parametric performance across production lots.
Supply support for SZSM12T1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, high-performance silicon solutions for automotive, industrial, cloud, medical, and consumer electronics.
SZSM12T1G belongs to onsemi's ESD protection diode array product line, engineered specifically for board-level transient immunity in high-density digital interfaces where footprint, reliability, and IEC-compliant surge handling are critical.
FAQ
What is the maximum working voltage supported by the SZSM12T1G?
The SZSM12T1G has a working peak reverse voltage (VRWM) of 12 V, meaning it can reliably block reverse voltages up to this level during normal operation without significant leakage current. This makes SZSM12T1G appropriate for protecting 12 V signal lines or 5 V systems with margin, but not for continuous 15 V operation where breakdown may occur.
How does the common-anode configuration of the SZSM12T1G affect circuit layout?
The common-anode configuration of SZSM12T1G requires Pin 3 to be connected to a shared reference-typically ground or a stable supply rail-while Pins 1 and 2 connect to separate signal lines. This simplifies grounding strategy and reduces net count, but mandates that both protected lines share the same reference potential, which must be considered during schematic and PCB routing.
What is the clamping voltage of SZSM12T1G under standard ESD test conditions?
SZSM12T1G clamps to a maximum of 19 V when subjected to a 1 A, 8/20 µs transient pulse-per IEC 61000-4-5 testing methodology. This value is measured between each cathode (Pins 1 or 2) and the common anode (Pin 3), ensuring downstream 3.3 V or 5 V ICs remain within safe operating limits during surge events.
Can SZSM12T1G be used for bidirectional transient protection?
Yes-SZSM12T1G can be configured for bidirectional protection by connecting external components (e.g., series resistors or coupling capacitors) to route transients through both junctions symmetrically. However, its native structure is unidirectional; true bidirectional behavior requires careful external circuit design and is not inherent to the device's pinout or internal topology.
Is the SZSM12T1G RoHS compliant and halogen-free?
Yes, SZSM12T1G is RoHS compliant and halogen-free per onsemi's official product documentation and packaging markings. The "G" suffix in the part number denotes lead-free (Pb-free) and RoHS-compliant construction, and the device meets JEDEC JS709B and IEC 61249-2-21 requirements for halogen content.
SZSM12T1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 12V
- Voltage - Breakdown (Min):
- 13.3V
- Voltage - Clamping (Max) @ Ipp:
- 19V
- Current - Peak Pulse (10/1000µs):
- 12A (8/20µs)
- Power - Peak Pulse:
- 300W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3 (TO-236)
SZSM12T1G FAQ
1.How can I place an order for SZSM12T1G through Aetrix?
Please submit a Request for Quotation (RFQ) for SZSM12T1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SZSM12T1G reliable?
The price and inventory of SZSM12T1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SZSM12T1G is usually 5 days.
3.What payment methods are accepted for SZSM12T1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SZSM12T1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SZSM12T1G?
SZSM12T1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SZSM12T1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SZSM12T1G?
For technical support, including SZSM12T1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SZSM12T1G requirements.
6.How does Aetrix verify that SZSM12T1G is sourced from the original manufacturer or authorized distributors?
All SZSM12T1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SZSM12T1G meets industry standards.
7.What is the process for return or replacement of SZSM12T1G?
All SZSM12T1G units undergo pre-shipment inspection (PSI). If there is an issue with SZSM12T1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SZSM12T1G part is unused and in its original packaging.
Return procedure for SZSM12T1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SZSM12T1G Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

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D5V0P1B2LP-7B
Diodes Incorporated

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DESD5V0U1BA-7
Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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