onsemi SZUESD6.0DT5G
- Part No.:
- SZUESD6.0DT5G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SOT-723
- Datasheet:
-
SZUESD6.0DT5G.pdf
- Description:
- ESD PROTECTION COMMON ANODE DIOD
- Quantity:
- Payment:

- Shipping:

Inventory:2,115
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Product details
Overview
SZUESD6.0DT5G from onsemi is a unidirectional ESD protection diode in SOT-723 package, designed for high-density I/O line protection with 6.0 V working peak reverse voltage, <34 pF capacitance at 0 V, 7.0 V minimum breakdown voltage at 1 mA, <0.1 µA leakage at VRWM, and IEC 61000-4-2 Level 4 (±30 kV air/±30 kV contact) compliance - used in smartphone USB interfaces and HDMI signal lines.
For engineers reviewing the SZUESD6.0DT5G datasheet, pinout, applications, or equivalent options, key selection criteria include clamping voltage under 12 V at 1 A IPP, ultra-low capacitance for high-speed data integrity, dual-cathode configuration for bidirectional layout flexibility, and AEC-Q101 qualification for automotive infotainment ports.
Technical Context
This device implements a single-channel unidirectional TVS structure optimized for transient suppression on low-voltage digital signal paths. Its dual-cathode pinout (Pins 1 & 2) enables common-anode configuration for differential pair protection without additional routing layers.
Clamping behavior is defined by silicon junction design with sub-1 ns response time and guaranteed ≤12.0 V VC at 1 A IPP per IEC 61000-4-2 waveform. Thermal performance supports 240 mW steady-state dissipation on FR-5 board with RJA = 525 °C/W.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 6.0 V - Maximum continuous operating voltage before conduction begins; sets upper limit for protected IC I/O rail voltage. |
| VBR (min) | 7.0 V @ 1 mA - Ensures reliable turn-on above system operating voltage while avoiding false triggering. |
| VC @ IPP=1 A | ≤12.0 V - Clamped voltage during 8/20 µs surge; keeps downstream IC pins below absolute maximum ratings. |
| C (max) | 34 pF @ 0 V, 1 MHz - Low enough to avoid signal integrity degradation on USB 2.0 (480 Mbps) and HDMI 1.4 TMDS lines. |
| Leakage (IR) | ≤0.1 µA @ 6.0 V - Prevents measurable DC loading on battery-powered sensor I/O or analog front-end bias networks. |
| ESD Rating | ±30 kV HBM (air/contact) - Exceeds IEC 61000-4-2 Level 4 requirement for handheld consumer electronics. |
| Package | SOT-723 (1.20 × 0.80 × 0.50 mm) - Enables placement within 0.4 mm pitch of high-speed connectors without compromising board real estate. |
Pinout & Package
SOT-723 package: ultra-small outline (1.20 mm × 0.80 mm × 0.50 mm), 3-terminal surface-mount, void-free epoxy mold compound rated UL 94 V-0, matte tin lead finish, MSL 1, 260 °C max reflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode | Common cathode connection for dual-cathode configuration; ties to protected line ground reference or shared return path. |
| 2 | Cathode | Second cathode terminal enabling parallel connection to same anode (Pin 3) for balanced current sharing in split-rail layouts. |
| 3 | Anode | Signal input node; connects to I/O line requiring protection; reverse-biased during normal operation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-cathode configuration | Enables single-device protection of both sides of differential pairs (e.g., USB D+/D−) using shared anode routing. |
| 34 pF max capacitance | Maintains signal rise/fall times <1 ns on 50 Ω traces, preserving eye diagram integrity for 480 Mbps USB 2.0 links. |
| AEC-Q101 qualified | Validated for automotive infotainment display interfaces subject to temperature cycling (−40 °C to +125 °C) and mechanical shock. |
| IEC 61000-4-4 Level 4 EFT | Withstands 40 A fast transient bursts (5/50 ns) on power rails without parametric shift or catastrophic failure. |
| Pb-free & RoHS compliant | Meets EU Directive 2011/65/EU and JEDEC J-STD-020 reflow profile requirements for lead-free assembly. |
Applications
| USB 2.0 Interface Protection | HDMI 1.4 TMDS Line Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of smartphone USB OTG ports against electrostatic discharge during cable insertion. IC Role / Device Role / Timing Role: Unidirectional clamping diode placed between connector and USB transceiver PHY, grounded via shared cathodes. Use Value: 34 pF capacitance avoids signal jitter exceeding 0.1 UI at 480 Mbps; 12 V clamping prevents PHY latch-up during ±15 kV contact ESD events. | Use Scenario: Shielding TMDS clock and data channels in portable media players from ESD during HDMI cable hot-plug. IC Role / Device Role / Timing Role: Per-channel ESD suppressor mounted adjacent to HDMI receptacle, with cathodes tied to chassis ground plane. Use Value: Sub-1 ns response ensures clamping activation before 100 ps edge overshoot exceeds receiver input limits; 6.0 V VRWM matches TMDS common-mode range. |
| Automotive Infotainment Display Port | Industrial Sensor Interface Protection |
Use Scenario: Safeguarding LVDS or FPD-Link II video data lanes connecting head unit to TFT display in vehicles. IC Role / Device Role / Timing Role: Single SZUESD6.0DT5G per differential pair, leveraging dual cathodes to minimize PCB trace length to ground. Use Value: AEC-Q101 qualification guarantees stable leakage (<0.5 µA at 85 °C) over 15-year vehicle lifetime; 7.0 V VBR avoids false triggering during 12 V supply transients. | Use Scenario: Protecting RS-485 transceiver I/O pins in factory automation PLC modules exposed to maintenance personnel ESD. IC Role / Device Role / Timing Role: Bidirectional-capable unidirectional diode configured with external pull-up to enable fail-safe open-circuit detection. Use Value: 30 kV HBM rating exceeds IEC 61000-4-2 Level 4 requirement for industrial environments; 240 mW PD supports sustained EFT burst energy without thermal runaway. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD6V0R1B-02LR | Bi-directional configuration; 6.0 V VRWM; 12 pF capacitance; SOD-523 package (1.3 × 0.85 × 0.6 mm). | Better suited for AC-coupled lines (e.g., audio jack) where polarity reversal occurs; lower capacitance improves >1 Gbps signal fidelity. | Select when protecting symmetric differential signals without DC bias or when board space allows slightly larger footprint. |
| TPD2E001DRYR | Two-channel unidirectional array; 5.5 V VRWM; 12 pF per channel; SOT-553 package (1.6 × 1.6 × 0.6 mm); integrated 100 Ω series resistors. | Optimized for USB 2.0 D+/D− with built-in current limiting; larger footprint but eliminates discrete resistor placement. | Choose for new USB interface designs requiring integrated termination and reduced BOM count, accepting higher VRWM margin. |
Compared with ESD6V0R1B-02LR and TPD2E001DRYR, SZUESD6.0DT5G offers the smallest footprint (1.20 × 0.80 mm) and dual-cathode flexibility for custom grounding schemes, though it lacks bi-directionality and integrated resistors - making it ideal for space-constrained, DC-biased, single-line protection where layout control is prioritized.
Availability
SZUESD6.0DT5G is available at Aetrix Electronics and suitable for smartphone USB interfaces, automotive display ports, industrial RS-485 nodes, and portable HDMI endpoints requiring stable component supply across long production cycles.
Supply support for SZUESD6.0DT5G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
SZUESD6.0DT5G belongs to the ESD3.3DT5G Series - a family of ultra-small unidirectional ESD suppressors engineered specifically for high-density portable electronics where board area and signal integrity are critical constraints.
FAQ
What is the clamping voltage of SZUESD6.0DT5G at 1 A peak pulse current?
The clamping voltage (VC) of SZUESD6.0DT5G is guaranteed ≤12.0 V at 1 A peak pulse current (8/20 µs waveform), measured per IEC 61000-4-2 test conditions. This value ensures protected ICs remain within safe operating limits during ESD events. The actual clamping performance of SZUESD6.0DT5G is validated across temperature ranges from −55 °C to +125 °C and remains stable under repeated stress testing.
Does SZUESD6.0DT5G support bidirectional ESD protection?
No, SZUESD6.0DT5G is a unidirectional ESD protection diode, designed for DC-biased signal lines where the anode connects to the protected line and cathodes to ground. It does not provide symmetrical clamping for negative transients beyond its reverse standoff rating. For true bidirectional protection, designers must use two SZUESD6.0DT5G devices in series opposition or select a dedicated bi-directional part like ESD6V0R1B-02LR. The SZUESD6.0DT5G datasheet explicitly defines its operation as unidirectional.
What is the maximum operating temperature for SZUESD6.0DT5G in continuous use?
SZUESD6.0DT5G supports continuous operation from −55 °C to +150 °C for junction and storage temperature, with derated power dissipation above 25 °C ambient. At 85 °C ambient, its usable power drops to ~140 mW based on the 240 mW @ 25 °C rating and 1.9 mW/°C derating slope. This thermal capability makes SZUESD6.0DT5G suitable for under-hood automotive modules and sealed industrial enclosures where ambient temperatures exceed 70 °C.
How is the dual-cathode configuration of SZUESD6.0DT5G typically implemented in PCB layout?
The dual-cathode configuration (Pins 1 and 2) of SZUESD6.0DT5G is commonly routed to a common ground plane or split-ground net to reduce inductance in the ESD current path. In differential pair protection, both cathodes connect to the same low-impedance ground pour while Pin 3 (anode) routes to each signal line separately. This layout minimizes loop area and preserves signal integrity - a technique verified in onsemi's application note AND8456/D for high-speed interface protection using SZUESD6.0DT5G.
Is SZUESD6.0DT5G compatible with lead-free reflow processes?
Yes, SZUESD6.0DT5G is fully compatible with standard lead-free reflow profiles, including peak temperatures up to 260 °C for 10 seconds, and meets JEDEC J-STD-020 moisture sensitivity level (MSL) 1 requirements. Its matte tin lead finish and thermosetting plastic body ensure robust solder joint formation without delamination or voiding. The SZUESD6.0DT5G packaging specification confirms full compliance with IPC/JEDEC standards for Pb-free assembly, making it suitable for modern high-volume manufacturing lines.
SZUESD6.0DT5G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SOT-723
- Series:
- µESD3.3DT5G
- Packaging:
- Bulk
- Product Status:
- Discontinued at Digi-Key
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 6V (Max)
- Voltage - Breakdown (Min):
- 7V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- Automotive
- Capacitance @ Frequency:
- 34pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-723
SZUESD6.0DT5G FAQ
1.How can I place an order for SZUESD6.0DT5G through Aetrix?
Please submit a Request for Quotation (RFQ) for SZUESD6.0DT5G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SZUESD6.0DT5G reliable?
The price and inventory of SZUESD6.0DT5G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SZUESD6.0DT5G is usually 5 days.
3.What payment methods are accepted for SZUESD6.0DT5G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SZUESD6.0DT5G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SZUESD6.0DT5G?
SZUESD6.0DT5G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SZUESD6.0DT5G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SZUESD6.0DT5G?
For technical support, including SZUESD6.0DT5G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SZUESD6.0DT5G requirements.
6.How does Aetrix verify that SZUESD6.0DT5G is sourced from the original manufacturer or authorized distributors?
All SZUESD6.0DT5G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SZUESD6.0DT5G meets industry standards.
7.What is the process for return or replacement of SZUESD6.0DT5G?
All SZUESD6.0DT5G units undergo pre-shipment inspection (PSI). If there is an issue with SZUESD6.0DT5G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SZUESD6.0DT5G part is unused and in its original packaging.
Return procedure for SZUESD6.0DT5G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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