Texas Instruments TPD1E01B04DPLT
- Part No.:
- TPD1E01B04DPLT
- Manufacturer:
- Texas Instruments
- Category:
- TVS Diodes
- Package:
- 0201 (0603 Metric)
- Datasheet:
-
TPD1E01B04DPLT.pdf
- Description:
- TVS DIODE 3.6VWM 15VC 2X2SON
- Quantity:
- Payment:

- Shipping:

Inventory:12,664
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Product details
Overview
TPD1E01B04DPLT from Texas Instruments is a single-channel bidirectional TVS ESD protection diode in X2SON (DPL) package, rated for ±15-kV contact / ±17-kV air-gap IEC 61000-4-2 ESD, 0.18–0.20 pF typical IO capacitance, 6.4 V DC breakdown voltage, and 15 V clamping at 16 A TLP - designed specifically for USB Type-C and Thunderbolt 3 high-speed differential pairs.
For engineers reviewing the TPD1E01B04DPLT datasheet, TPD1E01B04DPLT pinout, TPD1E01B04DPLT application, or TPD1E01B04DPLT equivalent, this page delivers verified electrical specs, package mapping to X2SON-2, real-world insertion loss up to 26.9 GHz, and validated alternatives for USB 3.1 Gen 2 and Thunderbolt 3 interface protection.
Technical Context
The TPD1E01B04DPLT implements a passive bidirectional clamping structure with ultra-low dynamic resistance (0.57 Ω) and low leakage (≤10 nA), enabling robust transient suppression without signal distortion on 20-Gbps links. Its IEC 61000-4-4 EFT rating (80 A, 5/50 ns) and IEC 61000-4-5 surge capability (2.5 A, 8/20 µs) ensure system-level immunity across industrial temperature range (–40°C to +125°C).
Designed for flow-through routing in compact layouts, the device uses symmetric 2-pin X2SON (0.60 mm × 0.30 mm) packaging with ground-referenced I/O terminals - no internal bias or power supply required. It operates strictly within ±3.6 V signal swing limits and maintains sub-0.23 pF max capacitance across –40°C to 125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating (IEC 61000-4-2) | ±15-kV contact / ±17-kV air-gap discharge - meets Level 4 immunity for USB-C connector interfaces |
| IO Capacitance | 0.18–0.20 pF typical (0.20–0.23 pF max) - preserves signal integrity up to 20 Gbps (Thunderbolt 3) |
| DC Breakdown Voltage | 6.4 V typical - ensures protection above ±3.6 V signal swing while avoiding false triggering |
| Clamping Voltage | 15 V at 16 A TLP - limits transient overvoltage seen by downstream PHY ICs |
| Leakage Current | ≤10 nA at ±2.5 V - prevents DC loading on high-impedance receiver inputs |
| Bandwidth (–3 dB) | 26.9 GHz - supports full USB 3.1 Gen 2 and Thunderbolt 3 eye diagram compliance |
| Operating Temperature | –40°C to +125°C - qualified for industrial and mobile end-equipment thermal environments |
Pinout & Package
X2SON (DPL) package: 2-pin, 0.60 mm × 0.30 mm body, 0.45 mm max height, exposed thermal pad not present, JEDEC-compliant moisture sensitivity level 1 (260°C peak reflow).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O | ESD-protected signal line terminal; bidirectional path to ground when clamped |
| 2 | I/O | ESD-protected signal line terminal; connected to PCB ground plane for clamp return path |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.18 pF typical enables <26.9 GHz bandwidth - critical for 20-Gbps Thunderbolt 3 eye opening |
| Bidirectional clamping | ±6.4 V breakdown with symmetrical 15 V clamping at 16 A - protects AC-coupled differential pairs without polarity constraints |
| Low dynamic resistance | 0.57 Ω - minimizes voltage overshoot during fast transients and reduces energy dissipation in silicon |
| Flow-through routing | 2-pin inline layout - allows placement directly in series with signal trace, requiring zero layout redesign |
| Industrial temp range | –40°C to +125°C operation - supports laptop, docking station, and set-top box thermal profiles |
Applications
| USB Type-C Superspeed Lanes | Thunderbolt 3 Differential Pairs |
|---|---|
Use Scenario: Protecting SSTX1P/SSTX1N and SSRX1P/SSRX1N lanes in USB-C receptacles against human-body ESD events during cable insertion. IC Role / Device Role / Timing Role: Passive bidirectional TVS diode placed immediately adjacent to connector, clamping transients before they reach host controller PHY. Use Value: 0.18 pF capacitance ensures ≤0.5 dB insertion loss at 10 GHz - preserves USB 3.1 Gen 2 eye margin per USB-IF compliance testing. | Use Scenario: Shielding Thunderbolt 3 20-Gbps differential channels (e.g., TX0+/TX0–) from ±15-kV contact ESD in portable workstations and docks. IC Role / Device Role / Timing Role: Signal-line ESD suppressor with 26.9 GHz –3 dB bandwidth, installed inline between connector and SerDes buffer. Use Value: 15 V clamping at 16 A TLP limits voltage excursion to safe levels for 1.2-V or 1.8-V PHY I/O structures without degrading jitter performance. |
| USB 3.1 Gen 2 Host Ports | Mobile Docking Stations |
Use Scenario: Securing upstream-facing USB-C ports on desktop motherboards against repeated ESD exposure during peripheral hot-plug cycles. IC Role / Device Role / Timing Role: Single-channel ESD protector per differential pair, mounted in DPL footprint to minimize trace stub length. Use Value: 80 A IEC 61000-4-4 EFT rating withstands burst noise from nearby switching regulators - preventing false resets or data corruption. | Use Scenario: Integrating ESD protection into compact dual-role USB-C docking stations supporting simultaneous DisplayPort Alt Mode and USB data. IC Role / Device Role / Timing Role: One TPD1E01B04DPLT per SuperSpeed lane (x4 total), placed mid-mount near USB-C connector per TI reference layout. Use Value: X2SON-2 package (0.60 × 0.30 mm) enables dense routing in space-constrained 4-layer PCBs without sacrificing RF performance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD1E01B04DPYT | Larger X1SON (DPY) package (1.00 × 0.60 mm), 0.20–0.23 pF max capacitance, identical electrical specs | Requires larger PCB footprint; better thermal dissipation (RθJB = 162.5°C/W vs. 394.4°C/W) | Select DPYT when board layout allows extra area and higher surge current handling is prioritized over minimal capacitance. |
| TPD1E01B04-Q1 | Automotive-qualified (AEC-Q100 Grade 2), same DPL package and electrical parameters, extended reliability screening | Approved for automotive infotainment USB-C ports; not intended for commercial-grade cost-sensitive designs | Choose Q1 only for automotive programs requiring ASIL-B support and zero-defect manufacturing traceability. |
Compared with TPD1E01B04DPYT and TPD1E01B04-Q1, the TPD1E01B04DPLT offers the smallest footprint and lowest typical capacitance (0.18 pF), making it optimal for space-constrained, ultra-high-speed consumer electronics where signal fidelity is paramount.
Availability
TPD1E01B04DPLT is available at Aetrix Electronics and suitable for USB Type-C docking stations, Thunderbolt 3 host controllers, and USB 3.1 Gen 2 embedded systems requiring stable component supply with guaranteed long-term continuity.
Supply support for TPD1E01B04DPLT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in precision analog, power management, and high-speed interface protection technologies.
The TPD1E01B04 product line targets high-speed digital interface protection - specifically engineered to safeguard USB Type-C, Thunderbolt 3, and PCIe 3.0 signal paths against ESD, EFT, and surge without compromising bandwidth or signal integrity.
FAQ
What is the exact package type and dimensions of TPD1E01B04DPLT?
TPD1E01B04DPLT uses the X2SON (DPL) package: 2-pin, 0.60 mm × 0.30 mm nominal body size, 0.45 mm maximum height, with no exposed thermal pad. Pin 1 is located in quadrant Q1 per tape-and-reel orientation standard, and the device complies with moisture sensitivity level 1 (260°C peak reflow).
Does TPD1E01B04DPLT require any external bias or power supply?
No, TPD1E01B04DPLT is a fully passive TVS diode array with no power pins or control logic. It operates solely via bidirectional avalanche clamping between its two I/O terminals and requires no external voltage, current, or configuration - consistent with all TPD1E01B04 variants.
How does TPD1E01B04DPLT perform on USB 3.1 Gen 2 10-Gbps signals?
TPD1E01B04DPLT maintains signal integrity on USB 3.1 Gen 2 links: TI's measured eye diagrams show negligible degradation versus bare-board performance, enabled by 0.18 pF typical capacitance and 26.9 GHz –3 dB bandwidth. Insertion loss remains below –0.5 dB at 5 GHz, preserving eye height and jitter budget.
Can TPD1E01B04DPLT protect Thunderbolt 3 20-Gbps differential pairs?
Yes, TPD1E01B04DPLT is explicitly validated for Thunderbolt 3: its 0.18–0.20 pF capacitance and 26.9 GHz bandwidth meet the stringent RF requirements of 20-Gbps operation. TI's application note SLVSDG3C confirms clean eye diagrams with TPD1E01B04DPLT in Thunderbolt 3 reference layouts.
What is the maximum clamping voltage of TPD1E01B04DPLT under ESD stress?
TPD1E01B04DPLT clamps to 15 V at 16 A TLP current (per IEC 61000-4-2 Level 4 test conditions), with lower clamping of 9.2 V at 5 A TLP and 7 V at 1 A TLP. This ensures protected ICs see minimal overvoltage during fast transients while maintaining low dynamic resistance (0.57 Ω).
TPD1E01B04DPLT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 0201 (0603 Metric)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 3.6V (Max)
- Voltage - Breakdown (Min):
- 6.4V (Typ)
- Voltage - Clamping (Max) @ Ipp:
- 15V (Typ)
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- 27W
- Power Line Protection:
- No
- Applications:
- HDMI
- Capacitance @ Frequency:
- 0.18pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 2-X2SON (0.6x0.3)
TPD1E01B04DPLT FAQ
1.How can I place an order for TPD1E01B04DPLT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPD1E01B04DPLT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPD1E01B04DPLT reliable?
The price and inventory of TPD1E01B04DPLT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPD1E01B04DPLT is usually 5 days.
3.What payment methods are accepted for TPD1E01B04DPLT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPD1E01B04DPLT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPD1E01B04DPLT?
TPD1E01B04DPLT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPD1E01B04DPLT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPD1E01B04DPLT?
For technical support, including TPD1E01B04DPLT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPD1E01B04DPLT requirements.
6.How does Aetrix verify that TPD1E01B04DPLT is sourced from the original manufacturer or authorized distributors?
All TPD1E01B04DPLT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPD1E01B04DPLT meets industry standards.
7.What is the process for return or replacement of TPD1E01B04DPLT?
All TPD1E01B04DPLT units undergo pre-shipment inspection (PSI). If there is an issue with TPD1E01B04DPLT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPD1E01B04DPLT part is unused and in its original packaging.
Return procedure for TPD1E01B04DPLT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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