Texas Instruments TPD1E01B04DPYT
- Part No.:
- TPD1E01B04DPYT
- Manufacturer:
- Texas Instruments
- Category:
- TVS Diodes
- Package:
- 0402 (1006 Metric)
- Datasheet:
-
TPD1E01B04DPYT.pdf
- Description:
- TVS DIODE 3.6VWM 15VC 2X1SON
- Quantity:
- Payment:

- Shipping:

Inventory:11,445
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPD1E01B04DPYT from Texas Instruments is a single-channel bidirectional TVS ESD protection diode in X1SON (DPY) package, rated for ±15-kV contact / ±17-kV air-gap IEC 61000-4-2 Level 4 ESD suppression, with 0.20–0.23 pF typical line capacitance, 6.4 V DC breakdown voltage, and 15 V clamping voltage at 16 A TLP - deployed on USB Type-C superspeed differential pairs (e.g., SSTX1P/N, SSRX1P/N) in laptops and docking stations.
For engineers reviewing the TPD1E01B04DPYT datasheet, TPD1E01B04DPYT pinout, TPD1E01B04DPYT application, or TPD1E01B04DPYT equivalent, this page delivers verified electrical specs, DPY-package layout guidance, USB Type-C/Thunderbolt 3 interface compatibility, and real-world ESD protection performance at 20 Gbps data rates.
Technical Context
The TPD1E01B04DPYT operates as a passive, bidirectional clamping diode with ultra-low dynamic resistance (0.57 Ω) and fast response to transient overvoltage events. Its design centers on preserving signal integrity on high-speed differential lines by minimizing parasitic capacitance and insertion loss - achieving –3 dB bandwidth up to 26.9 GHz (DPL variant) and supporting 20 Gbps operation.
It functions within –40°C to +125°C industrial temperature range, triggers above ±6.4 V DC breakdown, clamps to ≤15 V at 16 A TLP, and maintains ≤10 nA leakage at ±2.5 V bias - enabling robust system-level ESD immunity without degrading USB 3.1 Gen 2 or Thunderbolt 3 eye diagrams.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating (IEC 61000-4-2) | ±15-kV contact / ±17-kV air-gap discharge - meets Level 4 immunity for end-user interface ports |
| Line Capacitance | 0.20–0.23 pF (max) at 1 MHz - preserves signal integrity on 10+ GHz differential traces |
| DC Breakdown Voltage | 6.4 V (typical) - protects against surges while remaining transparent to ±3.6 V signal swing |
| Clamping Voltage | 15 V at 16 A TLP - limits stress on downstream PHY ICs during worst-case ESD strikes |
| Leakage Current | ≤10 nA at ±2.5 V - avoids DC loading on high-impedance CC/SBU/USB3.1 control lines |
| Surge Rating (IEC 61000-4-5) | 2.5 A (8/20 µs) - withstands lightning-induced transients on exposed connectors |
| Operating Temperature | –40°C to +125°C - supports deployment in thermally demanding laptop chassis and docking hubs |
Pinout & Package
X1SON (DPY) package: 1.00 mm × 0.60 mm body, 0.45 mm max height, 2-pin no-lead surface-mount device with flow-through routing optimized for minimal trace stubs on high-speed differential pairs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O | ESD-protected signal line terminal; connects to one side of differential pair (e.g., SSTX1P) |
| 2 | GND | Direct connection to system ground plane; provides low-inductance return path for ESD current |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.20–0.23 pF max ensures <0.5 dB insertion loss up to 10 GHz on USB Type-C superspeed lanes |
| Bidirectional clamping | Protects both positive and negative ESD transients without polarity constraints on differential signals |
| Low dynamic resistance | 0.57 Ω enables rapid energy diversion and tight clamping to safeguard 20-Gbps PHY receivers |
| Industrial temp range | –40°C to +125°C operation supports reliability in compact, fanless laptop and dock thermal environments |
| Flow-through layout | Linear pin arrangement allows in-line placement between connector and controller with zero trace detour |
Applications
| USB Type-C Laptop Interface | Thunderbolt 3 Docking Station |
|---|---|
Use Scenario: Protecting SSTX/SSRX differential pairs on a thin-profile ultrabook motherboard where space and signal fidelity are critical. IC Role / Device Role / Timing Role: ESD shunt clamp placed immediately adjacent to USB-C receptacle to divert ±15-kV contact discharges before reaching USB 3.1 Gen 2 PHY. Use Value: Maintains >20 Gbps eye opening (verified via Figure 13) while meeting IEC 61000-4-2 Level 4 without adding series impedance or skew. |
Use Scenario: Shielding eight superspeed lanes (SSTX1/2P/N, SSRX1/2P/N) in a multi-protocol dock handling simultaneous DisplayPort Alt Mode and PCIe tunneling. IC Role / Device Role / Timing Role: Single-channel per lane protection ensuring each differential pair remains isolated and impedance-matched at 85 Ω. Use Value: Enables full 40 Gbps Thunderbolt 3 bandwidth with <0.23 pF loading - preventing jitter accumulation across long internal PCB traces. |
| USB 3.1 Gen 2 Mobile Dongle | High-Speed Monitor Hub |
Use Scenario: Adding ESD resilience to a compact USB-C-to-HDMI dongle operating at 10 Gbps with strict size constraints. IC Role / Device Role / Timing Role: Low-capacitance TVS on TX/RX lanes upstream of retimer IC, placed within 3 mm of connector edge. Use Value: Achieves pass/fail compliance for USB-IF certification tests while fitting in 0402-equivalent footprint (DPY = 1.0 × 0.6 mm). |
Use Scenario: Protecting dual-lane USB-C upstream port on a 4K monitor hub that also routes DisplayPort 1.3 and USB 2.0. IC Role / Device Role / Timing Role: Dedicated TPD1E01B04DPYT per superspeed lane, decoupled from CC/SBU protection (handled by TPD4E05U06). Use Value: Prevents ESD-induced lockup or packet corruption during hot-plug events without degrading HDMI 2.0 or DP 1.3 timing margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD1E01B04DPLR | Same die in smaller X2SON (DPL) package: 0.60 × 0.30 mm, 0.18–0.20 pF capacitance | Better RF performance (26.9 GHz –3 dB BW) but tighter placement tolerance due to 0.3-mm width | Select DPL for highest-speed designs (>15 Gbps) where board space permits ultra-compact layout |
| TPD1E01B04-Q1 | Automotive-qualified (AEC-Q100 Grade 1), identical electrical specs, same DPY package | Required for automotive infotainment USB-C ports; includes extended reliability testing and PPAP support | Select Q1 variant only when automotive qualification, lot traceability, or enhanced burn-in is mandated |
Compared with TPD1E01B04DPYT, the DPL variant offers marginally lower capacitance for extreme bandwidth, while the Q1 version adds automotive-grade process controls - neither is pin-compatible with other TI ESD arrays like TPD4E05U06 due to differing channel count and pinout.
Availability
TPD1E01B04DPYT is available at Aetrix Electronics and suitable for USB Type-C laptop interfaces, Thunderbolt 3 docking stations, and high-speed monitor hubs requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for TPD1E01B04DPYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-reliability power solutions, with decades of expertise in ESD protection architecture and high-speed interface design.
The TPD1E01B04 product line delivers ultra-low-capacitance TVS diodes specifically engineered for USB Type-C, Thunderbolt 3, and PCIe 3.0 signal-line protection - balancing IEC-compliant surge immunity with sub-0.25-pF parasitics.
FAQ
What is the exact package type and dimensions of TPD1E01B04DPYT?
TPD1E01B04DPYT uses the X1SON (DPY) package: 1.00 mm × 0.60 mm body size, 0.45 mm maximum height, and 2-pin no-lead construction. Pin 1 is marked by a quadrant indicator (Q2) on the tape, and the device features exposed thermal pad geometry compatible with standard reflow profiles (MSL Level-1, 260°C peak).
Does TPD1E01B04DPYT support USB 3.1 Gen 2 (10 Gbps) and Thunderbolt 3 (20 Gbps) data rates?
Yes, TPD1E01B04DPYT supports both standards: its 0.20–0.23 pF line capacitance and low insertion loss preserve signal integrity up to 20 Gbps, as validated in TI's USB 3.1 Gen 2 eye diagram testing (Figure 13) and Thunderbolt 3 reference schematics using eight TPD1E01B04DPYT devices per connector.
What is the clamping voltage behavior of TPD1E01B04DPYT under ESD stress?
TPD1E01B04DPYT clamps to 15 V at 16 A TLP (transmission-line pulse), 9.2 V at 5 A TLP, and 7 V at 1 A TLP - measured IO-to-GND. This low clamping voltage, combined with 0.57 Ω dynamic resistance, ensures protected ICs see minimal overvoltage during IEC 61000-4-2 Level 4 events.
Can TPD1E01B04DPYT be used on USB Type-C CC (Configuration Channel) lines?
No - TPD1E01B04DPYT is optimized for high-speed differential pairs (SSTX/SSRX) with ±3.6 V signal swing. For CC lines (0–5 V DC range, low-frequency signaling), TI recommends TPD4E05U06, which offers higher standoff voltage and appropriate capacitance for 480-MHz-class control signals.
How does TPD1E01B04DPYT compare to TPD1E01B04DPLR in layout and performance?
TPD1E01B04DPYT (DPY) measures 1.00 × 0.60 mm with 0.20–0.23 pF capacitance; TPD1E01B04DPLR (DPL) is smaller (0.60 × 0.30 mm) and slightly lower capacitance (0.18–0.20 pF), yielding better RF performance (26.9 GHz –3 dB BW). Both share identical electrical specs, thermal ratings, and pinout - but DPY eases placement in constrained layouts where DPL's 0.3-mm width risks solder bridging.
TPD1E01B04DPYT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 0402 (1006 Metric)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 3.6V (Max)
- Voltage - Breakdown (Min):
- 6.4V (Typ)
- Voltage - Clamping (Max) @ Ipp:
- 15V
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- 27W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 0.2pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 2-X1SON (1x.60)
TPD1E01B04DPYT FAQ
1.How can I place an order for TPD1E01B04DPYT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPD1E01B04DPYT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPD1E01B04DPYT reliable?
The price and inventory of TPD1E01B04DPYT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPD1E01B04DPYT is usually 5 days.
3.What payment methods are accepted for TPD1E01B04DPYT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPD1E01B04DPYT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPD1E01B04DPYT?
TPD1E01B04DPYT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPD1E01B04DPYT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPD1E01B04DPYT?
For technical support, including TPD1E01B04DPYT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPD1E01B04DPYT requirements.
6.How does Aetrix verify that TPD1E01B04DPYT is sourced from the original manufacturer or authorized distributors?
All TPD1E01B04DPYT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPD1E01B04DPYT meets industry standards.
7.What is the process for return or replacement of TPD1E01B04DPYT?
All TPD1E01B04DPYT units undergo pre-shipment inspection (PSI). If there is an issue with TPD1E01B04DPYT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPD1E01B04DPYT part is unused and in its original packaging.
Return procedure for TPD1E01B04DPYT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPD1E01B04DPYT Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

