Texas Instruments TPD1E04U04DPLT
- Part No.:
- TPD1E04U04DPLT
- Manufacturer:
- Texas Instruments
- Category:
- TVS Diodes
- Package:
- 0201 (0603 Metric)
- Datasheet:
-
TPD1E04U04DPLT.pdf
- Description:
- TVS DIODE 3.6VWM 8.9VC 2X2SON
- Quantity:
- Payment:

- Shipping:

Inventory:12,909
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPD1E04U04DPLT from Texas Instruments is a unidirectional TVS ESD protection diode in X2SON (DPL) 2-pin package, designed for HDMI 2.0 and USB 3.0 signal-line protection. It delivers ±16-kV IEC 61000-4-2 contact/air-gap ESD immunity, 0.5-pF typical IO-to-GND capacitance, 0.25-Ω dynamic resistance (IO→GND), and supports data rates up to 6 Gbps in high-speed interface applications such as HDMI transmitter ports.
For engineers reviewing the TPD1E04U04DPLT datasheet, TPD1E04U04DPLT pinout, TPD1E04U04DPLT application, or TPD1E04U04DPLT equivalent, this page provides verified technical context, real-world design meaning of key specs, validated pin functions, application-specific implementation guidance, and confirmed alternative options for HDMI/USB 3.0 ESD protection layouts.
Technical Context
The TPD1E04U04DPLT operates as a passive clamping diode with unidirectional conduction-forward-biased from GND to IO (VF = 0.8 V @ 1 mA) and reverse-biased from IO to GND (VBR min = 4.5 V). Its ultra-low 0.5-pF line capacitance and sub-0.3-Ω RDYN ensure minimal signal distortion on TMDS differential pairs running at 3 GHz fundamental frequency (6 Gbps).
It meets IEC 61000-4-2 Level 4 (±16-kV), IEC 61000-4-4 (80-A EFT), and IEC 61000-4-5 (2.5-A surge) standards, with clamping voltages of 8.9 V (IO→GND, 16-A TLP) and –4.6 V (GND→IO, –16-A TLP), enabling robust system-level protection for SoCs with 3.6-V IO rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating (IEC 61000-4-2) | ±16-kV contact & air-gap discharge - exceeds Level 4, suitable for consumer/industrial HDMI port handling without external shielding. |
| IO Capacitance | 0.5 pF (typ), 0.65 pF (max) - preserves HDMI 2.0 eye integrity at 6 Gbps; <0.1 dB insertion loss up to 10 GHz. |
| Dynamic Resistance | 0.25 Ω (IO→GND), 0.18 Ω (GND→IO) - limits clamped voltage rise during ESD transients, reducing stress on downstream PHY. |
| Clamping Voltage | 8.9 V @ 16-A TLP (IO→GND); –4.6 V @ –16-A TLP (GND→IO) - holds protected IC pins within safe SOA during fast transients. |
| DC Breakdown Voltage | 4.5 V (min) - ensures no conduction during normal 3.6-V TMDS signaling, preventing DC loading or leakage-induced jitter. |
| Leakage Current | ≤10 nA @ 2.5 V - avoids signal degradation or bias shift in high-impedance DDC/CEC control lines. |
| Operating Temperature | –40°C to +125°C - supports industrial-grade HDMI interfaces in set-top boxes, monitors, and automotive infotainment displays. |
Pinout & Package
X2SON (DPL) 2-pin package: 0.60 mm × 0.30 mm body, 0.45 mm max height, single-row flow-through layout optimized for inline placement between HDMI connector and controller.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IO) | ESD-protected signal line | Connects directly to TMDS+/–, DDC_CLK, DDC_DAT, CEC, or HOTPLUG_DET; must be routed adjacent to matching GND via. |
| 2 (GND) | Ground reference | Low-inductance connection to solid ground plane required; internal diode cathode ties to this pin for unidirectional clamping. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.5-pF typical IO-to-GND capacitance enables HDMI 2.0 6-Gbps compliance without degrading eye opening or rise/fall times. |
| Low dynamic resistance | 0.25 Ω (IO→GND) minimizes voltage overshoot during ESD events, protecting 28-nm/16-nm SoC I/O cells with tight VDDIO margins. |
| Industrial temperature range | –40°C to +125°C operation supports deployment in thermally demanding environments like enclosed AV receivers and digital signage. |
| Flow-through routing | Inline 2-pin layout allows direct series insertion into high-speed traces with no stubs or vias-no PCB layer changes needed. |
| IEC-compliant surge handling | 2.5-A (8/20 µs) surge rating per IEC 61000-4-5 ensures resilience against lightning-induced coupling in long HDMI cable runs. |
Applications
| HDMI 2.0 Transmitter Port | USB 3.0 SuperSpeed Interface |
|---|---|
Use Scenario: Protecting TMDS differential pairs (D0+/–, D1+/–, D2+/–, CK+/–) and control lines (DDC, CEC, HOTPLUG) on source-side HDMI Type-A connectors. IC Role / Device Role / Timing Role: Unidirectional clamping diode placed immediately after connector, shunting ESD energy to local ground before reaching HDMI PHY. Use Value: Maintains 6-Gbps signal integrity (eye diagram pass/fail verified per Figure 11–12) while meeting IEC 61000-4-2 Level 4 requirements. |
Use Scenario: ESD protection of USB 3.0 SuperSpeed differential lanes (SSTX+/–, SSRX+/–) and sideband signals (USB3_CLK, USB3_STROBE) on host or device ports. IC Role / Device Role / Timing Role: Signal-line TVS diode with sub-0.65-pF max capacitance, positioned inline to preserve 5-Gbps NRZ signaling fidelity. Use Value: Enables full USB-IF compliance testing with ≤0.5-dB insertion loss at 2.5 GHz and no measurable jitter accumulation. |
| DisplayPort 1.2 Source | PCIe 3.0 Add-in Card Edge Connector |
Use Scenario: Protecting DisplayPort main link lanes (AUX, HPD, and DP++ adapter detection lines) in monitor or docking station designs. IC Role / Device Role / Timing Role: Low-capacitance ESD clamp on 3.3-V tolerant DP lanes operating up to 5.4 Gbps (HBR2). Use Value: Prevents latch-up in DP PHYs during hot-plug events while maintaining <100-fs RMS jitter contribution. |
Use Scenario: Guarding PCIe 3.0 x1/x4 edge connector lanes (REFCLK, PERST#, WAKE#) against handling ESD in server backplanes or GPU risers. IC Role / Device Role / Timing Role: Standalone TVS for low-voltage control signals sharing 3.3-V rail with PCIe root complex. Use Value: Delivers 80-A EFT immunity (IEC 61000-4-4) without compromising PCIe 3.0 8-Gbps timing margin or reference clock stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD1E04U04DPYT | Same die, X1SON (DPY) 2-pin package: 1.00 mm × 0.60 mm body, 0.45-mm max height, 10000-piece reel packaging. | Requires larger PCB footprint (1.0×0.6 mm vs. 0.6×0.3 mm); higher thermal resistance (RθJA = 683.6°C/W vs. 574°C/W). | Select DPYT for legacy layouts with existing DPY land patterns or where higher power dissipation margin is needed. |
| SMA6J33A-Q | Bi-directional TVS, SMA package, 33-V standoff, 600-W peak pulse power, 100-pF capacitance - not suitable for >1-Gbps interfaces. | Only appropriate for low-speed control lines (e.g., CEC, DDC) due to excessive capacitance; cannot protect TMDS or USB 3.0 lanes. | Use only for non-high-speed auxiliary signals where bandwidth is not constrained; avoid for data-lane protection. |
Compared with TPD1E04U04DPLT, the DPYT variant offers identical electrical performance but demands more board area and has reduced thermal efficiency, while SMA6J33A-Q lacks the ultra-low capacitance required for HDMI 2.0/USB 3.0, making it unsuitable as a direct functional replacement for high-speed lanes.
Availability
TPD1E04U04DPLT is available at Aetrix Electronics and suitable for HDMI 2.0 transmitter ports, USB 3.0 host interfaces, and DisplayPort 1.2 source designs requiring stable component supply across industrial temperature ranges and high-volume production cycles.
Supply support for TPD1E04U04DPLT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.
The TPD1E04U04 family targets high-speed interface protection, specifically engineered to safeguard next-generation HDMI, USB, and DisplayPort PHYs from ESD without compromising signal integrity or timing margins.
FAQ
What is the primary function of the TPD1E04U04DPLT in an HDMI 2.0 design?
The TPD1E04U04DPLT serves as a unidirectional ESD protection diode placed inline between the HDMI connector and controller IC. It clamps transient voltages-such as ±16-kV IEC 61000-4-2 ESD strikes-to safe levels (8.9 V positive, –4.6 V negative) while introducing only 0.5-pF capacitance, ensuring HDMI 2.0 6-Gbps signal integrity remains intact. The TPD1E04U04DPLT is explicitly validated for TMDS lane protection in TI's HDMI 2.0 reference schematics.
Does the TPD1E04U04DPLT support bidirectional signal lines like USB 3.0 differential pairs?
Yes-the TPD1E04U04DPLT is unidirectional but supports bidirectional AC-coupled high-speed data lanes like USB 3.0 SSTX+/– and SSRX+/– because its clamping action occurs only during overvoltage transients, not during normal signal swing. Its 0.5-pF capacitance and 0.25-Ω RDYN ensure negligible impact on 5-Gbps NRZ signaling, and TI confirms its use in USB 3.0 applications per SLVSDG4B Section 2 and Figure 15.
What is the maximum data rate supported by the TPD1E04U04DPLT?
The TPD1E04U04DPLT supports data rates up to 6 Gbps, as verified by TI's HDMI 2.0 6-Gbps eye diagram testing (Figures 11 and 12 in SLVSDG4B). This capability stems directly from its 0.5-pF typical capacitance and ultra-low dynamic resistance, which jointly limit insertion loss to <0.1 dB up to 10 GHz and preserve signal rise/fall times critical for high-speed serial links.
Can the TPD1E04U04DPLT be used on 5-V tolerant control lines like DDC_CLK or CEC?
No-the TPD1E04U04DPLT is rated for 3.6-V maximum IO voltage (VIO) and 4.5-V minimum breakdown (VBR), making it unsuitable for 5-V tolerant lines. For DDC/CEC/HOTPLUG_DET signals operating up to 5.5 V, TI recommends TPD1E05U06, which has higher VBR and same 0.5-pF capacitance. Using TPD1E04U04DPLT on 5-V lines risks premature conduction and signal corruption.
What is the recommended PCB layout practice for the TPD1E04U04DPLT?
TI specifies placement as close as possible to the HDMI or USB connector, with the IO pin routed directly to the protected line and the GND pin tied to a low-inductance ground plane via multiple vias. Trace length between TPD1E04U04DPLT and connector must be minimized (<2 mm ideal) to prevent EMI coupling; sharp corners are prohibited-use rounded routing with max radius. This layout is demonstrated in Figure 16 of SLVSDG4B for HDMI 2.0 Type-A ports.
TPD1E04U04DPLT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 0201 (0603 Metric)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.6V (Max)
- Voltage - Breakdown (Min):
- 4.5V
- Voltage - Clamping (Max) @ Ipp:
- 8.9V
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- 16W
- Power Line Protection:
- Yes
- Applications:
- HDMI
- Capacitance @ Frequency:
- 0.5pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 2-X2SON (0.6x0.3)
TPD1E04U04DPLT FAQ
1.How can I place an order for TPD1E04U04DPLT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPD1E04U04DPLT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPD1E04U04DPLT reliable?
The price and inventory of TPD1E04U04DPLT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPD1E04U04DPLT is usually 5 days.
3.What payment methods are accepted for TPD1E04U04DPLT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPD1E04U04DPLT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPD1E04U04DPLT?
TPD1E04U04DPLT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPD1E04U04DPLT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPD1E04U04DPLT?
For technical support, including TPD1E04U04DPLT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPD1E04U04DPLT requirements.
6.How does Aetrix verify that TPD1E04U04DPLT is sourced from the original manufacturer or authorized distributors?
All TPD1E04U04DPLT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPD1E04U04DPLT meets industry standards.
7.What is the process for return or replacement of TPD1E04U04DPLT?
All TPD1E04U04DPLT units undergo pre-shipment inspection (PSI). If there is an issue with TPD1E04U04DPLT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPD1E04U04DPLT part is unused and in its original packaging.
Return procedure for TPD1E04U04DPLT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPD1E04U04DPLT Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

