STMicroelectronics USBLC6-2SC6
- Part No.:
- USBLC6-2SC6
- Manufacturer:
- STMicroelectronics
- Category:
- TVS Diodes
- Package:
- SOT-23-6
- Datasheet:
-
USBLC6-2SC6.pdf
- Description:
- TVS DIODE 5.25VWM 17VC SOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:59,228
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Product details
Overview
USBLC6-2SC6 from STMicroelectronics is a monolithic dual-line ESD protection device for high-speed USB 2.0 interfaces, featuring 3.5 pF max I/O-to-GND capacitance, 150 nA max leakage current at 5.25 V, and guaranteed IEC 61000-4-2 Level 4 (±15 kV air / ±8 kV contact) compliance. It protects both D+/D− data lines and VBUS in SOT23-6L package, enabling robust 480 Mb/s high-speed USB port designs.
For engineers reviewing the USBLC6-2SC6 datasheet, USBLC6-2SC6 pinout, USBLC6-2SC6 application, or USBLC6-2SC6 equivalent, key selection criteria include line capacitance matching tolerance (±0.015 pF), clamping voltage (12 V @ 1 A, 8/20 μs), VBUS breakdown (6 V min), and dual-package availability (SOT23-6L vs SOT-666) for PCB space optimization.
Technical Context
The USBLC6-2SC6 implements rail-to-rail topology with integrated Transil™ and low-capacitance diodes to clamp ESD transients on D+, D−, and VBUS simultaneously. Its symmetric I/O structure ensures matched 2.5–3.5 pF capacitance between each data line and GND, critical for USB 2.0 signal integrity.
Clamping behavior is defined by forward voltage (1.1 V typ. @ 10 mA) and breakdown voltage (6 V min @ 1 mA) across VBUS–GND, with dynamic resistance (~0.5 Ω) determining VCL+ = VBR + VF + Rd·Ip under surge conditions. Layout parasitics directly impact effective clamping performance, requiring sub-10 mm trace lengths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance (I/O–GND) | 2.5–3.5 pF @ 1.65 V - preserves USB 2.0 eye diagram integrity up to 480 Mb/s |
| Capacitance Matching Tolerance | ±0.015 pF - ensures D+/D− signal balance per USB 2.0 differential timing spec |
| Leakage Current | 10–150 nA @ 5.25 V - extends battery life in portable USB peripherals |
| Clamping Voltage | 12 V @ 1 A (8/20 μs) - limits transient overvoltage seen by downstream PHY |
| ESD Rating | ±15 kV air / ±8 kV contact (IEC 61000-4-2 Level 4) - system-level immunity without external shielding |
| Breakdown Voltage (VBUS–GND) | 6 V min @ 1 mA - blocks overvoltage while passing nominal 5 V VBUS |
| Package | SOT23-6L - 2.9 mm² footprint, compatible with standard pick-and-place |
Pinout & Package
SOT23-6L package: 2.8–3.05 mm × 1.5–1.75 mm × 0.9–1.45 mm height, 0.95 mm pitch, RoHS-compliant ECOPACK®.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O1 (D+) | Protected high-speed data line input/output; low-capacitance path to GND |
| 2 | GND | ESD return path; must connect to solid PCB ground plane with minimal inductance |
| 3 | VBUS | 5 V supply line protection node; clamps transients between VBUS and GND |
| 4 | VBUS | Duplicate VBUS terminal for enhanced current handling and layout symmetry |
| 5 | I/O2 (D−) | Second protected data line; capacitance matched to Pin 1 within ±0.015 pF |
| 6 | GND | Secondary ground terminal; reduces loop inductance in high-frequency ESD paths |
Key Features
| Feature | Design Value |
|---|---|
| Dual-line USB 2.0 protection | Single-device coverage of D+, D−, and VBUS eliminates need for discrete TVS arrays |
| Sub-4 pF line capacitance | Enables full 480 Mb/s USB 2.0 high-speed operation without signal rise-time degradation |
| Monolithic integration | Eliminates inter-device timing skew and mismatch; improves ESD response consistency |
| Low leakage current | ≤150 nA at 5.25 V supports >10-year battery life in USB-powered sensors and accessories |
| Layout-optimized pinout | GND pins on both ends reduce ground loop inductance during 1 ns ESD edge events |
Applications
| USB 2.0 High-Speed Port | Ethernet 10/100 Base-TX |
|---|---|
Use Scenario: Front-panel USB host port on industrial HMI with exposed connector. IC Role / Device Role / Timing Role: Primary ESD shunt for D+/D− and VBUS lines upstream of USB transceiver PHY. Use Value: Prevents latch-up or gate oxide damage in USB controller ICs during ±8 kV contact discharge events. | Use Scenario: RJ45 Ethernet interface on networked medical monitor with isolated power. IC Role / Device Role / Timing Role: Common-mode transient suppressor on TX+/TX− pairs before magnetics. Use Value: Maintains <1.2 pF inter-line capacitance to avoid signal jitter exceeding IEEE 802.3u jitter budget. |
| SIM Card Socket Protection | Portable Video Interface |
Use Scenario: Hot-pluggable SIM slot in ruggedized LTE router with frequent card insertion. IC Role / Device Role / Timing Role: Bidirectional ESD clamp on I/O, CLK, and RESET lines. Use Value: Limits leakage to ≤150 nA to prevent false SIM detection during low-power sleep mode. | Use Scenario: MIPI D-PHY video link from camera module to SoC in handheld ultrasound device. IC Role / Device Role / Timing Role: Differential pair protector preserving 80–100 Ω impedance and <0.1 UI jitter. Use Value: Achieves −55 dB crosstalk suppression up to 240 MHz, preventing ghosting artifacts in real-time imaging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-line high-speed interface ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD2E001DRYR | Higher 5.5 pF I/O–GND capacitance; single-GND pin; no VBUS protection | Limited to pure data-line protection; requires external VBUS TVS | Select when only D+/D− protection is needed and board space allows separate VBUS solution |
| SP1003-01UTG | Lower 0.6 pF I/O–GND capacitance but higher 1 μA leakage; SOD-323 package | Better for >1 Gb/s protocols but unsuitable for battery-critical applications | Select for ultra-high-speed links where leakage >100 nA is acceptable and VBUS is separately regulated |
Compared with TPD2E001DRYR and SP1003-01UTG, USBLC6-2SC6 uniquely integrates VBUS protection with matched sub-4 pF capacitance and nanoamp leakage-making it optimal for compact, battery-powered USB 2.0 ports requiring full-system ESD immunity without design compromises.
Availability
USBLC6-2SC6 is available at Aetrix Electronics and suitable for USB 2.0 host ports, Ethernet 10/100 interfaces, and SIM card sockets requiring stable component supply across industrial, medical, and consumer electronics programs.
Supply support for USBLC6-2SC6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power devices, and MEMS sensors for industrial, automotive, and consumer markets.
The USBLC6-2 series belongs to ST's dedicated ESD protection product line, engineered specifically for high-speed digital interfaces where signal integrity, low leakage, and system-level IEC 61000-4-2 compliance are non-negotiable design requirements.
FAQ
What is the maximum operating temperature range for USBLC6-2SC6?
The USBLC6-2SC6 has an operating junction temperature range of −40 °C to +150 °C, validated per absolute ratings in DS4260 Rev 7. This allows deployment in automotive infotainment head units and industrial PLCs where ambient temperatures exceed 85 °C, provided PCB thermal design maintains junction temperature within limit.
Does USBLC6-2SC6 require external biasing or control signals?
No. USBLC6-2SC6 is a passive, unidirectional ESD protection array with no enable pins, supply rails, or configuration logic. It operates solely via intrinsic diode clamping action between I/O pins and GND or VBUS, making it compatible with hot-plug USB 2.0 ports without firmware or power sequencing dependencies.
How does the dual-GND pin configuration improve ESD performance?
The dual-GND pins (Pins 2 and 6) reduce ground loop inductance in the ESD current path during fast transients (tr ≈ 1 ns). Per ST application note DS4260 Section 2.3, this layout minimizes voltage overshoot caused by LI/O·di/dt, lowering effective clamping voltage by up to 144 V compared to single-GND layouts with identical trace geometry.
Can USBLC6-2SC6 be used for USB 3.0 SuperSpeed differential pairs?
No. USBLC6-2SC6 is characterized for USB 2.0 (480 Mb/s) with 3.5 pF max I/O–GND capacitance; USB 3.0 SuperSpeed requires <1.0 pF to meet Gen1 eye diagram mask. ST recommends USBLC6-4SC6 or IP4252CZ6 for USB 3.0 applications, as confirmed in DS4260 Figure 4 frequency response and Table 2 capacitance specs.
USBLC6-2SC6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- SOT-23-6
- Series:
- USB
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5.25V
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 17V
- Current - Peak Pulse (10/1000µs):
- 5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- Yes
- Applications:
- USB
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
USBLC6-2SC6 FAQ
1.How can I place an order for USBLC6-2SC6 through Aetrix?
Please submit a Request for Quotation (RFQ) for USBLC6-2SC6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for USBLC6-2SC6 reliable?
The price and inventory of USBLC6-2SC6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for USBLC6-2SC6 is usually 5 days.
3.What payment methods are accepted for USBLC6-2SC6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for USBLC6-2SC6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for USBLC6-2SC6?
USBLC6-2SC6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your USBLC6-2SC6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for USBLC6-2SC6?
For technical support, including USBLC6-2SC6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your USBLC6-2SC6 requirements.
6.How does Aetrix verify that USBLC6-2SC6 is sourced from the original manufacturer or authorized distributors?
All USBLC6-2SC6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that USBLC6-2SC6 meets industry standards.
7.What is the process for return or replacement of USBLC6-2SC6?
All USBLC6-2SC6 units undergo pre-shipment inspection (PSI). If there is an issue with USBLC6-2SC6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The USBLC6-2SC6 part is unused and in its original packaging.
Return procedure for USBLC6-2SC6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
USBLC6-2SC6 Tags

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DESD3V3E1BL-7B
Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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onsemi

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Diodes Incorporated

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Diodes Incorporated

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Nexperia USA Inc.

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Toshiba Semiconductor and Storage

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Diodes Incorporated
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