Vishay General Semiconductor - Diodes Division VBUS05L1-DD1-G-08
- Part No.:
- VBUS05L1-DD1-G-08
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- SOD-882
- Datasheet:
-
VBUS05L1-DD1-G-08.pdf
- Description:
- TVS DIODE 5.5VWM 17VC LLP1006-2M
- Quantity:
- Payment:

- Shipping:

Inventory:84,955
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Product details
Overview
VBUS05L1-DD1-G-08 from Vishay Semiconductors is a bidirectional symmetrical (BiSy) single-line ESD protection diode in LLP1006-2M package, rated for ±5.5 V working voltage, 0.33 pF typical capacitance at 0 V, <0.05 μA reverse leakage, and ±15 kV IEC 61000-4-2 contact discharge immunity - deployed on high-speed USB 2.0, HDMI, and MIPI data lines.
For engineers reviewing the VBUS05L1-DD1-G-08 datasheet, VBUS05L1-DD1-G-08 pinout, VBUS05L1-DD1-G-08 application, or VBUS05L1-DD1-G-08 equivalent, key selection criteria include ultra-low load capacitance (<0.4 pF), sub-0.4 mm profile, MSL Level 1 solderability, NiPdAu (e4) plating, and verified clamping performance at 2 A IPPM.
Technical Context
The VBUS05L1-DD1-G-08 implements a symmetric Zener-based clamping structure optimized for bidirectional transient suppression without polarity dependence. Its low-inductance LLP1006-2M layout enables sub-nanosecond response to ESD events while maintaining <0.4 mm height and 1.05 mm × 0.65 mm footprint.
It operates within -40 °C to +125 °C junction temperature range, supports peak pulse power of 34 W per IEC 61000-4-5 (8/20 μs), and delivers clamping voltage ≤14 V at 2 A IPPM - critical for protecting 3.3 V and 5 V logic interfaces against overvoltage transients.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protection Type | Bidirectional symmetrical (BiSy) clamping - protects both positive and negative transients without polarity bias |
| Working Voltage (VRWM) | ±5.5 V - compatible with 3.3 V and 5 V I/O rails without DC loading |
| Capacitance (CD) | 0.33 pF typ. at 0 V, 1 MHz - preserves signal integrity on >480 Mbps USB 2.0 and 1.65 Gbps MIPI D-PHY links |
| Leakage Current (IR) | <0.05 μA at VRWM - avoids measurable DC offset or battery drain in portable systems |
| ESD Rating | ±15 kV contact / ±16 kV air per IEC 61000-4-2 - exceeds industrial and consumer immunity requirements |
| Clamping Voltage (VC) | ≤14 V at 2 A IPPM - ensures downstream ICs remain below absolute maximum ratings during surge events |
| Package | LLP1006-2M (1.05 × 0.65 × 0.33 mm) - enables routing under fine-pitch connectors and dense PCB layouts |
Pinout & Package
LLP1006-2M is a 2-terminal surface-mount package with exposed pad (no thermal pad connection required), 0.33 mm max height, and pin 1 marked by bar indicator. Soldering complies with J-STD-020 MSL Level 1 (peak 260 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Anode/Cathode (symmetrical) | Interchangeable terminal - bidirectional conduction eliminates orientation dependency during placement |
| Pin 2 | Anode/Cathode (symmetrical) | Interchangeable terminal - identical electrical behavior regardless of line-to-ground connection direction |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.33 pF typ. - minimizes signal distortion and insertion loss on high-speed serial buses |
| Sub-0.4 mm profile | 0.33 mm max height - fits beneath low-profile connectors and in tight board-to-board spacing |
| NiPdAu (e4) plating | Whisker-free, RoHS-compliant termination - ensures long-term solder joint reliability without Sn-related growth risks |
| MSL Level 1 rating | No floor life limitation - can be stored indefinitely before reflow without baking preconditioning |
| Low-inductance layout | Short internal leads in LLP1006-2M - reduces overshoot/undershoot during fast ESD transients (0.7–1 ns rise time) |
Applications
| USB 2.0 Data Lines | HDMI TMDS Channels |
|---|---|
|
Use Scenario: Protecting D+ and D− differential pairs in portable USB peripherals and host controllers. IC Role / Device Role / Timing Role: Line-level ESD clamp placed directly at connector entry point, before series impedance or receiver input. Use Value: 0.33 pF capacitance prevents degradation of 480 Mbps eye diagram; ±15 kV rating meets IEC/EN 61000-4-2 system-level compliance. |
Use Scenario: Shielding TMDS clock and data channels in HDMI 1.4/2.0 source devices (e.g., set-top boxes, GPUs). IC Role / Device Role / Timing Role: Point-of-entry transient suppressor between HDMI connector and level-shifting buffer or retimer IC. Use Value: Sub-0.4 mm height allows placement adjacent to HDMI receptacles; low clamping voltage (≤14 V) safeguards 3.3 V TMDS receivers. |
| MIPI D-PHY Interfaces | Industrial Sensor Data Links |
|
Use Scenario: Securing high-speed camera or display interface lanes in automotive ADAS and mobile imaging modules. IC Role / Device Role / Timing Role: Single-line ESD guard on each D-PHY data or clock lane, mounted within 3 mm of connector. Use Value: 0.33 pF capacitance maintains >1.65 Gbps signal fidelity; -40 °C to +125 °C operation supports under-hood and handheld environments. |
Use Scenario: Hardening RS-485, CAN FD, or I²C sensor bus lines in factory automation and building control nodes. IC Role / Device Role / Timing Role: Low-leakage (≤0.05 μA) protector on bidirectional data lines where standby current budget is constrained. Use Value: Symmetrical clamping avoids polarity misalignment on half-duplex buses; ±16 kV air discharge withstands harsh ESD-prone environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ON Semiconductor NUP4105MR6T1G | 0.5 pF capacitance, ±12 kV contact ESD rating, SOT-563 package (1.6 × 1.6 mm) | Larger footprint and higher capacitance limit use on >200 Mbps links; suitable for cost-sensitive industrial controls | Select when board space permits larger package and 0.5 pF is acceptable for lower-speed interfaces |
| Infineon ESD204-B1-W02 | 0.25 pF capacitance, ±20 kV contact rating, 0402 (1.0 × 0.5 mm) package, but 8.5 V VBR | Lower clamping threshold may trigger prematurely on 5 V tolerant lines; tighter tolerance on low-capacitance requirement | Prefer for ultra-high-speed (>10 Gbps) applications where 0.25 pF is mandatory, provided VBR compatibility is verified |
Compared with NUP4105MR6T1G and ESD204-B1-W02, the VBUS05L1-DD1-G-08 delivers optimal balance of ultra-low capacitance (0.33 pF), robust ±15 kV ESD immunity, and minimal 1.05 × 0.65 mm footprint - making it preferred for space-constrained, high-data-rate interfaces where leakage and height are critical.
Availability
VBUS05L1-DD1-G-08 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, HDMI TMDS channel hardening, and MIPI D-PHY lane safeguarding requiring stable component supply across production lifecycles.
Supply support for VBUS05L1-DD1-G-08 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors and passive components, specializing in high-reliability protection, power, and sensing solutions for industrial, automotive, and computing markets.
The VBUS05L1-DD1-G-08 belongs to Vishay's BiSy ESD protection family, engineered specifically for ultra-high-speed digital interfaces where capacitance, size, and clamping precision directly impact signal integrity and system-level EMC compliance.
FAQ
What is the maximum operating temperature for VBUS05L1-DD1-G-08?
The VBUS05L1-DD1-G-08 has a specified junction temperature range of -40 °C to +125 °C, enabling reliable operation in automotive cabin modules, industrial PLCs, and portable consumer devices. This rating is validated per JEDEC JESD22-A104 and confirmed in the Vishay datasheet Rev. 1.8. Thermal derating is not required up to +125 °C ambient when mounted per recommended pad layout.
Does VBUS05L1-DD1-G-08 require orientation-specific placement on PCB?
No - the VBUS05L1-DD1-G-08 is a bidirectional symmetrical (BiSy) device with identical electrical behavior on both terminals, so Pin 1 and Pin 2 are functionally interchangeable. The bar marking indicates pin 1 only for traceability; reversal does not affect ESD clamping performance or circuit functionality.
Can VBUS05L1-DD1-G-08 be used on 5 V tolerant I/O lines?
Yes - the VBUS05L1-DD1-G-08 has a ±5.5 V reverse stand-off voltage (VRWM), making it fully compatible with 5 V tolerant interfaces such as USB 2.0 VBUS monitoring lines, industrial I²C buses, and legacy parallel data paths. Its 7–9.5 V breakdown voltage ensures safe margin above 5.5 V working range.
What is the typical clamping voltage of VBUS05L1-DD1-G-08 at 1 A ESD current?
The VBUS05L1-DD1-G-08 delivers a typical clamping voltage of 11.5 V at 1 A peak pulse current (IPP), per its Electrical Characteristics table. At the full-rated 2 A IPPM, clamping remains ≤14 V - ensuring protected ICs stay well below their 16 V absolute maximum ratings during IEC 61000-4-2 events.
Is VBUS05L1-DD1-G-08 compliant with lead-free soldering standards?
Yes - the VBUS05L1-DD1-G-08 uses NiPdAu (e4) plating and is qualified for lead-free reflow per J-STD-020, with peak temperature tolerance up to 260 °C. Its MSL Level 1 rating means no moisture sensitivity handling or baking is required prior to assembly, simplifying manufacturing flow.
VBUS05L1-DD1-G-08 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- SOD-882
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 5.5V (Max)
- Voltage - Breakdown (Min):
- 7V
- Voltage - Clamping (Max) @ Ipp:
- 17V
- Current - Peak Pulse (10/1000µs):
- 2A (8/20µs)
- Power - Peak Pulse:
- 34W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 0.33pF @ 1MHz
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LLP1006-2M
VBUS05L1-DD1-G-08 FAQ
1.How can I place an order for VBUS05L1-DD1-G-08 through Aetrix?
Please submit a Request for Quotation (RFQ) for VBUS05L1-DD1-G-08 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for VBUS05L1-DD1-G-08 reliable?
The price and inventory of VBUS05L1-DD1-G-08 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for VBUS05L1-DD1-G-08 is usually 5 days.
3.What payment methods are accepted for VBUS05L1-DD1-G-08?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for VBUS05L1-DD1-G-08 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for VBUS05L1-DD1-G-08?
VBUS05L1-DD1-G-08 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your VBUS05L1-DD1-G-08 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for VBUS05L1-DD1-G-08?
For technical support, including VBUS05L1-DD1-G-08 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your VBUS05L1-DD1-G-08 requirements.
6.How does Aetrix verify that VBUS05L1-DD1-G-08 is sourced from the original manufacturer or authorized distributors?
All VBUS05L1-DD1-G-08 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that VBUS05L1-DD1-G-08 meets industry standards.
7.What is the process for return or replacement of VBUS05L1-DD1-G-08?
All VBUS05L1-DD1-G-08 units undergo pre-shipment inspection (PSI). If there is an issue with VBUS05L1-DD1-G-08, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The VBUS05L1-DD1-G-08 part is unused and in its original packaging.
Return procedure for VBUS05L1-DD1-G-08:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
VBUS05L1-DD1-G-08 Tags

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DESD3V3E1BL-7B
Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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ESD5Z5.0T1G
onsemi

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DESD5V0U1BB-7
Diodes Incorporated

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D12V0L1B2LP-7B
Diodes Incorporated

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PESD2V0Y1BSFYL
Nexperia USA Inc.

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Toshiba Semiconductor and Storage

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Diodes Incorporated
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