Vishay General Semiconductor - Diodes Division VGSOT04C-HG3-18
- Part No.:
- VGSOT04C-HG3-18
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
VGSOT04C-HG3-18.pdf
- Description:
- TVS DIODE 4VWM 14.3VC SOT23
- Quantity:
- Payment:

- Shipping:

Inventory:7,110
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
VGSOT04C-HG3-18 from Vishay Semiconductors is a two-line unidirectional ESD protection diode in SOT-23 package, featuring common-anode dual-channel configuration, ±30 kV IEC 61000-4-2/ISO 10605 ESD immunity, 4 V reverse stand-off voltage (VRWM), and 540 W peak pulse power (8/20 μs). It protects high-speed data lines such as USB 2.0 and HDMI interfaces against electrostatic discharge.
For engineers reviewing the VGSOT04C-HG3-18 datasheet, VGSOT04C-HG3-18 pinout, VGSOT04C-HG3-18 application, or VGSOT04C-HG3-18 equivalent, this page delivers verified electrical characteristics, BiAs-mode and BiSy-mode operation details, SOT-23 terminal mapping, AEC-Q101 qualification status, and real-world use-value analysis for automotive infotainment and industrial communication systems.
Technical Context
The VGSOT04C-HG3-18 implements a dual-diode common-anode structure enabling two-line unidirectional protection (BiAs mode) with asymmetric clamping: reverse breakdown at 5–7 V and forward clamping at ≤4.2 V under 40 A surge. It supports bidirectional symmetrical protection (BiSy mode) when pin 3 is left unconnected and pins 1–2 are used across a single line.
Its design meets AEC-Q101 Class H3B (>8 kV HBM) and operates from –55 °C to +150 °C junction temperature. The device exhibits 360–450 pF capacitance at 0 V bias (1 MHz), optimized for signal integrity in 480 Mbps USB 2.0 channels while maintaining low leakage (<20 μA at VR = 4 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Device Type | Two-line unidirectional ESD protection diode, common-anode dual-channel |
| VRWM | 4 V - maximum continuous reverse working voltage before conduction; sets upper limit for protected signal swing |
| VBR (min) | 5 V at IR = 1 mA - ensures reliable turn-on above normal operating voltage, preventing false triggering |
| VC @ IPPM | 10.3–13.5 V at 40 A (8/20 μs) - clamping voltage during worst-case surge; protects downstream ICs with <13.5 V tolerance |
| Capacitance | 360–450 pF at 0 V, 1 MHz - balances ESD robustness and signal integrity for USB 2.0 data rates |
| ESD Immunity | ±30 kV contact/air per IEC 61000-4-2 and ISO 10605 - exceeds Level 4 industrial and automotive requirements |
| AEC-Q101 | Qualified - validated for automotive applications including infotainment and body electronics |
Pinout & Package
SOT-23 package (JEDEC TO-236AB), 3-terminal surface-mount plastic case, MSL level 1, 9.2 mg weight, UL 94 V-0 flammability rating, peak reflow temperature 260 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Anode of Diode 1 | Connects to first protected signal line (L1); conducts transient current to ground during positive overvoltage |
| Pin 2 | Anode of Diode 2 | Connects to second protected signal line (L2); enables simultaneous dual-line protection in BiAs mode |
| Pin 3 | Common Cathode | Must be connected to system ground; provides shared return path for both diodes' surge current |
Key Features
| Feature | Design Value |
|---|---|
| BiAs-mode dual-line protection | Enables independent, coordinated clamping of two data lines (e.g., D+ and D−) with shared ground, reducing PCB routing complexity |
| Bidirectional symmetrical (BiSy) option | Supports single-line protection by using pins 1–2 only (pin 3 open), delivering matched ±15.7 V clamping at 40 A for balanced interfaces |
| Low forward clamping | VF ≤ 4.2 V at 40 A ensures negative transients clamp near ground, preserving logic-low margins in CMOS receivers |
| AEC-Q101 qualified | Validated for automotive under-hood and cabin environments, including thermal cycling and humidity exposure tests |
| e3 Sn termination | Lead-free matte tin plating compatible with RoHS and JEDEC J-STD-020 reflow profiles, eliminating lead-related reliability concerns |
Applications
| USB 2.0 Interface Protection | HDMI Data Lane Protection |
|---|---|
Use Scenario: Protecting D+ and D− differential pair in automotive USB host ports against ESD events during cable insertion. IC Role / Device Role / Timing Role: Dual-channel unidirectional clamp placed immediately before USB transceiver IC, referenced to chassis ground. Use Value: Maintains 480 Mbps signal integrity with 360–450 pF capacitance while limiting clamping voltage to ≤13.5 V, ensuring compliance with USB 2.0 receiver absolute maximum ratings. | Use Scenario: Safeguarding TMDS data channels in vehicle infotainment head units exposed to user-handling ESD. IC Role / Device Role / Timing Role: Common-cathode dual-diode placed on each TMDS+ and TMDS− line, grounded to system GND plane. Use Value: Delivers ±30 kV ESD immunity without degrading 165 MHz pixel clock timing due to controlled capacitance and sub-14 V clamping at full 40 A surge. |
| Automotive CAN FD Transceiver I/O | Industrial RS-485 Data Lines |
Use Scenario: Adding secondary ESD protection on CAN_H and CAN_L pins of AEC-Q100 qualified transceivers in ADAS domain controllers. IC Role / Device Role / Timing Role: Front-end guard device in BiAs configuration, positioned between connector and transceiver, with pin 3 tied to isolated CAN ground. Use Value: Withstands >8 kV HBM per AEC-Q101 and clamps transients below 13.5 V, preventing latch-up in 5 V-tolerant CAN FD PHYs during assembly and field operation. | Use Scenario: Hardening RS-485 half-duplex bus nodes in factory automation PLCs against maintenance-induced ESD. IC Role / Device Role / Timing Role: Dual-line protector on A and B differential lines, leveraging common cathode to minimize ground loop area and inductance. Use Value: Provides 40 A surge current handling (8/20 μs) and 540 W peak power dissipation, enabling robust operation in noisy industrial environments without derating at 85 °C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMA6J4.5A | Single-line unidirectional TVS; 4.5 V VRWM; 600 W PPPM; DO-214AC package | Requires two devices for dual-line protection; higher parasitic inductance due to larger package | Select when discrete layout flexibility is needed or when SOT-23 footprint is unavailable |
| TPD2E001DRSR | Two-line unidirectional ESD array; 5 V VRWM; 300 W PPPM; 0.65 mm pitch QFN-6 | Lower surge rating (12 A IPPM); smaller footprint but no AEC-Q101 qualification | Prefer for space-constrained consumer electronics where automotive qualification is not required |
Compared with SMA6J4.5A and TPD2E001DRSR, the VGSOT04C-HG3-18 uniquely combines dual-line SOT-23 integration, AEC-Q101 qualification, 40 A surge capability, and BiAs/BiSy mode flexibility-making it optimal for automotive and industrial dual-signal protection where board space, reliability, and standardized qualification are critical.
Availability
VGSOT04C-HG3-18 is available at Aetrix Electronics and suitable for automotive infotainment, industrial RS-485 networks, and USB 2.0 peripheral interfaces requiring stable component supply, long-term lifecycle support, and AEC-Q101-compliant ESD protection.
Supply support for VGSOT04C-HG3-18 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in high-reliability diodes, MOSFETs, optoelectronics, and protection devices for automotive, industrial, and computing markets.
The VGSOTxxC family was engineered specifically for compact, high-performance ESD protection of high-speed serial interfaces-including USB, HDMI, and automotive data buses-balancing low capacitance, precise clamping, and automotive-grade qualification in SOT-23.
FAQ
What is the maximum reverse working voltage (VRWM) of the VGSOT04C-HG3-18?
The VGSOT04C-HG3-18 has a maximum reverse working voltage (VRWM) of 4 V, specified at IR = 20 μA. This value defines the highest continuous DC or peak AC voltage the device can withstand in reverse bias without significant leakage, making it suitable for protecting 3.3 V logic and USB 2.0 signal lines where operating voltages remain below 4 V.
How does the VGSOT04C-HG3-18 support both BiAs-mode and BiSy-mode configurations?
The VGSOT04C-HG3-18 supports BiAs-mode (bidirectional asymmetric) by connecting pin 3 to ground and pins 1 and 2 to separate signal lines-enabling independent clamping with different forward/reverse thresholds. For BiSy-mode (bidirectional symmetrical), pin 3 is left unconnected and pins 1–2 are used across a single line, producing matched clamping in both polarities. Both modes are fully documented in the Vishay VGSOT04C-HG3-18 datasheet.
Is the VGSOT04C-HG3-18 qualified to AEC-Q101, and what does that mean for automotive use?
Yes, the VGSOT04C-HG3-18 is AEC-Q101 qualified, confirming it has passed stress tests including temperature cycling, humidity bias, mechanical shock, and human-body-model ESD (>8 kV). This qualification validates its suitability for automotive applications such as infotainment, telematics, and body control modules where reliability under extreme thermal and electrical conditions is mandatory.
What is the clamping voltage of the VGSOT04C-HG3-18 under a 40 A 8/20 μs surge?
Under a 40 A 8/20 μs surge current, the VGSOT04C-HG3-18 exhibits a reverse clamping voltage (VC) of 10.3–13.5 V, measured per IEC 61000-4-5. This clamping performance ensures downstream components-such as USB transceivers rated for ≤16 V absolute maximum-remain within safe operating limits during severe transient events.
Can the VGSOT04C-HG3-18 be used for bidirectional protection of a single data line?
Yes, the VGSOT04C-HG3-18 can protect a single data line in bidirectional symmetrical (BiSy) mode: connect the signal to pin 1, ground to pin 2 (or vice versa), and leave pin 3 unconnected. In this configuration, it delivers matched clamping for both polarities-e.g., 15.7–18.8 V at 40 A-making it suitable for RS-485, CAN, or other balanced interfaces requiring symmetrical transient suppression.
VGSOT04C-HG3-18 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 4V (Max)
- Voltage - Breakdown (Min):
- 5V
- Voltage - Clamping (Max) @ Ipp:
- 13.5V
- Current - Peak Pulse (10/1000µs):
- 40A (8/20µs)
- Power - Peak Pulse:
- 540W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- 360pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
VGSOT04C-HG3-18 FAQ
1.How can I place an order for VGSOT04C-HG3-18 through Aetrix?
Please submit a Request for Quotation (RFQ) for VGSOT04C-HG3-18 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for VGSOT04C-HG3-18 reliable?
The price and inventory of VGSOT04C-HG3-18 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for VGSOT04C-HG3-18 is usually 5 days.
3.What payment methods are accepted for VGSOT04C-HG3-18?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for VGSOT04C-HG3-18 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for VGSOT04C-HG3-18?
VGSOT04C-HG3-18 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your VGSOT04C-HG3-18 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for VGSOT04C-HG3-18?
For technical support, including VGSOT04C-HG3-18 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your VGSOT04C-HG3-18 requirements.
6.How does Aetrix verify that VGSOT04C-HG3-18 is sourced from the original manufacturer or authorized distributors?
All VGSOT04C-HG3-18 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that VGSOT04C-HG3-18 meets industry standards.
7.What is the process for return or replacement of VGSOT04C-HG3-18?
All VGSOT04C-HG3-18 units undergo pre-shipment inspection (PSI). If there is an issue with VGSOT04C-HG3-18, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The VGSOT04C-HG3-18 part is unused and in its original packaging.
Return procedure for VGSOT04C-HG3-18:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
VGSOT04C-HG3-18 Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

