Vishay General Semiconductor - Diodes Division VGSOT24C-G3-18
- Part No.:
- VGSOT24C-G3-18
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
VGSOT24C-G3-18.pdf
- Description:
- TVS DIODE 24VWM 47VC SOT23
- Quantity:
- Payment:

- Shipping:

Inventory:8,474
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Product details
Overview
VGSOT24C-G3-18 from Vishay Semiconductors is a two-line unidirectional ESD protection diode in SOT-23 package, featuring common-anode dual-channel configuration, 24 V reverse stand-off voltage (VRWM), ±30 kV IEC 61000-4-2 ESD immunity, and 400 W peak pulse power (8/20 μs). It protects high-speed data lines such as USB 2.0 and HDMI interfaces against electrostatic discharge.
For engineers reviewing the VGSOT24C-G3-18 datasheet, VGSOT24C-G3-18 pinout, VGSOT24C-G3-18 application, or VGSOT24C-G3-18 equivalent, key selection criteria include VRWM = 24 V, clamping voltage ≤46 V at 8.4 A, low 65–80 pF capacitance at 0 V, AEC-Q101 qualification, and SOT-23 footprint compatibility with space-constrained PCB layouts.
Technical Context
The VGSOT24C-G3-18 implements BiAs-MODE (Bidirectional Asymmetrical) protection when pin 3 is grounded and pins 1 & 2 connect to protected signal lines-enabling independent clamping of positive transients via reverse breakdown (VBR = 27–33 V) and negative transients via forward conduction (VF ≤1.7 V at 8.4 A). Its dual-diode common-anode structure supports two-line protection without shared cathodes.
In BiSy-MODE (single-line bidirectional symmetrical), pins 1 and 2 form a bipolar path with pin 3 left open, delivering matched clamping for ± transients (VRWM = 24.5 V, VC ≤48 V at 8.4 A). Both modes operate across –55 °C to +150 °C junction temperature with MSL level 1 soldering compatibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 24 V - Maximum continuous working voltage before clamping begins; sets upper limit for safe operation on 24 V nominal data/power rails. |
| VBR (min/typ/max) | 27 / 30 / 33 V - Reverse breakdown threshold at 1 mA; defines onset of transient shunting and impacts system-level overvoltage margin. |
| VC @ IPPM | ≤46 V at 8.4 A (8/20 μs) - Peak clamping voltage during worst-case surge; ensures downstream ICs see <46 V stress under IEC 61000-4-5 conditions. |
| CD @ 0 V | 65–80 pF - Signal-line capacitance at zero bias; enables use on 480 Mbps USB 2.0 without significant eye degradation. |
| ESD immunity | ±30 kV contact/air (IEC 61000-4-2 & ISO 10605) - Full compliance with industrial and automotive ESD robustness requirements. |
| TJ max | +150 °C - Supports operation in under-hood automotive environments and thermally dense industrial PCBs. |
| AEC-Q101 | Qualified - Validated for automotive electronics per stress test requirements including HBM >8 kV (Class H3B). |
Pinout & Package
SOT-23 package (JEDEC TO-236AB), 3-pin, e3 Sn-plated terminations, 9.2 mg weight, UL 94 V-0 molding compound, MSL level 1, peak reflow ≤260 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Anode of Diode 1 | Connects to first protected signal line (L1); forms one half of dual-channel ESD path to ground. |
| Pin 2 | Anode of Diode 2 | Connects to second protected signal line (L2); shares common cathode (Pin 3) with Diode 1 for compact layout. |
| Pin 3 | Common Cathode | Must be connected to system ground; provides return path for both ESD current channels in BiAs mode. |
Key Features
| Feature | Design Value |
|---|---|
| Two-line unidirectional protection | Dual-channel SOT-23 saves board space vs. two discrete diodes while maintaining independent line protection integrity. |
| BiAs-MODE asymmetry | Enables precise clamping: positive transients clamped at ~37.5 V (reverse), negatives clamped near 0 V (forward VF ≤1.7 V). |
| Low capacitance (65–80 pF) | Preserves signal integrity on 480 Mbps USB 2.0 and other high-speed digital interfaces without added jitter or rise-time degradation. |
| AEC-Q101 qualification | Validated for automotive infotainment, ADAS camera links, and body control modules requiring long-term reliability under thermal cycling and humidity. |
| ±30 kV ESD immunity | Exceeds IEC 61000-4-2 Level 4 and ISO 10605 requirements, eliminating need for secondary ESD staging in end-equipment design. |
Applications
| USB 2.0 Interface Protection | HDMI Data Lane Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines of a USB 2.0 host port exposed to user-handling ESD events in industrial docking stations. IC Role / Device Role / Timing Role: Dual-channel unidirectional clamp placed directly at connector, with Pin 3 grounded and Pins 1/2 tied to D+/D−. Use Value: Limits transient voltage to ≤46 V during 8.4 A surges, preserving USB PHY functionality while adding only 65–80 pF loading per line. | Use Scenario: Safeguarding TMDS clock and data pairs in an automotive infotainment head unit HDMI receiver. IC Role / Device Role / Timing Role: One VGSOT24C-G3-18 per differential pair (e.g., Clock+, Clock−), configured in BiAs mode with common cathode to chassis ground. Use Value: Maintains HDMI 1.4 signal fidelity up to 2.25 Gbps by holding inter-pair capacitance mismatch <5 pF and clamping ESD to <46 V. |
| Automotive Camera Link (FPD-Link III) | Industrial RS-485 Transceiver Port |
Use Scenario: ESD hardening of serializer/deserializer links between rear-view camera and display module in vehicles. IC Role / Device Role / Timing Role: Placed at FPD-Link III differential inputs (CLK+, DATA+) with Pin 3 grounded; leverages 24 V VRWM to match supply-referenced signaling. Use Value: Survives repeated ±30 kV contact discharges without latch-up or parameter shift, validated per AEC-Q101 for 15-year automotive service life. | Use Scenario: Protecting RS-485 transceiver A/B terminals in factory automation PLC I/O modules subject to cable-induced surges. IC Role / Device Role / Timing Role: Used in BiSy mode (Pin 3 open, Pins 1–2 across A–B) to provide symmetrical ±24.5 V standoff and matched clamping for differential bus faults. Use Value: Delivers 48 V max clamping at 8.4 A while maintaining <40 pF capacitance-preventing false triggering and preserving 10 Mbps data rate integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMA6J24A-Q | Single-line unidirectional TVS; 24 V VRWM, 600 W PPPM (8/20 μs), higher 100 pF capacitance. | Requires two devices for dual-line protection; larger SMA package increases board area vs. SOT-23. | Select when higher surge rating (600 W) is mandatory and board space allows discrete placement. |
| TPD2E001DRYR | Two-line unidirectional ESD array; 5 V VRWM, 30 kV ESD, 12 pF capacitance, but lower voltage rating. | Not suitable for 24 V systems; optimized for 3.3 V/5 V logic, not industrial 24 V data lines. | Prefer for low-voltage high-speed interfaces (e.g., I²C, GPIO) where capacitance <15 pF is critical. |
Compared with SMA6J24A-Q and TPD2E001DRYR, the VGSOT24C-G3-18 uniquely balances 24 V system compatibility, dual-line integration in SOT-23, 65–80 pF capacitance, and AEC-Q101 qualification-making it optimal for space-constrained 24 V automotive and industrial data links.
Availability
VGSOT24C-G3-18 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, automotive camera links, and industrial RS-485 transceiver ports requiring stable component supply across multi-year production cycles.
Supply support for VGSOT24C-G3-18 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Semiconductors is a global leader in discrete semiconductors, specializing in high-reliability diodes, MOSFETs, optoelectronics, and passive components for automotive, industrial, and computing markets.
The VGSOTxxC family was engineered specifically for high-density, high-speed data line ESD protection-delivering scalable VRWM (3.3 V to 36 V), AEC-Q101 qualification, and BiAs/BiSy dual-mode flexibility in standardized SOT-23 packaging.
FAQ
What is the maximum reverse working voltage (VRWM) of the VGSOT24C-G3-18?
The VGSOT24C-G3-18 has a maximum reverse working voltage (VRWM) of 24 V, verified per Vishay's electrical characteristics table for BiAs-MODE operation with pin 3 grounded. This value defines the highest continuous DC or peak AC voltage the device tolerates without entering breakdown-critical for protecting 24 V nominal data lines like industrial RS-485 or CAN FD physical layers. The VGSOT24C-G3-18 maintains <1 μA leakage at this voltage.
Can the VGSOT24C-G3-18 be used in bidirectional protection mode?
Yes, the VGSOT24C-G3-18 supports bidirectional protection via BiSy-MODE: leave pin 3 unconnected and use pins 1 and 2 across a single signal line (e.g., RS-485 A–B). In this configuration, VRWM rises to 24.5 V, and clamping remains symmetrical (≤48 V at 8.4 A). This mode is confirmed in Vishay's datasheet section "BiSy-MODE (1-line bidirectional symmetrical protection mode)" and enables single-device protection for differential buses without polarity constraints.
What is the peak pulse power rating of the VGSOT24C-G3-18?
The VGSOT24C-G3-18 delivers 400 W peak pulse power (PPP) under IEC 61000-4-5 8/20 μs waveform conditions, measured at 8.4 A peak pulse current. This rating is specified in the "ABSOLUTE MAXIMUM RATINGS" table for VGSOT24C and reflects its ability to absorb transient energy without failure. For longer 10/1000 μs surges, the rating drops to 44 W-important for lightning-induced surge coordination in industrial power supplies.
Is the VGSOT24C-G3-18 qualified for automotive applications?
Yes, the VGSOT24C-G3-18 is AEC-Q101 qualified, meeting stress test requirements for automotive electronics including human body model (HBM) ESD >8 kV (Class H3B), temperature cycling, and high-temperature operating life. Vishay explicitly lists AEC-Q101 qualification in the "FEATURES" section and "PACKAGE DATA" table, confirming suitability for infotainment, ADAS camera links, and body control modules where extended temperature range (–55 °C to +150 °C) and long-term reliability are mandatory.
What is the typical capacitance of the VGSOT24C-G3-18 at 0 V bias?
The VGSOT24C-G3-18 exhibits 65–80 pF typical capacitance at 0 V reverse bias and 1 MHz, as documented in the "ELECTRICAL CHARACTERISTICS" table for VGSOT24C (BiAs-MODE). This low, controlled capacitance enables deployment on high-speed interfaces like USB 2.0 (480 Mbps) without degrading signal rise time or causing bit errors-verified by Vishay's Fig. 9 (Capacitance vs. Reverse Voltage) showing <80 pF across 0–12 V.
VGSOT24C-G3-18 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 24V (Max)
- Voltage - Breakdown (Min):
- 27V
- Voltage - Clamping (Max) @ Ipp:
- 46V
- Current - Peak Pulse (10/1000µs):
- 8.4A (8/20µs)
- Power - Peak Pulse:
- 400W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 65pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
VGSOT24C-G3-18 FAQ
1.How can I place an order for VGSOT24C-G3-18 through Aetrix?
Please submit a Request for Quotation (RFQ) for VGSOT24C-G3-18 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for VGSOT24C-G3-18 reliable?
The price and inventory of VGSOT24C-G3-18 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for VGSOT24C-G3-18 is usually 5 days.
3.What payment methods are accepted for VGSOT24C-G3-18?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for VGSOT24C-G3-18 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for VGSOT24C-G3-18?
VGSOT24C-G3-18 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your VGSOT24C-G3-18 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for VGSOT24C-G3-18?
For technical support, including VGSOT24C-G3-18 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your VGSOT24C-G3-18 requirements.
6.How does Aetrix verify that VGSOT24C-G3-18 is sourced from the original manufacturer or authorized distributors?
All VGSOT24C-G3-18 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that VGSOT24C-G3-18 meets industry standards.
7.What is the process for return or replacement of VGSOT24C-G3-18?
All VGSOT24C-G3-18 units undergo pre-shipment inspection (PSI). If there is an issue with VGSOT24C-G3-18, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The VGSOT24C-G3-18 part is unused and in its original packaging.
Return procedure for VGSOT24C-G3-18:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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