Nexperia USA Inc. 2N7002PV,115

Overview

2N7002PV,115 from Nexperia is a dual N-channel enhancement-mode Trench MOSFET in SOT666 package, rated for 60 V drain-source voltage and 350 mA continuous drain current per transistor at 25 °C. It features logic-level gate drive (V_GS(th) = 1.1–2.4 V), low R_DS(on) of 1.0 Ω @ V_GS = 10 V, and fast switching (t_d(on) = 3–6 ns, t_f = 5 ns), enabling use in compact low-side loadswitch and high-speed line driver circuits.

For engineers reviewing the 2N7002PV,115 datasheet, 2N7002PV,115 pinout, 2N7002PV,115 application, or 2N7002PV,115 equivalent, key selection criteria include dual-channel integration in ultra-small SOT666, thermal resistance of 330 K/W (junction-to-ambient, FR4 PCB), normalized R_DS(on) stability up to 125 °C, and gate charge of 0.6–0.8 nC for efficient PWM control in space-constrained DC-DC and I/O interface designs.

Technical Context

This dual MOSFET integrates two independent N-channel Trench devices sharing no internal connection-each with isolated source, gate, and drain terminals. Its trench process enables low threshold voltage dispersion (1.1–2.4 V) and stable sub-threshold conduction, supporting reliable logic-level operation down to 2.5 V supply rails.

The device exhibits symmetrical dynamic characteristics: C_iss = 30–50 pF, C_oss = 7 pF, and Cr_ss = 4 pF at V_DS = 10 V, enabling predictable switching behavior in high-frequency (<1 MHz) digital switching applications without external gate damping.

Key Specifications

Pinout & Package

SOT666 plastic surface-mount package: 6-pin, 0.5 mm pitch, 1.6 mm × 1.2 mm × 0.55 mm body, single-sided FR4 PCB mount with 1 cm² drain thermal pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual N-channel MOSFET applications.

Compared with DMN2041LSD-13, the 2N7002PV,115 trades lower R_DS(on) for higher voltage capability and smaller footprint; versus NTJD4152PZ, it provides true low-side N-channel functionality without logic inversion or reduced voltage margin.

Availability

2N7002PV,115 is available at Aetrix Electronics and suitable for relay drivers, high-speed line drivers, low-side loadswitches, and switching circuit applications requiring stable component supply, consistent parametric performance, and long-term production continuity.

Supply support for 2N7002PV,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified and industrial-grade MOSFETs, ESD protection, and logic families.

The 2N7002PV belongs to Nexperia's TrenchMOS dual discrete portfolio, engineered for space-constrained digital interface and power management functions where dual-channel integration, logic-level drive, and thermal efficiency are critical.

FAQ

What is the maximum continuous drain current per transistor at 100 °C ambient?

The 2N7002PV,115 supports 250 mA continuous drain current per transistor at T_amb = 100 °C, as specified in Table 5 (Limiting Values). This derating reflects thermal resistance of 330 K/W on FR4 PCB with 1 cm² drain pad, resulting in ~82.5 °C junction rise above ambient at full current.

Can the two transistors share a common source connection?

No-the S1 and S2 terminals are physically and electrically isolated. Each transistor has its own dedicated source, gate, and drain. To implement a common-source configuration, external PCB traces must connect S1 and S2; no internal bondwire or die interconnect exists between them.

Is the 2N7002PV,115 suitable for PWM motor control?

Yes-for low-power brushed DC motors drawing ≤300 mA per channel. Its 5 ns fall time, 0.8 nC gate charge, and 60 V rating support PWM frequencies up to 500 kHz. However, thermal limits require careful layout: 1 cm² copper pour under drain pads and minimal trace inductance to avoid voltage spikes during switching.

What is the safe operating area (SOA) limitation at 25 °C ambient?

At T_amb = 25 °C, the SOA is defined by continuous 350 mA (DC, drain pad 1 cm²) or peak 1.2 A (10 µs pulse), as shown in Figure 3. Operation beyond these boundaries risks thermal runaway or avalanche failure; sustained 500 mA pulses require strict duty cycle control (<1 %) to stay within P_tot = 330 mW limit.