Nexperia USA Inc. BUK7K5R6-30E,115

Overview

BUK7K5R6-30E from Nexperia is a dual N-channel standard-level MOSFET in LFPAK56D (SOT1205) package, rated for 30 V drain-source voltage, 5.6 mΩ R_DS(on) at 10 V_GS/20 A/25 °C, and qualified to AEC-Q101 for automotive use. It delivers 40 A continuous drain current at T_mb = 25 °C and supports thermally demanding applications up to 175 °C junction temperature.

For engineers reviewing the BUK7K5R6-30E datasheet, BUK7K5R6-30E pinout, BUK7K5R6-30E application, or BUK7K5R6-30E equivalent, this device is selected for high-reliability 12 V automotive power switching where dual-channel integration, repetitive avalanche capability, and true standard-level gate drive (V_GS(th) > 1 V at 175 °C) are critical design requirements.

Technical Context

This dual MOSFET integrates two independent N-channel TrenchMOS devices in a single LFPAK56D package, sharing no internal connection between channels-each FET has dedicated source, gate, and drain terminals. Its standard-level gate enables direct drive from 3.3 V or 5 V microcontrollers without level-shifting, while the 175 °C rating and 228 mJ single-pulse avalanche energy support robust operation in under-hood environments.

The device exhibits matched static and dynamic characteristics across both FETs: typical R_DS(on) of 4.76 mΩ at 25 °C rising to 8.3 mΩ at 175 °C, Q_GD of 9.5 nC, and C_iss of 1477–1969 pF. Thermal resistance from junction to mounting base is 2.36 K/W, enabling high-power density when soldered to a thermally optimized PCB pad.

Key Specifications

Pinout & Package

Package: LFPAK56D (SOT1205), 8-lead plastic surface-mount package with exposed copper mounting base for low thermal resistance (R_th(j-mb) = 2.36 K/W). Dimensions: 4.70 × 3.50 × 1.30 mm (L × W × H), with dual drain pads (pins 5/6 and 7/8) electrically common per channel.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual N-channel automotive MOSFET applications.

Compared with STL220N3LLH6 and NTMFS5C675NL, the BUK7K5R6-30E uniquely combines AEC-Q101 qualification, dual-channel integration in LFPAK56D, and guaranteed V_GS(th) > 1 V at 175 °C - making it optimal for space-constrained, thermally aggressive automotive power nodes where reliability and gate-drive simplicity are non-negotiable.

Availability

BUK7K5R6-30E is available at Aetrix Electronics and suitable for automotive transmission control, HVAC blower motor management, and engine start-stop system load switching requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for Tier-1 production programs.

Supply support for BUK7K5R6-30E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency-enhancing components, with leadership in MOSFETs, diodes, ESD protection, and logic ICs for automotive, industrial, and consumer markets.

The BUK7K5R6-30E belongs to Nexperia's AEC-Q101-qualified TrenchMOS automotive power portfolio, engineered specifically for high-reliability 12 V power distribution and actuator control in harsh under-hood environments.

FAQ

Is BUK7K5R6-30E suitable for high-frequency PWM applications above 100 kHz?

Yes - its 9.5 nC Q_GD, 10 ns rise time, and 12.9 ns fall time support efficient switching up to 250 kHz in automotive motor control. However, gate drive strength must deliver ≥2 A peak current to achieve specified timing; layout must minimize gate loop inductance to avoid oscillation.

Can the two channels be paralleled to increase current capacity?

No - the channels are electrically isolated with separate sources and gates; paralleling would require matched gate drive, current-sharing resistors, and thermal coupling to prevent imbalance. The device is designed for independent channel operation, not current stacking.

What is the maximum allowable PCB copper area for optimal thermal performance?

For R_th(j-mb) = 2.36 K/W, Nexperia recommends a minimum 200 mm² exposed copper pad (20 mm × 10 mm) connected via ≥8 thermal vias (0.3 mm diameter) to inner ground planes. Larger pads further reduce R_th(j-a) but yield diminishing returns beyond 400 mm².

Does BUK7K5R6-30E include integrated ESD protection on gate terminals?

Yes - each gate features built-in HBM ESD protection rated to ±2 kV (per JESD22-A114), verified during AEC-Q101 qualification. This eliminates need for external gate Zener clamps in most automotive PCB layouts, though layout best practices (short gate traces, local decoupling) remain essential.