Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Renesas HAF1002-90STL-E

Name: HAF1002-90STL-E
Brand: Renesas
SKU: HAF1002-90STL-E
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: HAF1002-90STL-E

Manufacturer:: Renesas

Category:: FETs, MOSFETs

Package:: SC-83

Datasheet:: HAF1002-90STL-E.pdf

Description:: MOSFET P-CH 60V 15A 4LDPAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,114

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

HAF1002-90STL-E from Renesas Electronics is a P-channel logic-level power MOSFET designed for high-reliability load switching in industrial and automotive subsystems. It features –60 V V_DSS, 70–90 mΩ R_DS(on) at –10 V V_GS, built-in overtemperature shutdown (latch-type, T_sd = 175 °C), and –15 A continuous drain current - enabling robust short-circuit protection in 12–24 V DC power distribution modules.

For engineers reviewing the HAF1002-90STL-E datasheet, HAF1002-90STL-E pinout, HAF1002-90STL-E application, or HAF1002-90STL-E equivalent, this device is selected for thermally demanding, high-availability DC load control where gate drive simplicity (–4 to –6 V logic-compatible), thermal fault containment, and low conduction loss are critical design requirements.

Technical Context

This MOSFET integrates a junction temperature-sensing circuit directly into the gate region, triggering irreversible latch-type shutdown when channel temperature reaches 175 °C - requiring full gate voltage removal (0 V recovery) to reset. Its LDPAK (L) package provides enhanced thermal resistance (θ_ch–c = 2.50 °C/W) and supports surface-mount assembly with exposed drain pad for heatsinking.

The device operates as a high-side switch with four terminals: Gate (G), two paralleled Drains (D1/D2), and Source (S). Its static R_DS(on) is specified at –7.5 A and –4 V or –10 V V_GS, and its body diode exhibits V_DF = –1.0 V at –15 A, supporting bidirectional current handling in regenerative or flyback scenarios.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DSS	–60 V - Withstands up to –60 V drain-to-source voltage, suitable for 24 V automotive and industrial bus systems with transient margin.
R_DS(on)	70–90 mΩ at –10 V V_GS - Enables <1.1 W conduction loss at –10 A, reducing thermal stress in compact PCB layouts.
T_sd	175 °C - Thermal shutdown activates before silicon damage, protecting against sustained overload or cooling failure.
I_D	–15 A continuous - Supports high-current loads such as solenoids, motors, or lighting arrays without external current limiting.
V_GS(th)	–1.1 to –2.25 V - Ensures reliable turn-on with standard microcontroller GPIOs or level-shifted logic drivers.
Q_g	Not specified - Gate charge not provided in source documentation; design must rely on timing data (t_d(on) = 7.5 µs, t_f = 29 µs).
C_oss	610 pF at –10 V V_DS - Influences switching loss and EMI in hard-switched topologies; impacts snubber design.

Pinout & Package

Package: LDPAK (L), JEITA code SC-83, Renesas code PRSS0004AE-A - thermally optimized surface-mount package with exposed drain pad for direct PCB copper thermal spreading.

Pin/Terminal	Circuit Role	Design Meaning
1 (Gate)	Control input	Accepts –4 to –6 V logic-level drive; internal latch circuit disables conduction above 175 °C junction temperature.
2 (Drain)	Main current path (high-side)	Paralleled with Pin 4; connects to positive supply rail; exposed pad is electrically tied to Drain for thermal management.
3 (Source)	Reference node / load return	Connects to load; defines gate-source bias; requires stable low-impedance path to ground or common reference.
4 (Drain)	Main current path (high-side)	Electrically identical to Pin 2; used to distribute current and improve thermal coupling to PCB copper area.

Key Features

Feature	Design Value
Logic-level gate drive	Operates fully enhanced with –4 to –6 V V_GS, eliminating need for dedicated high-side gate drivers in 3.3 V/5 V control systems.
Latch-type thermal shutdown	Irreversible shutdown at 175 °C junction temperature; requires gate voltage removal to reset - prevents repeated fault cycling.
High short-circuit endurance	Withstands >1 ms overload events (e.g., motor stall, wiring fault) before shutdown, verified per load-short test waveforms.
Low R_DS(on) at low V_GS	100–130 mΩ at –4 V V_GS enables usable conduction even under marginal gate drive conditions.
Integrated temperature sensing	Sensing circuit embedded in gate structure - no external thermistor or monitoring IC required for thermal protection.

Applications

Automotive Body Control Module (BCM)	Industrial PLC Output Stage
Use Scenario: Controlling door locks, seat heaters, or trunk release actuators from a 12 V battery-fed BCM. IC Role / Device Role / Timing Role: High-side load switch managing up to –15 A resistive/inductive loads with integrated thermal fault response. Use Value: Eliminates need for discrete thermal sensor and comparator; latch behavior prevents repeated actuator engagement during jamming faults.	Use Scenario: Driving 24 V solenoid valves or indicator lamps in factory automation I/O modules. IC Role / Device Role / Timing Role: Solid-state replacement for electromechanical relays, providing faster switching and longer lifetime. Use Value: 70 mΩ R_DS(on) reduces heat generation vs. relay coils; built-in shutdown avoids field failures due to ambient overheating.
Server Power Distribution Unit (PDU)	Medical Diagnostic Equipment Power Sequencing
Use Scenario: Hot-swap control of redundant 48 V DC–DC converter outputs in telecom/datacom rack PDUs. IC Role / Device Role / Timing Role: High-side OR-ing switch with overtemperature fail-safe for system-level power integrity. Use Value: 175 °C shutdown threshold aligns with IPC-2221B Class 2 thermal limits; LDPAK package supports forced-air cooling.	Use Scenario: Controlled power-up sequencing of imaging sensor subassemblies in ultrasound or X-ray systems. IC Role / Device Role / Timing Role: Precision-controlled enable switch ensuring strict voltage ramp timing and fault isolation. Use Value: Low V_GS(th) ensures predictable turn-on across temperature; latch shutdown prevents unintended reactivation during thermal excursions.

Automotive Body Control Module (BCM)

Industrial PLC Output Stage

Use Scenario: Controlling door locks, seat heaters, or trunk release actuators from a 12 V battery-fed BCM.

IC Role / Device Role / Timing Role: High-side load switch managing up to –15 A resistive/inductive loads with integrated thermal fault response.

Use Value: Eliminates need for discrete thermal sensor and comparator; latch behavior prevents repeated actuator engagement during jamming faults.

Use Scenario: Driving 24 V solenoid valves or indicator lamps in factory automation I/O modules.

IC Role / Device Role / Timing Role: Solid-state replacement for electromechanical relays, providing faster switching and longer lifetime.

Use Value: 70 mΩ R_DS(on) reduces heat generation vs. relay coils; built-in shutdown avoids field failures due to ambient overheating.

Server Power Distribution Unit (PDU)

Medical Diagnostic Equipment Power Sequencing

Use Scenario: Hot-swap control of redundant 48 V DC–DC converter outputs in telecom/datacom rack PDUs.

IC Role / Device Role / Timing Role: High-side OR-ing switch with overtemperature fail-safe for system-level power integrity.

Use Value: 175 °C shutdown threshold aligns with IPC-2221B Class 2 thermal limits; LDPAK package supports forced-air cooling.

Use Scenario: Controlled power-up sequencing of imaging sensor subassemblies in ultrasound or X-ray systems.

IC Role / Device Role / Timing Role: Precision-controlled enable switch ensuring strict voltage ramp timing and fault isolation.

Use Value: Low V_GS(th) ensures predictable turn-on across temperature; latch shutdown prevents unintended reactivation during thermal excursions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar P-channel high-side switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Infineon BUK9Y2R5-40E	–40 V V_DSS, 2.5 mΩ R_DS(on), no integrated thermal shutdown	Lower voltage rating; suited for 5–12 V systems only; requires external thermal monitoring	Select when ultra-low R_DS(on) and higher efficiency outweigh need for self-protection.
Vishay SQJ852EP	–60 V V_DSS, 11.5 mΩ R_DS(on), thermal shutdown via external circuit (not built-in)	Higher performance in conduction loss but lacks monolithic latch-type protection; needs additional components	Choose for designs prioritizing minimal on-resistance and willing to implement discrete thermal management.

Compared with HAF1002-90STL-E, BUK9Y2R5-40E offers lower R_DS(on) but cannot replace it in 24 V systems due to its –40 V rating, while SQJ852EP delivers superior conduction efficiency yet increases BOM count and layout complexity by requiring external shutdown logic.

Availability

HAF1002-90STL-E is available at Aetrix Electronics and suitable for automotive body electronics, industrial programmable logic controllers, and medical diagnostic equipment requiring stable component supply and long-term production continuity.

Supply support for HAF1002-90STL-E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and SoC solutions for automotive, industrial, and infrastructure markets.

The HAF1002-90STL-E belongs to Renesas' Silicon P-Channel MOS FET Series targeting high-reliability DC power switching - engineered for applications demanding intrinsic thermal safety, logic-level drivability, and rugged short-circuit tolerance without external protection circuitry.

FAQ

What is the gate threshold voltage range for HAF1002-90STL-E?

The HAF1002-90STL-E has a gate-to-source cutoff voltage (V_GS(off)) of –1.1 V to –2.25 V, measured at I_D = –1 mA and V_DS = –10 V. This confirms logic-level compatibility: the device turns on fully with –4 to –6 V gate drive, making it suitable for direct interfacing with 3.3 V or 5 V microcontroller outputs without level-shifting circuitry.

Does HAF1002-90STL-E support high-side switching configurations?

Yes, HAF1002-90STL-E is explicitly designed as a high-side P-channel MOSFET switch. Its four-terminal LDPAK (L) package includes two paralleled Drain pins (Pins 2 and 4) and one Source pin (Pin 3), enabling connection to the positive rail with load referenced to ground - ideal for battery disconnect, power sequencing, and reverse-polarity protection circuits.

How does the thermal shutdown function in HAF1002-90STL-E?

HAF1002-90STL-E incorporates a monolithic overtemperature shutdown circuit that latches off the gate when junction temperature reaches 175 °C. Unlike resettable thermal protection, this is a latch-type mechanism: the device remains off until gate voltage is fully removed (0 V applied), then reapplied. This prevents uncontrolled cycling during sustained overload or cooling failure.

What is the R_DS(on) value of HAF1002-90STL-E at –4 V gate drive?

At –4 V V_GS and –7.5 A I_D, the HAF1002-90STL-E exhibits a static drain-to-source on-resistance of 100–130 mΩ. This value is confirmed in the Electrical Characteristics table under "Static drain to source on state resistance" and reflects real-world performance under typical logic-level drive conditions - critical for estimating conduction losses in low-voltage control systems.

Is HAF1002-90STL-E RoHS compliant and lead-free?

Yes, HAF1002-90STL-E complies with the EU RoHS Directive and is lead-free. Renesas Electronics confirms environmental compliance in official product documentation and specifies adherence to controlled-substance regulations. The device uses matte tin plating on terminations and meets JEDEC J-STD-020 moisture sensitivity level (MSL) requirements for surface-mount assembly.

HAF1002-90STL-E Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: -

Package/Case:: SC-83

Packaging:: Tape & Reel (TR)

Product Status:: Active

FET Type:: P-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 60 V

Current - Continuous Drain (Id) @ 25°C:: 15A (Ta)

Drive Voltage (Max Rds On, Min Rds On):: 4V, 10V

Rds On (Max) @ Id, Vgs:: 90mOhm @ 7.5A, 10V

Vgs(th) (Max) @ Id:: -

Gate Charge (Qg) (Max) @ Vgs:: -

Vgs (Max):: +3V, -16V

Input Capacitance (Ciss) (Max) @ Vds:: -

FET Feature:: -

Power Dissipation (Max):: 50W (Tc)

Operating Temperature:: 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: LDPAK

HAF1002-90STL-E FAQ

1.How can I place an order for HAF1002-90STL-E through Aetrix?

Please submit a Request for Quotation (RFQ) for HAF1002-90STL-E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for HAF1002-90STL-E reliable?

The price and inventory of HAF1002-90STL-E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for HAF1002-90STL-E is usually 5 days.

3.What payment methods are accepted for HAF1002-90STL-E?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for HAF1002-90STL-E transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for HAF1002-90STL-E?

HAF1002-90STL-E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your HAF1002-90STL-E order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for HAF1002-90STL-E?

For technical support, including HAF1002-90STL-E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your HAF1002-90STL-E requirements.

6.How does Aetrix verify that HAF1002-90STL-E is sourced from the original manufacturer or authorized distributors?

All HAF1002-90STL-E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that HAF1002-90STL-E meets industry standards.

7.What is the process for return or replacement of HAF1002-90STL-E?

All HAF1002-90STL-E units undergo pre-shipment inspection (PSI). If there is an issue with HAF1002-90STL-E, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The HAF1002-90STL-E part is unused and in its original packaging.

Return procedure for HAF1002-90STL-E:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…