Vishay Siliconix IRF9Z14LPBF
- Part No.:
- IRF9Z14LPBF
- Manufacturer:
- Vishay Siliconix
- Category:
- FETs, MOSFETs
- Package:
- TO-262-3 Long Leads, I2PAK, TO-262AA
- Datasheet:
-
IRF9Z14LPBF.pdf
- Description:
- MOSFET P-CH 60V 6.7A I2PAK
- Quantity:
- Payment:

- Shipping:

Inventory:5,845
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
IRF9Z14LPBF from Vishay Siliconix is a P-channel enhancement-mode power MOSFET in low-profile through-hole I2PAK (TO-262) package, rated for -60 V VDS, 0.50 Ω RDS(on) at VGS = -10 V, 6.7 A continuous drain current at TC = 25 °C, fully avalanche rated, and qualified for operation up to +175 °C junction temperature - used in DC-DC synchronous buck converters and high-side load switches.
For engineers reviewing the IRF9Z14LPBF datasheet, IRF9Z14LPBF pinout, IRF9Z14LPBF application, or IRF9Z14LPBF equivalent, this page delivers verified electrical parameters, thermal performance data, real-world switching behavior (td(on) = 11 ns, tf = 31 ns), body diode recovery specs (trr = 80–160 ns), and validated alternative parts for industrial power management designs.
Technical Context
This device employs Vishay's third-generation silicon process to achieve low on-resistance per die area while maintaining ruggedness against repetitive avalanche stress (EAR = 4.3 mJ). Its gate threshold voltage range of -2.0 V to -4.0 V ensures reliable turn-on with standard -10 V gate drive and supports partial logic-level compatibility down to -5 V.
The integrated body diode exhibits VSD = -5.5 V at IS = -6.7 A and controlled reverse recovery (Qrr = 96–190 nC), enabling use in freewheeling paths without external Schottky supplementation in moderate-frequency SMPS. Thermal resistance RthJC = 3.5 °C/W enables high-power dissipation when mounted on heatsinked PCBs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | -60 V - Maximum blocking voltage in high-side switch or reverse polarity protection circuits |
| RDS(on) @ VGS = -10 V | 0.50 Ω - Enables ≤3.4 W conduction loss at 6.7 A, suitable for 12 V input systems |
| ID Continuous @ TC = 25 °C | -6.7 A - Sustained current capability with adequate heatsinking in I2PAK through-hole layout |
| Qg Total Gate Charge | 12 nC - Determines gate driver power requirement and switching speed in hard-switched topologies |
| tr / tf | 63 ns / 31 ns - Fast edge rates support >100 kHz PWM operation with minimal switching loss |
| EAS Single-Pulse Avalanche Energy | 140 mJ - Withstands unclamped inductive turn-off events without failure in motor drive or solenoid control |
| TJ Operating Range | -55 °C to +175 °C - Validated for under-hood automotive and industrial ambient environments |
Pinout & Package
I2PAK (TO-262) low-profile through-hole package with isolated tab (drain-connected), optimized for manual assembly and thermal relief via copper pour on PCB backside.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| G (Gate) | Control electrode | Accepts negative voltage relative to source to induce P-channel conduction; requires ≥20 VGS rating on driver |
| D (Drain) | Main current sink | Internally connected to metal tab; must be electrically isolated from heatsink unless referenced to system ground |
| S (Source) | Reference node for gate drive and current return | Common connection point for gate resistor, driver return path, and load current reference in high-side configuration |
Key Features
| Feature | Design Value |
|---|---|
| Fully avalanche rated | Withstands 140 mJ single-pulse and 4.3 mJ repetitive avalanche energy without degradation - eliminates need for snubbers in inductive load switching |
| 175 °C maximum junction temperature | Enables operation in sealed enclosures or high-ambient environments without derating below 100 °C case temperature |
| Low-profile through-hole I2PAK | 14.1 mm max height allows use in space-constrained industrial controls where surface-mount D2PAK is mechanically unsuitable |
| Fast switching with low Qgd/Qgs ratio | Qgd = 5.1 nC and Qgs = 3.8 nC yield Miller plateau ratio < 1.35 - reduces risk of shoot-through in half-bridge configurations |
| Body diode with controlled trr | Reverse recovery time 80–160 ns and Qrr = 96–190 nC enable predictable freewheeling in synchronous rectification without oscillation |
Applications
| Industrial Motor Control | Automotive Body Electronics |
|---|---|
|
Use Scenario: High-side switch for 12 V brushed DC motors in HVAC actuators and seat positioners. IC Role / Device Role / Timing Role: P-channel MOSFET providing controlled power delivery with reverse polarity protection and load dump tolerance. Use Value: 175 °C rating ensures reliability during prolonged stall conditions; -60 V VDS accommodates ISO 7637-2 pulse 5a transients. |
Use Scenario: Reverse battery protection circuit upstream of infotainment and lighting modules. IC Role / Device Role / Timing Role: Low-RDS(on) P-MOSFET placed between battery and system rail to block reverse current flow. Use Value: 0.50 Ω RDS(on) limits voltage drop to < 30 mV at 60 mA standby current, preserving sleep-mode efficiency. |
| DC-DC Synchronous Buck Converter | Programmable Load Switch |
|
Use Scenario: High-side switch in non-isolated 24 V to 5 V/3.3 V buck regulator for PLC I/O modules. IC Role / Device Role / Timing Role: Main switching element operating at 250 kHz with gate charge optimized for low driver loss. Use Value: 12 nC Qg enables efficient driving with TC4427-class drivers; fast tf = 31 ns minimizes cross-conduction loss. |
Use Scenario: Controlled power enable for FPGA configuration banks or sensor subsystems requiring inrush limiting. IC Role / Device Role / Timing Role: Soft-start-capable high-side switch with gate resistor network defining turn-on slew rate. Use Value: Gate threshold (-2.0 to -4.0 V) allows precise timing control using DAC-driven gate bias; avalanche rating absorbs hot-swap energy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF9Z34NPBF | VDS = -55 V, RDS(on) = 0.28 Ω @ -10 V, Qg = 23 nC, TO-220 package | Higher conduction efficiency but slower switching and larger footprint; not low-profile | Prefer when lower RDS(on) dominates over board height and switching speed |
| SiHF9Z14L-GE3 | Identical silicon and I2PAK package; RoHS-compliant, halogen-free, Pb-free terminations | No functional difference; differs only in material compliance and marking | Select when lead-free/halogen-free certification is required for final product compliance |
Compared with IRF9Z14LPBF, IRF9Z34NPBF offers lower on-resistance but sacrifices switching speed and form factor, while SiHF9Z14L-GE3 provides identical electrical and mechanical performance with updated environmental compliance - making it a direct drop-in replacement where RoHS is mandated.
Availability
IRF9Z14LPBF is available at Aetrix Electronics and suitable for industrial motor control, automotive body electronics, and DC-DC synchronous buck converter designs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for IRF9Z14LPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-reliability power MOSFETs, diodes, and optoelectronics for industrial, automotive, and computing markets.
The IRF9Z14LPBF belongs to Vishay's third-generation power MOSFET family engineered for high-efficiency, high-temperature operation in demanding power switching applications - emphasizing ruggedness, low conduction loss, and repeatable avalanche performance.
FAQ
What is the maximum continuous drain current rating for IRF9Z14LPBF at 100 °C case temperature?
The IRF9Z14LPBF is rated for -4.7 A continuous drain current at TC = 100 °C, as specified in the Absolute Maximum Ratings table. This derating reflects thermal limitations of the I2PAK package and must be applied when heatsinking is insufficient to maintain TC ≤ 25 °C. Designers should verify junction temperature using RthJC = 3.5 °C/W and actual power dissipation to ensure TJ remains within -55 °C to +175 °C limits. The IRF9Z14LPBF maintains full functionality across this entire range.
Does IRF9Z14LPBF support logic-level gate drive?
The IRF9Z14LPBF has a gate threshold voltage range of -2.0 V to -4.0 V, meaning it begins conducting at modest negative gate-source voltages. However, it is not a true logic-level MOSFET: full enhancement to RDS(on) = 0.50 Ω requires VGS = -10 V. At -5 V, RDS(on) rises significantly (not specified in datasheet), so reliable operation demands a dedicated gate driver capable of delivering ±10 V or higher swing. The IRF9Z14LPBF is therefore best paired with standard MOSFET drivers rather than 3.3 V or 5 V microcontroller GPIOs directly.
What is the avalanche energy rating of IRF9Z14LPBF and how is it tested?
The IRF9Z14LPBF is fully avalanche rated with a single-pulse avalanche energy (EAS) of 140 mJ and repetitive avalanche energy (EAR) of 4.3 mJ. Testing follows the unclamped inductive switching method per Figure 12a: VDD = -25 V, IAS = -6.7 A, L = 3.6 mH, Rg = 25 Ω, starting TJ = 25 °C. This validates robustness against inductive kickback in relay, solenoid, and motor drive applications. The IRF9Z14LPBF sustains these stresses without parameter shift or failure when operated within its Safe Operating Area.
Can IRF9Z14LPBF be used in parallel with other MOSFETs for higher current handling?
Yes, the IRF9Z14LPBF can be paralleled, but careful attention to gate drive matching and current sharing is required. Its positive temperature coefficient of RDS(on) (see Fig. 4) promotes inherent current balancing as temperature rises - a key advantage for paralleling. Designers must ensure matched gate resistors, symmetrical PCB layout, and shared heatsinking. Derating total current by ≥20% is recommended. The IRF9Z14LPBF's low Qgd/Qgs ratio also improves dynamic sharing stability compared to devices with higher Miller charge.
What is the thermal resistance from junction to case (RthJC) for IRF9Z14LPBF and how does it impact heatsink selection?
The IRF9Z14LPBF has a maximum junction-to-case thermal resistance (RthJC) of 3.5 °C/W, measured from die to the drain-connected tab. This value enables effective heat transfer to an external heatsink when the tab is properly mounted with thermal interface material. For example, at 6.7 A and 0.50 Ω RDS(on), conduction loss is ~22.5 W; with RthJC = 3.5 °C/W and a heatsink at 60 °C, junction temperature reaches ~139 °C - well within the 175 °C limit. The IRF9Z14LPBF thus supports high-power operation with modest heatsinking in I2PAK form factor.
IRF9Z14LPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Package/Case:
- TO-262-3 Long Leads, I2PAK, TO-262AA
- Packaging:
- Tube
- Product Status:
- Active
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 60 V
- Current - Continuous Drain (Id) @ 25°C:
- 6.7A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 500mOhm @ 4A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 12 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 270 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 3.7W (Ta), 43W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- I2PAK
IRF9Z14LPBF FAQ
1.How can I place an order for IRF9Z14LPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for IRF9Z14LPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for IRF9Z14LPBF reliable?
The price and inventory of IRF9Z14LPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for IRF9Z14LPBF is usually 5 days.
3.What payment methods are accepted for IRF9Z14LPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for IRF9Z14LPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for IRF9Z14LPBF?
IRF9Z14LPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your IRF9Z14LPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for IRF9Z14LPBF?
For technical support, including IRF9Z14LPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your IRF9Z14LPBF requirements.
6.How does Aetrix verify that IRF9Z14LPBF is sourced from the original manufacturer or authorized distributors?
All IRF9Z14LPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that IRF9Z14LPBF meets industry standards.
7.What is the process for return or replacement of IRF9Z14LPBF?
All IRF9Z14LPBF units undergo pre-shipment inspection (PSI). If there is an issue with IRF9Z14LPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The IRF9Z14LPBF part is unused and in its original packaging.
Return procedure for IRF9Z14LPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
IRF9Z14LPBF Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

