NXP Semiconductors PH3830L,115
- Part No.:
- PH3830L,115
- Manufacturer:
- NXP Semiconductors
- Category:
- FETs, MOSFETs
- Package:
- SC-100, SOT-669
- Datasheet:
-
PH3830L,115.pdf
- Description:
- MOSFET N-CH 30V 98A LFPAK56
- Quantity:
- Payment:

- Shipping:

Inventory:3,592
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Product details
Overview
PH3830L,115 from NXP Semiconductors is a logic-level N-channel TrenchMOS power MOSFET in LFPAK (SOT669) package, designed for high-efficiency switching in DC-DC converters and portable power systems. It features 30 V VDS, 3.2 mΩ RDS(on) at VGS = 10 V and Tj = 25 °C, 98 A continuous drain current at Tmb = 25 °C, and 2 K/W thermal resistance from junction to mounting base - enabling high-power-density board-level designs in notebook computers and industrial SMPS.
For engineers reviewing the PH3830L,115 datasheet, PH3830L,115 pinout, PH3830L,115 application, or PH3830L,115 equivalent, key selection criteria include logic-level gate drive compatibility (VGS(th) = 1.0–1.5 V), low RDS(on) stability over temperature, avalanche ruggedness (250 mJ), and thermal performance under sustained mounting-base heating.
Technical Context
This device uses TrenchMOS technology to achieve low on-resistance and fast switching with minimal gate charge (QG(tot) = 33 nC, QGD = 11 nC). Its 4-pin LFPAK package integrates the drain directly to the mounting base for optimal thermal conduction and current handling.
The PH3830L,115 operates as a unidirectional high-side or low-side switch with integrated source-drain diode (VSD = 0.85 V at IS = 25 A), reverse recovery time of 42 ns, and gate threshold voltage shift from 1.0 V at 25 °C to 0.65 V at 150 °C - supporting stable operation across industrial temperature ranges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum - supports 24 V nominal bus systems with margin for transients and ripple |
| RDS(on) | 3.2 mΩ typical at VGS = 10 V, Tj = 25 °C - enables <1 W conduction loss at 50 A |
| ID | 98 A continuous at Tmb = 25 °C - suitable for high-current POL stages without forced cooling |
| Ptot | 62.5 W at Tmb = 25 °C - reflects high thermal efficiency enabled by 2 K/W Rth(j-mb) |
| QG(tot) | 33 nC - allows efficient 500 kHz+ switching with moderate gate driver strength |
| VGS(th) | 1.0–1.5 V at Tj = 25 °C - ensures full enhancement with standard 3.3 V or 5 V logic-level drivers |
| EAS | 250 mJ non-repetitive avalanche energy - provides robustness against inductive turn-off stress |
Pinout & Package
PH3830L,115 is housed in the SOT669 (LFPAK) plastic surface-mount package, featuring an exposed copper mounting base electrically connected to the drain and optimized for PCB thermal relief. The 4-terminal layout places three parallel source pins (Pins 1–3), one gate pin (Pin 4), and the drain via the thermally enhanced mounting base.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 (S) | Source | Three low-inductance source connections reduce common-source inductance and improve switching stability |
| 4 (G) | Gate | Single gate input with 1.0–1.5 V threshold - compatible with 3.3 V microcontrollers and dedicated gate drivers |
| Mounting base (D) | Drain | Exposed copper drain pad provides primary thermal path and high-current conduction; requires soldered thermal pad on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Logic-level gate drive | Operates fully enhanced with 3.3 V or 5 V gate sources - eliminates need for level-shifting circuitry |
| Low RDS(on) × area | 3.2 mΩ at 25 °C in compact LFPAK footprint - delivers higher current density than comparable SO-8 devices |
| Thermal resistance Rth(j-mb) | 2 K/W - enables >50 W dissipation with modest heatsinking on 2 oz copper PCB |
| Avalanche-rated | 250 mJ single-pulse EAS - withstands inductive load switching without external snubbers in many DC-DC topologies |
| Fast body diode | 42 ns trr, 0.85 V VSD - reduces dead-time losses and improves synchronous rectification efficiency |
Applications
| DC-DC Converters | Notebook Computers |
|---|---|
Use Scenario: High-current buck converter in CPU/GPU VRM stage operating at 300–600 kHz. IC Role / Device Role / Timing Role: Low-side synchronous rectifier MOSFET handling up to 90 A continuous output current. Use Value: 3.2 mΩ RDS(on) minimizes conduction loss; 42 ns reverse recovery enables tight dead-time control and >94% efficiency. |
Use Scenario: Main system power switch controlling battery-to-system rail in ultrabook platforms. IC Role / Device Role / Timing Role: Load switch isolating main 12 V/19 V input during sleep or fault conditions. Use Value: Logic-level gate enables direct control from embedded controller GPIO; 250 mJ avalanche rating protects against hot-plug transients. |
| Portable Equipment | Switched-Mode Power Supplies |
Use Scenario: Input protection and power-path management in USB-C PD power banks. IC Role / Device Role / Timing Role: Reverse-voltage and overcurrent protection switch placed between input port and battery charging IC. Use Value: Low VGS(th) ensures reliable turn-on with 3.3 V MCU control; 30 V rating covers full USB PD 3.0 range (up to 20 V). |
Use Scenario: Primary-side switch in 100–200 W industrial AC-DC adapter with active PFC + LLC topology. IC Role / Device Role / Timing Role: High-efficiency, thermally robust power switch in secondary-side synchronous rectification stage. Use Value: 2 K/W Rth(j-mb) sustains 62.5 W dissipation on standard FR4; LFPAK mounting base simplifies thermal interface design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel logic-level power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IPB036N04LGATMA1 | 40 V VDS, 3.6 mΩ RDS(on), TO-263 package, higher QG (47 nC) | Wider voltage margin but larger footprint and slower switching | Preferred where 40 V rating and higher avalanche energy (500 mJ) outweigh size and speed constraints |
| DMTH3010LPSQ-13 | 30 V VDS, 3.0 mΩ RDS(on), PowerSO-10 package, lower Rth(j-mb) (1.5 K/W) | Superior thermal performance but requires different PCB land pattern and stencil design | Selected when maximum power density and junction temperature margin are critical, and layout revision is feasible |
Compared with IPB036N04LGATMA1 and DMTH3010LPSQ-13, the PH3830L,115 offers the best balance of logic-level drive simplicity, compact LFPAK footprint, and proven thermal reliability in space-constrained 24 V systems - especially where gate drive voltage is limited to 3.3 V or 5 V and PCB real estate is premium.
Availability
PH3830L,115 is available at Aetrix Electronics and suitable for DC-DC converters, notebook computers, and switched-mode power supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and computing OEM programs.
Supply support for PH3830L,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The PH3830L,115 belongs to NXP's TrenchMOS logic-level power MOSFET family, engineered specifically for high-efficiency, thermally demanding switching applications in portable and computing power systems where gate drive voltage headroom is constrained.
FAQ
What is the maximum continuous drain current for PH3830L,115 at 100 °C mounting base temperature?
The PH3830L,115 supports 62 A continuous drain current at Tmb = 100 °C per its limiting values table. This derating reflects thermal constraints under sustained high-temperature operation and must be verified against actual PCB thermal design using the normalized current curve (Figure 1) in the datasheet.
Does PH3830L,115 have avalanche capability, and how is it specified?
Yes, PH3830L,115 is rated for non-repetitive drain-source avalanche energy of 250 mJ under defined test conditions (VGS = 10 V, ID = 70.7 A, Vsup ≤ 30 V, unclamped, tp = 0.1 ms). This specification ensures robustness against inductive switching stress in DC-DC and motor drive applications.
What is the gate-source threshold voltage range for PH3830L,115 across temperature?
The PH3830L,115 has a gate-source threshold voltage of 1.0–1.5 V at Tj = 25 °C and 0.65–1.0 V at Tj = 150 °C. This negative temperature coefficient ensures stable turn-on behavior across the full industrial junction temperature range.
Can PH3830L,115 be driven directly by a 3.3 V microcontroller GPIO?
Yes, PH3830L,115 is explicitly designed as a logic-level FET with VGS(th) as low as 0.65 V at 150 °C and guaranteed turn-on at 3.3 V. Its RDS(on) remains low (≤4.9 mΩ at VGS = 5 V) even with 3.3 V gate drive, making it suitable for direct MCU control without external level shifters.
What is the thermal resistance from junction to mounting base for PH3830L,115?
The PH3830L,115 has a maximum thermal resistance of 2 K/W from junction to mounting base (Rth(j-mb)). This value is measured under standardized conditions and enables accurate junction temperature estimation when the mounting base temperature is monitored or modeled in thermal simulation.
PH3830L,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- TrenchMOS™
- Package/Case:
- SC-100, SOT-669
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 98A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 5V, 10V
- Rds On (Max) @ Id, Vgs:
- 3.8mOhm @ 25A, 10V
- Vgs(th) (Max) @ Id:
- 2V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 33 nC @ 5 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 3190 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 62.5W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- LFPAK56, Power-SO8
PH3830L,115 FAQ
1.How can I place an order for PH3830L,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PH3830L,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PH3830L,115 reliable?
The price and inventory of PH3830L,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PH3830L,115 is usually 5 days.
3.What payment methods are accepted for PH3830L,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PH3830L,115 transactions.
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4.How is shipping managed for PH3830L,115?
PH3830L,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PH3830L,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PH3830L,115?
For technical support, including PH3830L,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PH3830L,115 requirements.
6.How does Aetrix verify that PH3830L,115 is sourced from the original manufacturer or authorized distributors?
All PH3830L,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PH3830L,115 meets industry standards.
7.What is the process for return or replacement of PH3830L,115?
All PH3830L,115 units undergo pre-shipment inspection (PSI). If there is an issue with PH3830L,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PH3830L,115 part is unused and in its original packaging.
Return procedure for PH3830L,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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