NXP Semiconductors PHB110NQ08LT,118

Overview

PHB110NQ08LT from NXP Semiconductors (formerly Philips Semiconductors) is a logic-level N-channel TrenchMOS™ power MOSFET in D2-PAK (SOT404) package, rated for 75 V V_DS, 75 A I_D, and 8.5 mΩ R_DS(on) at V_GS = 10 V and T_j = 25 °C. It serves as a high-current, low-loss switching element in DC-to-DC converters and motor control circuits where gate drive compatibility with 5 V microcontrollers is required.

For engineers reviewing the PHB110NQ08LT datasheet, PHB110NQ08LT pinout, PHB110NQ08LT application, or PHB110NQ08LT equivalent, key selection criteria include its logic-level gate threshold (V_GS(th) = 1–2 V), avalanche ruggedness (560 mJ), thermal resistance (R_th(j-mb) = 0.65 K/W), and surface-mount D2-PAK footprint optimized for high-power PCB thermal management.

Technical Context

This device employs TrenchMOS™ technology to achieve low on-resistance and fast switching with minimal gate charge (Q_g(tot) = 127.3 nC). Its gate-source threshold voltage (1–2 V at 25 °C) enables direct drive from 3.3 V or 5 V logic without level-shifting circuitry.

The PHB110NQ08LT integrates an intrinsic body diode with V_SD = 0.77–1.2 V at I_S = 25 A and t_rr = 70 ns, supporting synchronous rectification and freewheeling in buck and half-bridge topologies. Its mounting base is internally connected to the drain, requiring isolation from PCB ground when heatsink-mounted.

Key Specifications

Pinout & Package

PHB110NQ08LT uses the SOT404 (D2-PAK) surface-mount package with three terminals: Gate (pin 1), Drain (pin 2, internal connection to mounting base), and Source (pin 3). Pin 2 is not externally accessible - the drain connects directly to the large copper mounting base, which must be electrically isolated from PCB ground unless referenced to system high-side potential.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel logic-level power MOSFET applications.

Compared with STP110N8F6 and IRF1404ZLPbF, the PHB110NQ08LT uniquely combines true logic-level drive (1–2 V threshold), certified avalanche energy (560 mJ), and D2-PAK surface-mount packaging - making it the only option among the three suitable for space-constrained, 3.3 V–driven, inductive-load applications requiring field reliability.

Availability

PHB110NQ08LT is available at Aetrix Electronics and suitable for motor drives, uninterruptible power supplies, and DC-to-DC converters requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial OEM programs.

Supply support for PHB110NQ08LT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors, formerly Philips Semiconductors, is a global leader in high-performance analog and power semiconductor solutions, with deep expertise in automotive, industrial, and power management technologies.

The PHB110NQ08LT belongs to NXP's TrenchMOS™ logic-level power MOSFET product line, engineered specifically for high-current, low-voltage switching applications where gate drive simplicity, thermal efficiency, and ruggedness in harsh electrical environments are critical.

FAQ

What is the maximum continuous drain current rating for PHB110NQ08LT?

The PHB110NQ08LT is rated for 75 A continuous drain current (I_D) at mounting base temperature (T_mb) = 25 °C and V_GS = 10 V. This rating holds unchanged at T_mb = 100 °C per Figure 2 in the datasheet, confirming robust thermal performance under sustained industrial loads. The PHB110NQ08LT maintains this current capability due to its low R_DS(on) and 0.65 K/W junction-to-mounting-base thermal resistance.

Does PHB110NQ08LT support 3.3 V microcontroller gate drive?

Yes, the PHB110NQ08LT supports direct 3.3 V gate drive: its gate-source threshold voltage (V_GS(th)) is specified as 1–2 V at T_j = 25 °C, and it achieves R_DS(on) ≤9.95 mΩ at V_GS = 4.5 V and I_D = 25 A. This ensures full enhancement and low conduction loss when driven by standard 3.3 V MCUs without external level-shifting circuitry - a key advantage of the PHB110NQ08LT over higher-threshold alternatives.

What is the thermal resistance from junction to mounting base for PHB110NQ08LT?

The PHB110NQ08LT has a maximum thermal resistance of R_th(j-mb) = 0.65 K/W from junction to mounting base, as specified in Table 4. This value enables >200 W power dissipation with a 130 K temperature rise across the die-to-heatsink interface, making the PHB110NQ08LT suitable for high-power density designs where thermal management relies on direct mounting to an external heatsink.

Is PHB110NQ08LT avalanche-rated, and what is its energy rating?

Yes, the PHB110NQ08LT is fully avalanche-rated with a non-repetitive drain-source avalanche energy (E_DS(AL)S) of 560 mJ under specified test conditions (unclamped inductive load, I_D = 75 A, t_p = 0.15 ms, V_DD ≤75 V). This rating is explicitly confirmed in Table 3 and supports reliable operation in motor drives and solenoid control without external clamping components - a distinguishing feature of the PHB110NQ08LT.

What package type does PHB110NQ08LT use, and how is pin 2 configured?

The PHB110NQ08LT uses the SOT404 (D2-PAK) surface-mount package. Pin 2 is the drain terminal, but it is not accessible via a lead - instead, the drain connects internally to the large copper mounting base. As stated in the pinning note "[1] It is not possible to make connection to pin 2 of the SOT404 package," all drain current flows through the base plate, which must be electrically isolated from the PCB unless referenced to high-side potential. This configuration is integral to the PHB110NQ08LT's thermal and electrical design.