Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

NXP Semiconductors PHD96NQ03LT,118

Name: PHD96NQ03LT,118
Brand: NXP Semiconductors
SKU: PHD96NQ03LT,118
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: PHD96NQ03LT,118

Manufacturer:: NXP Semiconductors

Category:: FETs, MOSFETs

Package:: TO-252-3, DPAK (2 Leads + Tab), SC-63

Datasheet:: PHD96NQ03LT,118.pdf

Description:: MOSFET N-CH 25V 75A DPAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:9,905

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

PHD96NQ03LT,118 from NXP Semiconductors is a logic-level N-channel TrenchMOS power MOSFET in DPAK (SOT428) package, designed for high-efficiency switching in DC-to-DC converters. It delivers 75 A continuous drain current at V_GS = 5 V, exhibits R_DS(on) of 5.6 mΩ (typ.) at 5 V gate drive and 25 °C, supports 25 V drain-source voltage rating, and features low Q_G (26.7 nC typ.) for fast switching with minimal gate drive loss.

For engineers reviewing the PHD96NQ03LT,118 datasheet, PHD96NQ03LT,118 pinout, PHD96NQ03LT,118 application, or PHD96NQ03LT,118 equivalent, key selection criteria include logic-level gate compatibility (V_GS(th) = 1–2 V), thermal resistance to mounting base (R_th(j-mb) = 1.3 K/W), avalanche energy rating (185 mJ), and suitability for high-current synchronous rectification and hot-swap circuits.

Technical Context

This device employs NXP's TrenchMOS technology to achieve low on-resistance and low gate charge simultaneously. Its threshold voltage range (1–2 V at 25 °C) ensures reliable turn-on with standard 3.3 V or 5 V logic controllers, while its 25 V V_DS rating targets intermediate-voltage DC-DC stages such as point-of-load (POL) regulators and battery-powered systems.

The integrated source-drain diode has V_SD = 0.9–1.2 V at 25 A and t_rr = 43 ns, supporting efficient freewheeling in buck topologies. Thermal design is enabled by direct mounting-base conduction (R_th(j-mb) = 1.3 K/W) and a robust 175 °C maximum junction temperature.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	25 V - Maximum drain-source blocking voltage; defines use in ≤24 V input systems like telecom POLs and industrial 24 V rails.
I_D (continuous)	75 A at T_mb = 25 °C, V_GS = 5 V - Sustained current capability under standard logic-level gate drive without heatsink derating.
R_DS(on)	5.6 mΩ (typ.) at V_GS = 5 V, I_D = 25 A, T_j = 25 °C - Low conduction loss enabling <1 W dissipation at 25 A, critical for high-efficiency power stages.
Q_G(tot)	26.7 nC (typ.) - Enables fast switching with low gate driver power demand; reduces switching loss in high-frequency (>500 kHz) converters.
R_th(j-mb)	1.3 K/W - Thermal path directly from die to mounting base allows efficient heat transfer to PCB copper or heatsink, simplifying thermal management.
V_GS(th)	1.0–2.0 V at T_j = 25 °C - Ensures full enhancement with 3.3 V microcontrollers or FPGA I/O, eliminating need for level-shifting gate drivers.
E_AS	185 mJ (unclamped) - Withstands single-pulse inductive energy during fault events, improving system robustness in motor drives and DC-DC transient conditions.

Pinout & Package

PHD96NQ03LT,118 is housed in a plastic DPAK (SOT428) surface-mount package with three leads (one lead cropped) and an exposed mounting base electrically connected to the drain terminal. The package enables high-power dissipation via thermal conduction through the mounting base to PCB copper or external heatsink.

Pin/Terminal	Circuit Role	Design Meaning
1 (G)	Gate	Control electrode; accepts logic-level voltage (≥3.3 V) to fully enhance channel; low Q_G minimizes driver requirements.
2 (D)	Drain	Main high-side or low-side current path; internally connected to mounting base for low-inductance, low-resistance thermal and electrical path.
3 (S)	Source	Reference node for gate drive and current sensing; forms return path for load current; used for Kelvin sensing in precision applications.

Key Features

Feature	Design Value
Logic-level gate drive	Operates fully enhanced with 3.3 V or 5 V controllers-eliminates need for dedicated gate driver ICs in space-constrained designs.
Low R_DS(on) at 5 V	5.6 mΩ typical enables <1.5 W conduction loss at 60 A, reducing thermal stress and improving efficiency in high-current POL converters.
TrenchMOS architecture	Optimizes cell density and vertical current flow to simultaneously reduce on-resistance and gate charge-critical for high-frequency, high-efficiency SMPS.
Mounting base connection	Drain-connected metal tab provides low-impedance thermal path (1.3 K/W) and low-inductance power loop-enhances EMI performance and thermal reliability.
Avalanche-rated	185 mJ non-repetitive avalanche energy supports rugged operation during inductive switching transients without external snubbers.

Applications

High-Efficiency Buck Converters	Synchronous Rectification
Use Scenario: Primary switch in 12 V–24 V input, 3.3 V/5 V output buck converters operating at 300–1000 kHz. IC Role / Device Role / Timing Role: High-side power switch controlling energy transfer into output inductor; requires low Q_G and low R_DS(on) to minimize switching and conduction losses. Use Value: Achieves >95% efficiency at 50 A load due to 5.6 mΩ R_DS(on) and 26.7 nC Q_G, reducing thermal footprint and enabling compact 2-layer PCB layouts.	Use Scenario: Low-side switch replacing Schottky diode in synchronous buck or boost converter outputs. IC Role / Device Role / Timing Role: Active rectifier conducting during freewheeling phase; must support fast turn-off to prevent shoot-through and low V_SD to reduce forward loss. Use Value: 0.9–1.2 V V_SD and 43 ns t_rr cut conduction loss by >40% vs. 40 V Schottky, while logic-level gate enables direct MCU control without auxiliary bias.
Hot-Swap Controllers	Industrial Motor Drives
Use Scenario: Inrush current limiter in 24 V backplane or modular power supply insertion circuits. IC Role / Device Role / Timing Role: Series pass element controlled by external current-sense amplifier and gate driver to ramp voltage linearly during plug-in. Use Value: 75 A continuous rating and 240 A peak current capability allow safe handling of 20–50 A hot-plug events; avalanche rating absorbs inductive kickback during fault shutdown.	Use Scenario: Half-bridge leg in 24 V BLDC motor gate driver modules for HVAC actuators or factory automation. IC Role / Device Role / Timing Role: Low-side switching element in H-bridge; must tolerate fast dV/dt, conduct high pulsed current, and survive shoot-through transients. Use Value: 25 V V_DS rating matches 24 V bus; 175 °C T_j(max) and 1.3 K/W R_th(j-mb) ensure stable operation under sustained 40 A PWM loads with minimal heatsinking.

High-Efficiency Buck Converters

Synchronous Rectification

Use Scenario: Primary switch in 12 V–24 V input, 3.3 V/5 V output buck converters operating at 300–1000 kHz.

IC Role / Device Role / Timing Role: High-side power switch controlling energy transfer into output inductor; requires low Q_G and low R_DS(on) to minimize switching and conduction losses.

Use Value: Achieves >95% efficiency at 50 A load due to 5.6 mΩ R_DS(on) and 26.7 nC Q_G, reducing thermal footprint and enabling compact 2-layer PCB layouts.

Use Scenario: Low-side switch replacing Schottky diode in synchronous buck or boost converter outputs.

IC Role / Device Role / Timing Role: Active rectifier conducting during freewheeling phase; must support fast turn-off to prevent shoot-through and low V_SD to reduce forward loss.

Use Value: 0.9–1.2 V V_SD and 43 ns t_rr cut conduction loss by >40% vs. 40 V Schottky, while logic-level gate enables direct MCU control without auxiliary bias.

Hot-Swap Controllers

Industrial Motor Drives

Use Scenario: Inrush current limiter in 24 V backplane or modular power supply insertion circuits.

IC Role / Device Role / Timing Role: Series pass element controlled by external current-sense amplifier and gate driver to ramp voltage linearly during plug-in.

Use Value: 75 A continuous rating and 240 A peak current capability allow safe handling of 20–50 A hot-plug events; avalanche rating absorbs inductive kickback during fault shutdown.

Use Scenario: Half-bridge leg in 24 V BLDC motor gate driver modules for HVAC actuators or factory automation.

IC Role / Device Role / Timing Role: Low-side switching element in H-bridge; must tolerate fast dV/dt, conduct high pulsed current, and survive shoot-through transients.

Use Value: 25 V V_DS rating matches 24 V bus; 175 °C T_j(max) and 1.3 K/W R_th(j-mb) ensure stable operation under sustained 40 A PWM loads with minimal heatsinking.

Equivalent & Alternatives

The following parts are listed as comparable options for similar N-channel logic-level power MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IRL3803PBF	Higher R_DS(on) (8.0 mΩ @ 5 V), higher Q_G (34 nC), TO-220 package (no mounting base)	Lacks integrated thermal path; requires external heatsink; less suitable for high-density SMT designs	Choose when board-level heatsinking is available and lower gate charge is not critical.
STL110N3LLH6	Lower R_DS(on) (3.5 mΩ @ 4.5 V), same DPAK package, but rated only to 30 V and lacks published avalanche energy data	Not qualified for unclamped inductive switching; limited to strictly regulated 24 V systems	Prefer for highest efficiency in tightly regulated 24 V supplies where fault energy is externally clamped.

Compared with IRL3803PBF and STL110N3LLH6, PHD96NQ03LT,118 uniquely balances low logic-level R_DS(on), low Q_G, DPAK thermal performance, and documented avalanche ruggedness-making it optimal for compact, robust, high-current DC-DC and motor control designs requiring both efficiency and fault tolerance.

Availability

PHD96NQ03LT,118 is available at Aetrix Electronics and suitable for high-current DC-DC converters, synchronous rectifiers, and industrial hot-swap circuits requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for PHD96NQ03LT,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.

PHD96NQ03LT,118 belongs to NXP's TrenchMOS logic-level power MOSFET product line, engineered for high-efficiency, high-current switching in computing, communications, and industrial power conversion where low gate drive voltage and thermal performance are critical.

FAQ

What is the maximum continuous drain current for PHD96NQ03LT,118 at 5 V gate drive?

The PHD96NQ03LT,118 supports 75 A continuous drain current at T_mb = 25 °C and V_GS = 5 V, as specified in the Quick Reference Data table. At elevated mounting base temperatures, this rating decreases per the normalized derating curve in Figure 1-e.g., ~50 A at T_mb = 100 °C. This value reflects actual conduction capability under logic-level drive without external gate boosting.

Does PHD96NQ03LT,118 have avalanche capability, and what is its rated energy?

Yes, PHD96NQ03LT,118 is rated for non-repetitive drain-source avalanche energy of 185 mJ under specified test conditions (V_GS = 10 V, I_D = 43 A, V_sup ≤15 V, R_GS = 50 Ω, t_p = 0.25 ms, unclamped). This ruggedness enables reliable operation during inductive switching faults in DC-DC and motor drive applications without requiring external protection components.

What is the gate-source threshold voltage range for PHD96NQ03LT,118?

The gate-source threshold voltage (V_GS(th)) for PHD96NQ03LT,118 is 1.0–2.0 V at T_j = 25 °C and I_D = 1 mA, as confirmed in Table 6. It decreases to 0.5 V minimum at T_j = 175 °C and increases to 2.3 V maximum at T_j = −55 °C. This wide logic-compatible range ensures consistent turn-on across industrial temperature extremes using standard 3.3 V or 5 V controllers.

Can PHD96NQ03LT,118 be used in synchronous rectification applications?

Yes, PHD96NQ03LT,118 is well-suited for synchronous rectification due to its low R_DS(on) (5.6 mΩ typ. at 5 V), low source-drain forward voltage (V_SD = 0.9–1.2 V at 25 A), and fast reverse recovery time (t_rr = 43 ns). Its logic-level gate enables direct control by PWM controllers or microcontrollers without level shifters, reducing BOM count and layout complexity in buck and boost converters.

What is the thermal resistance from junction to mounting base for PHD96NQ03LT,118?

The thermal resistance from junction to mounting base (R_th(j-mb)) for PHD96NQ03LT,118 is 1.3 K/W maximum, as specified in Table 5. This low value is achieved via the drain-connected mounting base in the DPAK (SOT428) package, enabling efficient heat transfer to PCB copper pours or external heatsinks-critical for maintaining T_j ≤175 °C under high-current operation.

PHD96NQ03LT,118 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: TrenchMOS™

Package/Case:: TO-252-3, DPAK (2 Leads + Tab), SC-63

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 25 V

Current - Continuous Drain (Id) @ 25°C:: 75A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 5V, 10V

Rds On (Max) @ Id, Vgs:: 4.95mOhm @ 25A, 10V

Vgs(th) (Max) @ Id:: 2V @ 1mA

Gate Charge (Qg) (Max) @ Vgs:: 26.7 nC @ 5 V

Vgs (Max):: ±20V

Input Capacitance (Ciss) (Max) @ Vds:: 2200 pF @ 25 V

FET Feature:: -

Power Dissipation (Max):: 115W (Tc)

Operating Temperature:: -55°C ~ 175°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: DPAK

PHD96NQ03LT,118 FAQ

1.How can I place an order for PHD96NQ03LT,118 through Aetrix?

Please submit a Request for Quotation (RFQ) for PHD96NQ03LT,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PHD96NQ03LT,118 reliable?

The price and inventory of PHD96NQ03LT,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PHD96NQ03LT,118 is usually 5 days.

3.What payment methods are accepted for PHD96NQ03LT,118?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PHD96NQ03LT,118 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PHD96NQ03LT,118?

PHD96NQ03LT,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PHD96NQ03LT,118 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PHD96NQ03LT,118?

For technical support, including PHD96NQ03LT,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PHD96NQ03LT,118 requirements.

6.How does Aetrix verify that PHD96NQ03LT,118 is sourced from the original manufacturer or authorized distributors?

All PHD96NQ03LT,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PHD96NQ03LT,118 meets industry standards.

7.What is the process for return or replacement of PHD96NQ03LT,118?

All PHD96NQ03LT,118 units undergo pre-shipment inspection (PSI). If there is an issue with PHD96NQ03LT,118, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PHD96NQ03LT,118 part is unused and in its original packaging.

Return procedure for PHD96NQ03LT,118:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…