Nexperia USA Inc. PHKD3NQ10T,518
- Part No.:
- PHKD3NQ10T,518
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FET, MOSFET Arrays
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
PHKD3NQ10T,518.pdf
- Description:
- MOSFET 2N-CH 100V 3A 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:9,403
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Product details
Overview
PHKD3NQ10T,518 from NXP Semiconductors is a dual standard-level N-channel enhancement-mode TrenchMOS FET in an SO8 (SOT96-1) package, designed for synchronous rectification and bidirectional switching in compact DC-DC converters and motor drivers. It delivers 100 V drain-source voltage rating, 3 A continuous drain current per channel at 25 °C, 70–90 mΩ RDS(on) at VGS = 10 V and 25 °C, and fast switching with 8 nC QGD, enabling high-efficiency power conversion in computing and industrial systems.
For engineers reviewing the PHKD3NQ10T,518 datasheet, PHKD3NQ10T,518 pinout, PHKD3NQ10T,518 application, or PHKD3NQ10T,518 equivalent, key selection criteria include dual-channel thermal coupling in shared SO8 footprint, gate threshold voltage range (2–4 V at 25 °C), source-drain diode recovery (55 ns trr), and junction-to-ambient thermal resistance (150 K/W on FR4), critical for thermally constrained board layouts.
Technical Context
This dual N-channel MOSFET integrates two independent TrenchMOS die in a single SO8 package with shared drain terminals (pins 5/6 = D2; pins 7/8 = D1), enabling half-bridge or dual low-side configurations without external paralleling. Its standard-level gate drive (VGS(th) = 2–4 V) ensures compatibility with 3.3 V and 5 V logic controllers.
Thermal design is constrained by 2 W total power dissipation at Tsp = 25 °C and 150 K/W Rth(j-a) on FR4 - requiring careful copper pour planning. The internal source inductance (5 nH) and drain inductance (2.5 nH) are specified to support accurate switching loss modeling in high-frequency (>500 kHz) topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - supports input rails up to 48 V nominal with 2× safety margin in industrial DC-DC designs |
| ID (per channel) | 3 A @ Tsp = 25 °C - enables 12–24 W output stages with <1.5 W conduction loss per FET at full load |
| RDS(on) | 70–90 mΩ @ VGS = 10 V, ID = 1.5 A, Tj = 25 °C - defines low conduction loss in continuous conduction mode (CCM) operation |
| QGD | 8 nC @ VGS = 10 V, ID = 3 A, VDS = 80 V - determines Miller plateau duration and gate driver current demand during turn-on/turn-off transitions |
| trr | 55 ns @ IS = 2 A, dIS/dt = −100 A/µs - limits reverse recovery losses and EMI in synchronous rectifier applications |
| Rth(j-a) | 150 K/W on FR4 board - mandates ≥250 mm² 2-oz copper pad with thermal vias for sustained 2 A/channel operation |
Pinout & Package
PHKD3NQ10T,518 uses the SOT96-1 (SO8) plastic small-outline package: 8-pin, 3.9 mm body width, 1.27 mm lead pitch, 1.75 mm max height. Pin 1 is indexed at bottom-left corner (see JEDEC MS-012 outline).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | S1 | Source terminal of Channel 1 - connects to low-side return path; electrically isolated from S2 |
| 2 | G1 | Gate terminal of Channel 1 - requires 10 V drive for full enhancement; threshold 2–4 V |
| 3 | S2 | Source terminal of Channel 2 - independent return node; enables dual low-side or half-bridge configuration |
| 4 | G2 | Gate terminal of Channel 2 - fully independent control; no internal gate coupling |
| 5,6 | D2 | Shared drain terminal for Channel 2 - pins 5 and 6 are internally bonded to same die drain |
| 7,8 | D1 | Shared drain terminal for Channel 1 - pins 7 and 8 are internally bonded to same die drain |
Key Features
| Feature | Design Value |
|---|---|
| Low RDS(on) | 70–90 mΩ per channel at 10 V drive - reduces I²R losses in high-current, low-voltage outputs (e.g., 3.3 V/2 A rails) |
| TrenchMOS technology | Enables fast switching (tr = 12 ns, tf = 10 ns) and low QG(tot) = 21 nC - minimizes gate drive power and improves efficiency above 300 kHz |
| Dual-channel integration | Two independent N-channel FETs in one SO8 - eliminates layout mismatch and parasitic imbalance seen in discrete dual-FET solutions |
| Source-drain diode performance | VSD = 0.8–1.2 V @ IS = 2 A, trr = 55 ns - supports synchronous rectification without external Schottky diodes in buck converters |
Applications
| Server VRM Power Stage | Industrial Motor Driver |
|---|---|
|
Use Scenario: High-density 12 V input → 1.2 V/60 A CPU core supply using multiphase buck topology. IC Role / Device Role / Timing Role: Low-side synchronous rectifier in each phase leg, driven by dedicated gate controller with 100 ns dead-time. Use Value: Dual-channel layout reduces PCB area by 35% vs. discrete SO8 FETs; matched RDS(on) ensures current sharing across phases. |
Use Scenario: 24 V brushed DC motor H-bridge with PWM speed control and regenerative braking. IC Role / Device Role / Timing Role: Two low-side switches (G1/S1/D1 and G2/S2/D2) controlling motor direction and braking current path. Use Value: Integrated dual structure eliminates trace length mismatch, reducing shoot-through risk and improving PWM fidelity at 20 kHz switching. |
| Point-of-Load DC-DC Converter | Relay Driving Interface |
|
Use Scenario: Compact 48 V → 5 V/3 A isolated DC-DC module for telecom shelf management. IC Role / Device Role / Timing Role: Secondary-side synchronous rectifier in forward or active-clamp flyback topology. Use Value: 55 ns trr and 1.2 V VSD minimize reverse recovery loss and conduction drop, boosting efficiency to >92% at full load. |
Use Scenario: Solid-state replacement for electromechanical relays in PLC I/O modules driving 24 V solenoids. IC Role / Device Role / Timing Role: Low-side switch controlling relay coil current; operated in linear mode for soft-start or PWM dimming. Use Value: 100 V VDS withstands 2× inductive kickback; 2.4 A continuous rating at 70 °C ambient supports 100% duty-cycle operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN3026LSD-13 | 30 V VDS, 4.2 A ID, 26 mΩ RDS(on), same SO8 package but single-die dual-FET (not two independent dies) | Only suitable for ≤24 V systems; lower voltage headroom eliminates use in 48 V DC-DC or industrial motor drives | Select only when operating voltage is strictly ≤30 V and ultra-low RDS(on) is prioritized over voltage rating |
| SI6926ADQ-T1-GE3 | 60 V VDS, 3.5 A ID, 45 mΩ RDS(on), SO8 with independent drains (no shared D1/D2 pins) | Requires separate drain routing; lacks integrated dual-drain symmetry needed for compact half-bridge layout | Prefer when independent drain control is required or when higher RDS(on) tolerance allows smaller die size |
Compared with DMN3026LSD-13 and SI6926ADQ-T1-GE3, PHKD3NQ10T,518 uniquely provides 100 V rating with true dual independent-gate/dual-source architecture and shared drain pairs - making it the only option among the three qualified for 48 V industrial power conversion where voltage margin and layout symmetry are non-negotiable.
Availability
PHKD3NQ10T,518 is available at Aetrix Electronics and suitable for server VRM power stages, industrial motor drivers, point-of-load DC-DC converters, and relay driving interfaces requiring stable component supply across extended product lifecycles.
Supply support for PHKD3NQ10T,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and communication markets.
PHKD3NQ10T,518 belongs to NXP's TrenchMOS discrete power portfolio, engineered specifically for high-efficiency, space-constrained DC-DC conversion and motor control in computing and industrial equipment - emphasizing thermal robustness and gate-drive simplicity.
FAQ
Is PHKD3NQ10T,518 suitable for automotive applications?
No. PHKD3NQ10T,518 is explicitly qualified only for computing, communications, consumer, and industrial applications per its product profile. It is not AEC-Q101 qualified, lacks automotive-grade temperature screening (−40 °C to 150 °C operational range is not validated per automotive stress tests), and carries no automotive-specific reliability data or PPAP documentation.
What is the maximum safe operating junction temperature?
The absolute maximum junction temperature (Tj) is 150 °C, as defined in Table 4 (Limiting values). Continuous operation above this temperature causes irreversible degradation. Derating is required: at Tsp = 70 °C, Ptot must be limited to 1.3 W, and RDS(on) increases to 216 mΩ at Tj = 150 °C - both confirmed in Tables 4 and 6.
Can PHKD3NQ10T,518 be used in linear mode for analog current regulation?
Yes, but with strict thermal limits. The device supports linear operation (e.g., constant-current sink) per its VGS = −20 V to +20 V rating and ID = 3 A DC limit at 25 °C mounting temperature. However, power dissipation must stay within 2 W at Tsp = 25 °C, and SO8 thermal resistance (150 K/W) requires substantial copper area to avoid thermal runaway at >0.5 W.
Are pins 5/6 and 7/8 truly shorted internally?
Yes. Per Table 2 (Pinning information) and Figure 4 graphic symbol, pins 5 and 6 are bonded to the same drain node (D2), and pins 7 and 8 are bonded to the same drain node (D1). This dual-pin-per-drain design enhances current handling and reduces bond wire inductance - verified in the "Simplified outline" diagram and ordering information table confirming SOT96-1 mechanical construction.
PHKD3NQ10T,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- TrenchMOS™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- 2 N-Channel (Dual)
- FET Feature:
- Logic Level Gate
- Drain to Source Voltage (Vdss):
- 100V
- Current - Continuous Drain (Id) @ 25°C:
- 3A
- Rds On (Max) @ Id, Vgs:
- 90mOhm @ 1.5A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 21nC @ 10V
- Input Capacitance (Ciss) (Max) @ Vds:
- 633pF @ 20V
- Power - Max:
- 2W
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
PHKD3NQ10T,518 FAQ
1.How can I place an order for PHKD3NQ10T,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for PHKD3NQ10T,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PHKD3NQ10T,518 reliable?
The price and inventory of PHKD3NQ10T,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PHKD3NQ10T,518 is usually 5 days.
3.What payment methods are accepted for PHKD3NQ10T,518?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PHKD3NQ10T,518 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PHKD3NQ10T,518?
PHKD3NQ10T,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PHKD3NQ10T,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PHKD3NQ10T,518?
For technical support, including PHKD3NQ10T,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PHKD3NQ10T,518 requirements.
6.How does Aetrix verify that PHKD3NQ10T,518 is sourced from the original manufacturer or authorized distributors?
All PHKD3NQ10T,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PHKD3NQ10T,518 meets industry standards.
7.What is the process for return or replacement of PHKD3NQ10T,518?
All PHKD3NQ10T,518 units undergo pre-shipment inspection (PSI). If there is an issue with PHKD3NQ10T,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PHKD3NQ10T,518 part is unused and in its original packaging.
Return procedure for PHKD3NQ10T,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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