NXP Semiconductors PHM25NQ10T,518
- Part No.:
- PHM25NQ10T,518
- Manufacturer:
- NXP Semiconductors
- Category:
- FETs, MOSFETs
- Package:
- 8-VDFN Exposed Pad
- Datasheet:
-
PHM25NQ10T,518.pdf
- Description:
- MOSFET N-CH 100V 30.7A 8HVSON
- Quantity:
- Payment:

- Shipping:

Inventory:5,471
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Product details
Overview
PHM25NQ10T from NXP Semiconductors (formerly Philips Semiconductors) is an N-channel enhancement-mode TrenchMOS™ power MOSFET in QLPAK (SOT685-1) package, rated for 100 V VDS, 30.7 A continuous drain current at Tmb = 25 °C, and 30 mΩ maximum RDS(on) at VGS = 10 V. It serves as a primary-side switching FET in DC-to-DC converters for portable equipment.
For engineers reviewing the PHM25NQ10T datasheet, PHM25NQ10T pinout, PHM25NQ10T application, or PHM25NQ10T equivalent, key selection criteria include its low thermal resistance (Rth(j-mb) = 2 K/W), avalanche ruggedness (170 mJ non-repetitive EDS(AL)S), and surface-mount QLPAK footprint compatible with SO-8 layouts.
Technical Context
This device employs TrenchMOS™ technology to achieve low on-resistance and fast switching performance. Its gate threshold voltage ranges from 2–4 V at 25 °C and remains functional down to 1.2 V at 150 °C, enabling robust gate drive across temperature. The integrated source-drain diode supports synchronous rectification and exhibits 0.85–1.2 V forward voltage at 10 A.
The PHM25NQ10T features a thermally enhanced mounting base connected directly to the drain terminals (pins 5–8 and mb), enabling efficient heat transfer to PCB copper. Its dynamic parameters-26.6 nC total gate charge, 6.6 nC Miller charge, and 1800 pF input capacitance-support high-frequency operation up to several hundred kHz in hard-switched topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 100 V - Maximum blocking voltage for primary-side switch in ≤100 V bus applications. |
| ID (DC) | 30.7 A at Tmb = 25 °C - Continuous current capability with adequate heatsinking on PCB mounting base. |
| RDS(on) | 26.5–30 mΩ at VGS = 10 V, Tj = 25 °C - Low conduction loss enabling high-efficiency power conversion. |
| Ptot | 62.5 W at Tmb = 25 °C - Total power dissipation limit defined by thermal path to mounting base. |
| Rth(j-mb) | 2 K/W - Junction-to-mounting-base thermal resistance enables direct thermal coupling to PCB copper area. |
| EDS(AL)S | 170 mJ - Non-repetitive avalanche energy rating supports unclamped inductive turn-off stress without failure. |
| Qg(tot) | 26.6 nC - Total gate charge determines driver strength requirement for <100 ns switching transitions. |
Pinout & Package
PHM25NQ10T uses the QLPAK (SOT685-1) package: plastic thermal-enhanced very thin small outline package, 6 × 5 × 0.85 mm body, no leads, 8 terminals plus exposed mounting base (mb) electrically tied to drain.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source (S) | Low-side return path; three parallel pins reduce source inductance and improve current sharing. |
| 4 | Gate (G) | Control terminal requiring ≥10 V drive for full enhancement; gate leakage <100 nA at ±20 V. |
| 5, 6, 7, 8 | Drain (D) | High-side power node; four parallel pins minimize drain inductance and support high peak currents. |
| mb | Mounting Base (Drain-connected) | Exposed copper pad tied internally to drain; primary thermal path to PCB; must be soldered to large copper pour. |
Key Features
| Feature | Design Value |
|---|---|
| TrenchMOS™ technology | Enables 30 mΩ RDS(on) at 100 V rating-superior cell density and lower specific on-resistance vs planar MOSFETs. |
| QLPAK thermal package | 2 K/W junction-to-mounting-base resistance allows >60 W power handling with minimal external heatsink. |
| Low-profile surface mount | 0.85 mm max height enables ultra-thin portable designs and compatibility with automated SMT assembly. |
| Avalanche-rated structure | 170 mJ non-repetitive drain-source avalanche energy permits safe operation under inductive switching stress. |
| SO-8 footprint compatibility | Same PCB land pattern as SO-8 simplifies layout reuse and reduces redesign effort for legacy board upgrades. |
Applications
| DC-DC Primary Switch | Portable Power Management |
|---|---|
Use Scenario: High-efficiency buck or flyback converter in USB-C PD adapters and notebook chargers. IC Role / Device Role / Timing Role: Primary-side power switch controlling energy transfer from input bus to transformer or inductor. Use Value: 30 mΩ RDS(on) and 26.6 nC Qg enable >92% efficiency at 2–3 A output with 100 kHz–500 kHz switching. | Use Scenario: Load switch and battery protection circuit in smartphones and tablets. IC Role / Device Role / Timing Role: High-side or low-side power path controller managing system power sequencing and overcurrent cutoff. Use Value: 30.7 A DC rating and 60 A pulsed capability support hot-swap and surge-current handling during power-up. |
| Motor Drive Half-Bridge | Industrial SMPS |
Use Scenario: Low-voltage BLDC motor driver stage in cordless power tools and drones. IC Role / Device Role / Timing Role: Low-side switch in half-bridge configuration driving phase winding current. Use Value: Fast 10 ns rise time and 29 ns fall time ensure precise PWM timing control and reduced switching losses. | Use Scenario: Main switching FET in industrial AC-DC front-end supplies and telecom rectifiers. IC Role / Device Role / Timing Role: Primary-side switch in active clamp or LLC resonant topologies operating at 100–300 kHz. Use Value: 170 mJ avalanche rating and 150 °C max junction temperature support reliable operation under transient overloads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STP20NM10 | TO-220 package; higher RDS(on) (45 mΩ); no mounting base; Rth(j-c) = 1.5 K/W but requires external heatsink. | Suitable for through-hole prototyping or lower-density boards where thermal mass is available. | Select when mechanical mounting constraints preclude surface-mount packages or when legacy TO-220 layout reuse is required. |
| IRF540NPBF | TO-220AB; 44 mΩ RDS(on); 33 A ID; higher gate charge (71 nC); no avalanche rating specified. | Better suited for linear-mode or lower-frequency (<100 kHz) switching where gate drive simplicity outweighs efficiency needs. | Choose when cost sensitivity dominates and thermal design can accommodate higher conduction/switching losses. |
Compared with STP20NM10 and IRF540NPBF, the PHM25NQ10T delivers superior thermal performance via its QLPAK mounting base, lower RDS(on), and documented avalanche ruggedness-making it optimal for compact, high-frequency, high-reliability DC-DC designs where PCB real estate and thermal management are critical.
Availability
PHM25NQ10T is available at Aetrix Electronics and suitable for DC-DC converters, portable power management systems, and motor drive half-bridges requiring stable component supply and long-term industrial availability.
Supply support for PHM25NQ10T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips Semiconductors in 2006, specializing in secure connectivity solutions for automotive, industrial, and consumer markets.
The PHM25NQ10T belongs to NXP's TrenchMOS™ standard-level power MOSFET product line, designed specifically for high-efficiency, surface-mount DC-DC conversion in space-constrained portable and industrial power systems.
FAQ
What is the maximum continuous drain current rating for PHM25NQ10T?
The PHM25NQ10T has a maximum continuous drain current (ID) of 30.7 A at mounting base temperature (Tmb) = 25 °C and VGS = 10 V. At Tmb = 100 °C, this derates to 19.4 A. These values assume proper PCB copper thermal relief and are defined in the Absolute Maximum Ratings table of the PHM25NQ10T datasheet.
Does PHM25NQ10T support avalanche operation, and what is its energy rating?
Yes, the PHM25NQ10T is rated for non-repetitive drain-source avalanche with EDS(AL)S = 170 mJ under specified test conditions (ID = 9.9 A, tp = 0.21 ms, VDD ≤100 V). It also specifies 1.70 mJ repetitive avalanche energy (EDS(AL)R). This ruggedness is integral to the PHM25NQ10T's design for inductive switching stress in DC-DC converters.
What is the gate threshold voltage range for PHM25NQ10T across temperature?
The PHM25NQ10T gate-source threshold voltage (VGS(th)) is specified from 2.0–4.0 V at Tj = 25 °C, 1.2–4.4 V at Tj = −55 °C, and 1.2 V minimum at Tj = 150 °C. This wide operational window ensures reliable turn-on across automotive and industrial temperature ranges for the PHM25NQ10T.
How does the QLPAK package of PHM25NQ10T improve thermal performance compared to SO-8?
The PHM25NQ10T's QLPAK (SOT685-1) package features an exposed mounting base (mb) electrically tied to drain and thermally coupled directly to PCB copper, achieving Rth(j-mb) = 2 K/W-significantly lower than typical SO-8 Rth(j-a) > 60 K/W. This enables the PHM25NQ10T to dissipate 62.5 W at Tmb = 25 °C without external heatsinks.
Is PHM25NQ10T pin-compatible with standard SO-8 footprints?
Yes, the PHM25NQ10T uses the SOT685-1 (QLPAK) package, which is explicitly stated as "SOT96 (SO-8) footprint compatible" in the PHM25NQ10T datasheet. Its 8-terminal layout matches SO-8 pin count and spacing, allowing direct PCB land pattern reuse-though the exposed mounting base requires additional solder paste and copper pour design.
PHM25NQ10T,518 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- TrenchMOS™
- Package/Case:
- 8-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 100 V
- Current - Continuous Drain (Id) @ 25°C:
- 30.7A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 30mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 4V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 26.6 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1800 pF @ 20 V
- FET Feature:
- -
- Power Dissipation (Max):
- 62.5W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSON (5x6)
PHM25NQ10T,518 FAQ
1.How can I place an order for PHM25NQ10T,518 through Aetrix?
Please submit a Request for Quotation (RFQ) for PHM25NQ10T,518 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PHM25NQ10T,518 reliable?
The price and inventory of PHM25NQ10T,518 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PHM25NQ10T,518 is usually 5 days.
3.What payment methods are accepted for PHM25NQ10T,518?
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4.How is shipping managed for PHM25NQ10T,518?
PHM25NQ10T,518 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PHM25NQ10T,518 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PHM25NQ10T,518?
For technical support, including PHM25NQ10T,518 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PHM25NQ10T,518 requirements.
6.How does Aetrix verify that PHM25NQ10T,518 is sourced from the original manufacturer or authorized distributors?
All PHM25NQ10T,518 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PHM25NQ10T,518 meets industry standards.
7.What is the process for return or replacement of PHM25NQ10T,518?
All PHM25NQ10T,518 units undergo pre-shipment inspection (PSI). If there is an issue with PHM25NQ10T,518, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PHM25NQ10T,518 part is unused and in its original packaging.
Return procedure for PHM25NQ10T,518:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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