Nexperia USA Inc. PMCXB900UELZ

Overview

PMCXB900UEL from Nexperia is a complementary N/P-channel Trench MOSFET in a DFN1010B-6 (SOT1216) package, designed for bidirectional switching and level translation in space-constrained portable electronics. It delivers 20 V drain-source voltage rating, 600 mA N-channel and −500 mA P-channel continuous drain current at 4.5 V gate drive, and ultra-low 0.7 V typical gate threshold voltage - enabling operation from single-cell Li-ion or alkaline supplies in battery-powered systems.

For engineers reviewing the PMCXB900UEL datasheet, PMCXB900UEL pinout, PMCXB900UEL application, or PMCXB900UEL equivalent, this device is selected for compact dual-rail power switching where low V_GS(th), minimal R_DS(on) at 1.8 V–4.5 V gate drive, ESD-hardened layout, and thermal performance on FR4 PCBs are critical design requirements.

Technical Context

This dual-channel MOSFET integrates discrete N- and P-channel Trench devices in one monolithic die with shared thermal path and matched threshold characteristics. Its complementary topology supports push-pull, H-bridge half-bridge, and level-shifting configurations without external bias networks.

The device uses ultra-thin 0.37 mm DFN1010B-6 packaging with exposed drain pads for both channels to minimize thermal resistance (R_th(j-sp) = 27–31 K/W), while maintaining >1 kV HBM ESD protection and sub-1 µA off-state leakage at 20 V.

Key Specifications

Pinout & Package

DFN1010B-6 (SOT1216) is a leadless, thermally enhanced ultra-thin plastic package with six terminals and an exposed drain pad for each channel. Pin 1 (S1) is marked by a visible notch or laser mark on the top surface per Figure 1 of the datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar complementary MOSFET applications.

Compared with DMN2020LSD-13 and FDMA1023NZ, PMCXB900UEL uniquely balances 20 V capability, 1.1 × 1.0 mm size, matched thresholds, and built-in ESD - making it the only option qualified for compact, battery-fed, mixed-voltage interface designs requiring zero external protection.

Availability

PMCXB900UEL is available at Aetrix Electronics and suitable for relay replacement, high-speed line driving, level shifting, and battery-powered power management requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support.

Supply support for PMCXB900UEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions optimized for efficiency, miniaturization, and manufacturability.

PMCXB900UEL belongs to Nexperia's TrenchMOS complementary FET product line, engineered specifically for space-constrained portable electronics where low-threshold switching, thermal efficiency on FR4, and ESD resilience are mandatory.

FAQ

What is the maximum continuous drain current for each channel at 100 °C ambient?

The N-channel supports 400 mA and the P-channel supports −300 mA at Tamb = 100 °C with device mounted on FR4 PCB (single-sided copper, 1 cm² drain pad). Derating follows the normalized current curve in Figure 3, where I_der drops to ~65% of 25 °C rating at 100 °C junction temperature.

Can PMCXB900UEL be used in a back-to-back configuration for AC switching?

Yes - its complementary N/P structure and symmetric ±20 V V_DS rating allow direct back-to-back connection (D1–D2 tied, S1–S2 as AC terminals) for low-loss, bidirectional AC switching in <100 mA signal paths, such as analog multiplexers or audio routing switches.

Is the DFN1010B-6 package compatible with standard reflow soldering processes?

Yes - the DFN1010B-6 package meets JEDEC J-STD-020 moisture sensitivity level 1 and is qualified for peak reflow temperatures up to 260 °C. Recommended footprint matches Figure 32 in the datasheet: 0.35 mm solder land width, 1.2 mm length, and 0.25 mm solder mask opening.

How does the R_DS(on) change with gate voltage below 2.5 V?

At V_GS = 1.8 V, R_DS(on) rises to 845–1300 mΩ (N) and 1.7–3.3 Ω (P); at V_GS = 1.2 V, it reaches 2210 mΩ (N) and 3.5 Ω (P). This steep increase confirms the device is optimized for ≥1.8 V logic but remains functional down to 1.2 V for ultra-low-power wake-up circuits.