Nexperia USA Inc. PMDPB55XP,115

Overview

PMDPB55XP from Nexperia is a dual P-channel enhancement-mode Trench MOSFET in a DFN2020-6 (SOT1118) package, rated for −20 V drain-source voltage, 55 mΩ typical R_DS(on) at V_GS = −4.5 V, and −3.4 A continuous drain current per transistor at T_amb = 25 °C. It serves as a compact, thermally efficient power switch in portable battery management and DC/DC converter topologies.

For engineers reviewing the PMDPB55XP datasheet, PMDPB55XP pinout, PMDPB55XP application, or PMDPB55XP equivalent, this device is selected for high-density, low-profile dual-P-channel switching where thermal performance, fast turn-on/off timing (t_d(on) = 4 ns, t_f = 68 ns), and gate drive compatibility with 1.8–4.5 V logic are critical design constraints.

Technical Context

This dual MOSFET integrates two independent P-channel Trench devices sharing a common ultra-thin DFN2020-6 package with an exposed drain pad for enhanced thermal conduction. Each channel exhibits a gate threshold voltage of −0.47 to −0.9 V and supports gate drive down to 1.8 V with verified R_DS(on) ≤ 135 mΩ at V_GS = −1.8 V.

Its SOA is defined up to −20 V V_DS and −14 A peak drain current (t_p ≤ 10 µs), with normalized derating curves confirming stable operation across −55 °C to 150 °C junction temperature. The device uses no external gate resistors in standard switching configurations due to low Q_G(tot) (16.5–25 nC) and minimal C_iss (785 pF).

Key Specifications

Pinout & Package

Package: DFN2020-6 (SOT1118), 2.0 × 2.0 × 0.65 mm, leadless, ultra-thin, with exposed drain pad for thermal conduction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual P-channel MOSFET applications.

Compared with DMC2038LSD-13 and SI3993DV-T1-GE3, PMDPB55XP uniquely balances −20 V rating, 55 mΩ R_DS(on), and 0.65 mm profile-making it the only option for space-constrained, 12 V-class portable power switches requiring <1 W thermal dissipation per channel.

Availability

PMDPB55XP is available at Aetrix Electronics and suitable for charging switches in portable devices, DC/DC converter high-side switching, and small brushless DC motor drives requiring stable component supply across production lifecycles.

Supply support for PMDPB55XP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential semiconductors for high-volume applications, delivering high-performance, reliable, and energy-efficient components.

The PMDPB55XP belongs to Nexperia's TrenchMOS dual-FET product line, engineered specifically for space- and thermally constrained battery-powered systems requiring dual independent P-channel switching in minimal PCB area.

FAQ

What is the maximum continuous drain current per channel at 100 °C ambient temperature?

At T_amb = 100 °C, the maximum continuous drain current per channel is −2.2 A, as specified in Table 5 (Limiting Values). This derating accounts for thermal resistance and junction temperature limits up to 150 °C, assuming standard FR4 PCB mounting with 6 cm² drain pad area.

Can PMDPB55XP be used in a synchronous buck converter as both high-side and low-side switch?

No - PMDPB55XP contains two P-channel MOSFETs only and lacks N-channel devices required for efficient low-side switching in synchronous buck topologies. It is designed for high-side or load-switch roles; pairing with external N-channel FETs is necessary for full synchronous operation.

Is the exposed drain pad electrically connected to both D1 and D2 terminals?

Yes - pins 3 (D2) and 6 (D1) are internally connected to the same exposed copper drain pad, forming a single thermal and electrical node. This configuration simplifies PCB layout by allowing one large thermal land instead of separate pads for each drain.

What is the gate leakage current specification at −12 V V_GS and 25 °C?

The gate leakage current is specified as ≤100 nA at V_GS = −12 V, V_DS = 0 V, and T_j = 25 °C (Table 7, Characteristics). This low leakage ensures minimal control current draw in always-on or low-power standby circuits.