Nexperia USA Inc. PMGD280UN,115

Overview

PMGD280UN from Nexperia is a dual N-channel enhancement-mode TrenchMOS™ power transistor in SOT363 (SC-88) package, designed for ultra-low-threshold switching in space-constrained portable systems. It delivers R_DS(on) ≤ 340 mΩ at V_GS = 4.5 V, V_DS ≤ 20 V, I_D ≤ 0.87 A per channel, and operates down to V_GS(th) = 0.45 V - enabling efficient battery-powered load switching and level-shifting in wearables and IoT edge nodes.

For engineers reviewing the PMGD280UN datasheet, PMGD280UN pinout, PMGD280UN application, or PMGD280UN equivalent, this device is selected for dual low-voltage logic-level switching where footprint reduction, fast turn-on (t_d(on) = 4.5 ns), and thermal robustness (R_th(j-sp) = 300 K/W) are critical in high-density PCB layouts.

Technical Context

This dual MOSFET integrates two independent N-channel channels in a single 6-pin SC-88 package, sharing no internal connection between drains or sources. Each channel features trench-gate architecture optimized for low gate charge (Q_g(tot) = 0.89 nC) and minimal Miller capacitance (Q_gd = 0.18 nC), supporting high-frequency PWM control up to several MHz.

It operates with V_GS as low as 1.8 V (R_DS(on) ≤ 660 mΩ at I_D = 75 mA), supports bidirectional source-drain diode conduction (V_SD = 0.83 V at I_S = 0.3 A), and maintains stable threshold voltage across temperature (V_GS(th) = 0.25 V min at T_j = 150 °C).

Key Specifications

Pinout & Package

SOT363 (SC-88) is a 6-pin surface-mount plastic package measuring 2.2 × 1.8 × 1.15 mm, with 0.65 mm lead pitch and 40% smaller footprint than standard SOT23. Its symmetrical layout supports automated placement and reflow compatibility per JEDEC J-STD-020.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual N-channel logic-level switching applications.

Compared with DMN2004LSD-13 and AOB402, PMGD280UN uniquely combines dual-channel integration, sub-1 V threshold, and SC-88 footprint - making it optimal for miniaturized, low-power, high-switching-frequency applications where board area and drive simplicity are constrained.

Availability

PMGD280UN is available at Aetrix Electronics and suitable for USB-C accessory design, wearable sensor node development, and portable display backlight control requiring stable component supply and long-term industrial availability.

Supply support for PMGD280UN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global leader in discrete, logic, and power MOSFET semiconductors, spun off from Philips Semiconductors in 2017 and headquartered in Nijmegen, Netherlands.

The µTrenchMOS™ product line targets space- and power-constrained applications in automotive, industrial, computing, and wearable markets - emphasizing ultra-low R_DS(on), fast switching, and miniature packaging.

FAQ

What is the maximum safe operating temperature for PMGD280UN?

The junction temperature must not exceed +150 °C under any condition. Derating begins at T_sp = 25 °C, with continuous drain current dropping to 0.55 A at T_sp = 100 °C. Thermal design must ensure R_th(j-sp) ≤ 300 K/W is maintained via adequate PCB copper area and solder joint quality.

Can PMGD280UN be used in reverse conduction mode (source-to-drain)?

Yes - each channel includes an intrinsic body diode rated for 0.34 A DC forward current (I_S) and 0.69 A pulsed (I_SM). V_SD is 0.83 V typical at I_S = 0.3 A and T_j = 25 °C, enabling synchronous rectification or bidirectional signal clamping in low-voltage interfaces.

Is gate protection required when driving PMGD280UN from a microcontroller?

No external gate resistor or Zener clamp is required for 3.3 V or 1.8 V GPIOs, as V_GS rating is ±8 V and I_GSS is ≤100 nA. However, a 10–100 Ω series resistor is recommended to dampen ringing in high-speed PWM (>1 MHz) layouts with long traces.

How does R_DS(on) change with temperature and gate voltage?

R_DS(on) increases with junction temperature: at 150 °C it reaches 544 mΩ (typical) under V_GS = 4.5 V. At lower V_GS, it rises sharply - e.g., 460–660 mΩ at V_GS = 1.8 V and I_D = 75 mA. Designers must verify conduction loss across full thermal and voltage range using Figure 8 and Table 5 data.