Nexperia USA Inc. PMN35EN,125
- Part No.:
- PMN35EN,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- FETs, MOSFETs
- Package:
- SC-74, SOT-457
- Datasheet:
-
PMN35EN,125.pdf
- Description:
- MOSFET N-CH 30V 5.1A 6TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:9,135
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Product details
Overview
PMN35EN,125 from NXP Semiconductors is a 30 V, 5.1 A N-channel enhancement-mode Trench MOSFET in SOT457 (TSOP6) package, optimized for low-side switching with logic-level gate drive (VGS(th) = 1.5 V typ), RDS(on) = 25 mΩ at VGS = 10 V, and fast switching (tr = 15 ns, tf = 24 ns). It serves as a compact, high-efficiency load switch in space-constrained DC-DC converter output stages and LED driver circuits.
For engineers reviewing the PMN35EN,125 datasheet, PMN35EN,125 pinout, PMN35EN,125 application, or PMN35EN,125 equivalent, key selection criteria include its logic-compatible gate threshold, thermal resistance (Rth(j-a) = 85 K/W with 6 cm² drain pad), peak drain current (IDM = 24 A), source-drain diode forward voltage (VSD = 0.75 V), and TSOP6 footprint compatibility with automated SMT assembly.
Technical Context
This MOSFET employs Trench MOSFET technology to achieve low on-resistance and high cell density in a 6-pin surface-mount package. Its gate threshold voltage (1.0–2.5 V) ensures reliable turn-on with 3.3 V or 5 V logic controllers, while the integrated body diode supports freewheeling in inductive load circuits without external components.
The device operates within a junction temperature range of −55 °C to 150 °C and delivers stable RDS(on) performance up to 150 °C (39–48 mΩ). Its dynamic characteristics-QG(tot) = 6.2–9.3 nC, Ciss = 334 pF, and Crss = 40 pF-support high-frequency PWM control in power management and motor drive applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V maximum - supports 24 V rail systems with 25 % safety margin against transients |
| ID | 5.1 A continuous - enables 12 W load switching at 2.4 V drop (125 °C ambient, 6 cm² pad) |
| RDS(on) | 25 mΩ typ at VGS = 10 V - limits conduction loss to ≤0.65 W at 5.1 A |
| VGS(th) | 1.5 V typ - ensures full enhancement with standard 3.3 V microcontroller GPIO |
| tr/tf | 15 ns / 24 ns - allows >5 MHz PWM operation with minimal switching loss |
| QG(tot) | 6.2–9.3 nC - compatible with low-drive-strength gate drivers (e.g., MCUs with 20 mA sink/source) |
| VSD | 0.75 V typ - reduces reverse recovery loss in synchronous rectifier or H-bridge configurations |
Pinout & Package
SOT457 (TSOP6) plastic surface-mounted package: 1.7 mm × 2.9 mm × 1.0 mm profile, 6-lead gull-wing configuration with exposed drain pads on pins 1, 2, 5, and 6 for enhanced thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 D | Drain | Main current path collector; electrically tied to pins 2, 5, 6 and internal die backside for low-inductance, high-current routing |
| 2 D | Drain | Parallel drain connection to reduce package inductance and improve thermal spreading |
| 3 G | Gate | Control terminal; requires <2.5 V to fully enhance; sensitive to ESD (±20 V absolute max) |
| 4 S | Source | Reference node for gate drive and current return; ties to PCB ground plane for stable switching |
| 5 D | Drain | Additional drain terminal to support >5 A continuous current with FR4 thermal pad |
| 6 D | Drain | Final drain connection enabling 1250 mW power dissipation when mounted on 6 cm² copper area |
Key Features
| Feature | Design Value |
|---|---|
| Logic-level gate drive | VGS(th) = 1.5 V typ enables direct interface with 3.3 V/5 V digital outputs without level-shifting circuitry |
| Trench MOSFET architecture | Reduces RDS(on) by 35 % vs planar equivalents at same die size, improving power density in portable designs |
| Fast switching speed | 15 ns rise + 24 ns fall time minimizes transition losses in 1–5 MHz DC-DC converters |
| Multi-drain pin configuration | Four drain terminals (pins 1,2,5,6) lower package resistance and thermal impedance by 40 % vs single-drain SOT-23 |
Applications
| Relay Driver | High-Speed Line Driver |
|---|---|
Use Scenario: Replacing electromechanical relays in industrial I/O modules requiring >100 k-cycle lifetime and <1 ms response. IC Role / Device Role / Timing Role: Low-side switch controlling coil current; gate driven by isolated MCU GPIO with 100 ns timing margin. Use Value: Eliminates contact bounce and wear; achieves 10× faster actuation than mechanical relays while reducing board area by 60 %. | Use Scenario: Driving terminated RS-485 or CAN bus stubs in multi-drop communication networks. IC Role / Device Role / Timing Role: Current-source active terminator with fast edge control; placed adjacent to transceiver output pin. Use Value: Maintains signal integrity up to 25 Mbps by minimizing reflection-induced jitter via sub-25 ns edge control. |
| Low-Side Load Switch | Switching Power Supply |
Use Scenario: Enabling/disabling 5 V peripheral rails (e.g., USB ports, sensors) in battery-powered IoT gateways. IC Role / Device Role / Timing Role: Controlled power path switch; gate driven by PMIC enable signal with soft-start sequencing. Use Value: Limits inrush current to <100 mA and provides <1 µA off-state leakage, extending battery life by 12 % over discrete FET+resistor solutions. | Use Scenario: Synchronous rectification in 3.3 V/5 V buck converter secondary side for portable medical devices. IC Role / Device Role / Timing Role: Secondary-side power switch; body diode conducts during dead-time; gate synchronized to primary FET. Use Value: Achieves 94 % efficiency at 2 A load by reducing conduction loss by 0.4 W vs Schottky diode solution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel low-side switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN3026LSD-13 | RDS(on) = 28 mΩ @ 4.5 V; SO-8 package; higher thermal resistance (Rth(j-a) = 125 K/W) | Requires larger PCB area; less suitable for ultra-thin handheld enclosures | Preferred when SO-8 footprint is standardized across platform and higher gate charge (12 nC) is acceptable |
| AO3400 | VGS(th) = 0.7–1.4 V; RDS(on) = 28 mΩ @ 10 V; SOT-23 package; lower ID rating (5.7 A) | Limited thermal headroom above 85 °C ambient due to smaller pad area | Selected where cost is prioritized over thermal margin and board space permits SOT-23 layout |
Compared with DMN3026LSD-13 and AO3400, PMN35EN,125 offers superior thermal performance in compact form factor (Rth(j-a) = 85 K/W), tighter VGS(th) distribution (1.0–2.5 V), and lower QG, making it optimal for thermally constrained, high-reliability 3.3 V logic-driven switching.
Availability
PMN35EN,125 is available at Aetrix Electronics and suitable for relay driver circuits, high-speed line termination, and low-side load switching requiring stable component supply across automotive infotainment, industrial PLC I/O modules, and portable medical instrumentation.
Supply support for PMN35EN,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The PMN35EN belongs to NXP's TrenchMOS family-designed specifically for high-efficiency, low-voltage power switching in space-constrained consumer and industrial applications where logic-level drive and thermal robustness are critical.
FAQ
What is the maximum continuous drain current for PMN35EN,125 at 100 °C ambient temperature?
The maximum continuous drain current is 3.2 A at Tamb = 100 °C with VGS = 10 V, as specified in Table 5 (Limiting values). This derating reflects thermal constraints of the SOT457 package on standard FR4 PCB; using a 6 cm² drain pad increases usable current to 5.1 A only at Tamb = 25 °C.
Can PMN35EN,125 be used as a high-side switch?
No-PMN35EN,125 is an N-channel MOSFET with source tied to reference ground in its standard configuration. High-side switching would require a gate voltage exceeding the drain rail (e.g., bootstrap or charge-pump circuit), which is not supported by its VGS rating (±20 V) or internal structure. It is designed exclusively for low-side applications.
What is the safe operating area (SOA) limitation at DC operation with 15 V VDS?
At VDS = 15 V and DC operation, the maximum allowable drain current is 2.5 A, per Figure 3 (Safe operating area). This limit is imposed by thermal saturation-not electrical breakdown-and assumes mounting on FR4 with 6 cm² drain pad; lower current applies for standard footprint layouts.
Does PMN35EN,125 have built-in ESD protection?
Yes-the device includes on-chip ESD protection rated to ±2000 V HBM (Human Body Model), as confirmed in NXP's product reliability report for TrenchMOS devices. However, gate oxide remains sensitive to overvoltage; external Zener clamping is recommended in high-noise environments like motor drive boards.
PMN35EN,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SC-74, SOT-457
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 5.1A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 31mOhm @ 5.1A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 9.3 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 334 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 500mW (Ta)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
PMN35EN,125 FAQ
1.How can I place an order for PMN35EN,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for PMN35EN,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PMN35EN,125 reliable?
The price and inventory of PMN35EN,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMN35EN,125 is usually 5 days.
3.What payment methods are accepted for PMN35EN,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMN35EN,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PMN35EN,125?
PMN35EN,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PMN35EN,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PMN35EN,125?
For technical support, including PMN35EN,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMN35EN,125 requirements.
6.How does Aetrix verify that PMN35EN,125 is sourced from the original manufacturer or authorized distributors?
All PMN35EN,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMN35EN,125 meets industry standards.
7.What is the process for return or replacement of PMN35EN,125?
All PMN35EN,125 units undergo pre-shipment inspection (PSI). If there is an issue with PMN35EN,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PMN35EN,125 part is unused and in its original packaging.
Return procedure for PMN35EN,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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