NXP Semiconductors PMN70XPEA115
- Part No.:
- PMN70XPEA115
- Manufacturer:
- NXP Semiconductors
- Category:
- FETs, MOSFETs
- Package:
- -
- Datasheet:
-
PMN70XPEA115.pdf
- Description:
- MOSFET P-CH 20V 3.2A
- Quantity:
- Payment:

- Shipping:

Inventory:8,902
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PMN70XPEA115 from NXP Semiconductors is a single P-channel enhancement-mode Trench MOSFET in SOT457 (TSOP6) package, rated for -20 V drain-source voltage, 70 mΩ RDS(on) at VGS = -4.5 V and ID = -2 A, and optimized for high-side load switching in compact power management circuits.
For engineers reviewing the PMN70XPEA115 datasheet, PMN70XPEA115 pinout, PMN70XPEA115 application, or PMN70XPEA115 equivalent, this page delivers verified electrical parameters, thermal derating curves, gate charge timing data, and validated alternative options for industrial and consumer DC-DC control designs.
Technical Context
This device uses Trench MOSFET technology to achieve low threshold voltage (-1.0 V typical VGS(th)) and fast switching with 7.8 nC total gate charge, enabling efficient operation in high-frequency load-switching topologies. Its 2 kV HBM ESD rating supports robust handling in automated assembly environments.
The PMN70XPEA115 features a 6-pin TSOP6 package with four drain terminals (pins 1, 2, 5, 6), one gate (pin 3), and one source (pin 4), delivering low thermal resistance (Rth(j-sp) = 15–20 K/W) when mounted on FR4 PCBs with 6 cm² drain pad area.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | -20 V maximum - defines safe blocking capability in 12 V and 15 V rail applications |
| RDS(on) | 70 mΩ typical at VGS = -4.5 V - enables ≤85 mW conduction loss at 2 A continuous current |
| VGS(th) | -1.0 V typical - ensures reliable turn-on with 3.3 V logic-level gate drive |
| QG(tot) | 7.8 nC maximum - determines gate driver strength requirement for <50 ns switching transitions |
| ID (continuous) | -4.1 A at Tamb = 25 °C - sets usable current limit with standard FR4 layout and no heatsink |
| Tj(max) | 150 °C - constrains thermal design margin for sustained operation in enclosed enclosures |
| ESD | 2000 V HBM - eliminates need for external ESD protection in board-level handling |
Pinout & Package
Package: TSOP6 (SOT457), surface-mount plastic package with 6 leads, 3.0 mm × 2.5 mm footprint, 1.3 mm height, and exposed drain pad for thermal conduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 5, 6 | Drain (D) | Four parallel drain connections reduce package inductance and improve thermal spreading to PCB copper |
| 3 | Gate (G) | Control terminal requiring ≤7.8 nC charge for full enhancement; sensitive to ESD but protected to 2 kV HBM |
| 4 | Source (S) | Reference node for gate drive; connects to system ground or high-side return path in load-switch configurations |
Key Features
| Feature | Design Value |
|---|---|
| Low VGS(th) | -1.0 V typical enables direct interface with 3.3 V microcontrollers without level-shifting circuitry |
| Fast switching | 7 ns turn-on delay + 13 ns rise time supports >1 MHz PWM load control in battery-powered systems |
| Trench MOSFET architecture | Delivers 70 mΩ RDS(on) in ultra-small SOT457, reducing board area vs. SO-8 alternatives by 65% |
| Integrated ESD protection | 2 kV HBM rating eliminates discrete TVS diodes in gate drive paths, simplifying BOM |
| High peak current capability | 12.8 A single-pulse IDM allows surge handling during motor startup or capacitor charging |
Applications
| Relay Driver | High-Speed Line Driver |
|---|---|
Use Scenario: Replacing electromechanical relays in PLC I/O modules to eliminate contact wear and bounce. IC Role / Device Role / Timing Role: High-side switch controlling 12 V/24 V coil current with logic-level gate drive from FPGA GPIO. Use Value: Enables solid-state reliability with 12.8 A peak current handling and 2 kV ESD immunity during field wiring. | Use Scenario: Driving terminated RS-422/RS-485 bus segments in industrial communication nodes. IC Role / Device Role / Timing Role: Active termination switch enabling dynamic bus biasing and slew-rate control. Use Value: 7.8 nC QG and 13 ns rise time support clean edge transitions up to 20 Mbps without overshoot. |
| High-Side Loadswitch | Switching Circuits |
Use Scenario: Power sequencing for USB peripherals or sensor modules in portable medical devices. IC Role / Device Role / Timing Role: Controlled power rail enable with soft-start via gate resistor limiting dV/dt. Use Value: -1.0 V VGS(th) ensures full enhancement at 3.3 V supply, eliminating need for charge pump or bootstrap circuit. | Use Scenario: Synchronous rectification in isolated flyback converters for AC/DC adapters. IC Role / Device Role / Timing Role: Secondary-side synchronous switch replacing Schottky diode to reduce conduction losses. Use Value: 70 mΩ RDS(on) cuts forward voltage drop to <100 mV at 2 A, improving efficiency by ≥2% over 40 V Schottky. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN2011LFG-7 | 20 V, 55 mΩ RDS(on), 6-pin WDFN (2×2 mm); lower RDS(on) but requires solder-reflow profile optimization | Better thermal performance in space-constrained layouts; not compatible with TSOP6 footprint | Select when board area is critical and reflow process supports WDFN; verify gate drive compatibility with -0.9 V VGS(th) |
| SI2301DDS-T1-BE3 | 20 V, 115 mΩ RDS(on), SOT-23 package; higher on-resistance but widely available and lower cost | Suitable for low-current (<1 A) load switches where thermal budget permits higher loss | Choose for cost-sensitive consumer applications where 70 mΩ is not required and SOT-23 layout already exists |
Compared with PMN70XPEA115, DMN2011LFG-7 offers lower conduction loss in smaller area but demands tighter process control, while SI2301DDS-T1-BE3 trades performance for broad availability and legacy footprint compatibility-making PMN70XPEA115 optimal for balanced performance, size, and manufacturability in new designs.
Availability
PMN70XPEA115 is available at Aetrix Electronics and suitable for high-side loadswitching, relay replacement, and high-speed line driving applications requiring stable component supply across automotive infotainment subsystems, industrial I/O modules, and portable medical equipment.
Supply support for PMN70XPEA115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The PMN70XPEA115 belongs to NXP's TrenchMOS family of logic-level P-channel MOSFETs, engineered specifically for compact, high-efficiency DC power control in space- and thermally constrained applications.
FAQ
What is the maximum continuous drain current for PMN70XPEA115 at 100 °C ambient temperature?
The PMN70XPEA115 supports -2 A continuous drain current at Tamb = 100 °C with standard FR4 mounting (single-sided copper, 6 cm² drain pad). This derated value reflects thermal limitations under sustained high-temperature operation and must be verified against actual board layout using Fig. 2 (normalized Ider) from the datasheet. At 25 °C ambient, PMN70XPEA115 delivers -4.1 A continuous current.
Does PMN70XPEA115 require a gate resistor for ESD protection?
No, PMN70XPEA115 integrates 2 kV HBM ESD protection on the gate terminal, eliminating the need for external series resistors solely for ESD mitigation. However, a small gate resistor (e.g., 10–47 Ω) is still recommended to dampen ringing and control dV/dt during fast switching, especially in high-noise industrial environments where PMN70XPEA115 is commonly deployed.
Can PMN70XPEA115 be used as a direct replacement for an N-channel MOSFET in high-side switching?
No, PMN70XPEA115 is a P-channel device and operates with inverted logic: it turns ON when gate voltage is pulled below source. Unlike N-channel high-side switches, PMN70XPEA115 does not require a gate-boost circuit or charge pump. Its -1.0 V VGS(th) allows direct 3.3 V logic control, making PMN70XPEA115 simpler to implement than N-channel alternatives in high-side configurations.
What is the thermal resistance from junction to solder point (Rth(j-sp)) for PMN70XPEA115?
The PMN70XPEA115 has a junction-to-solder-point thermal resistance of 15–20 K/W under standard FR4 PCB conditions (single-sided copper, tin-plated, 6 cm² drain pad, t ≤ 5 s). This value enables accurate thermal modeling when calculating junction temperature rise above ambient, especially critical for PMN70XPEA115's 150 °C maximum Tj rating in sealed enclosures.
Is PMN70XPEA115 qualified for automotive applications?
No, PMN70XPEA115 is not automotive-qualified. The official NXP datasheet explicitly states that unless otherwise indicated, products like PMN70XPEA115 are non-automotive qualified and are neither tested nor warranted for automotive use. For automotive-grade equivalents, consult NXP's AEC-Q101 qualified TrenchMOS portfolio-PMN70XPEA115 remains intended for industrial, consumer, and medical applications.
PMN70XPEA115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- FET Type:
- -
- Technology:
- -
- Drain to Source Voltage (Vdss):
- -
- Current - Continuous Drain (Id) @ 25°C:
- -
- Drive Voltage (Max Rds On, Min Rds On):
- -
- Rds On (Max) @ Id, Vgs:
- -
- Vgs(th) (Max) @ Id:
- -
- Gate Charge (Qg) (Max) @ Vgs:
- -
- Vgs (Max):
- -
- Input Capacitance (Ciss) (Max) @ Vds:
- -
- FET Feature:
- -
- Power Dissipation (Max):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
PMN70XPEA115 FAQ
1.How can I place an order for PMN70XPEA115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PMN70XPEA115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PMN70XPEA115 reliable?
The price and inventory of PMN70XPEA115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMN70XPEA115 is usually 5 days.
3.What payment methods are accepted for PMN70XPEA115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMN70XPEA115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PMN70XPEA115?
PMN70XPEA115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PMN70XPEA115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PMN70XPEA115?
For technical support, including PMN70XPEA115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMN70XPEA115 requirements.
6.How does Aetrix verify that PMN70XPEA115 is sourced from the original manufacturer or authorized distributors?
All PMN70XPEA115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMN70XPEA115 meets industry standards.
7.What is the process for return or replacement of PMN70XPEA115?
All PMN70XPEA115 units undergo pre-shipment inspection (PSI). If there is an issue with PMN70XPEA115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PMN70XPEA115 part is unused and in its original packaging.
Return procedure for PMN70XPEA115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PMN70XPEA115 Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

